From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44747) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkUbB-0000Ak-Pn for qemu-devel@nongnu.org; Tue, 21 Apr 2015 05:36:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YkUbA-0004j4-N7 for qemu-devel@nongnu.org; Tue, 21 Apr 2015 05:36:09 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:45842 helo=socrates.bennee.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkUbA-0004iu-IQ for qemu-devel@nongnu.org; Tue, 21 Apr 2015 05:36:08 -0400 References: <1428931324-4973-1-git-send-email-peter.maydell@linaro.org> <1428931324-4973-13-git-send-email-peter.maydell@linaro.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <1428931324-4973-13-git-send-email-peter.maydell@linaro.org> Date: Tue, 21 Apr 2015 10:36:31 +0100 Message-ID: <87y4llvn4w.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v2 12/14] target-arm: Add user-mode transaction attribute List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Peter Crosthwaite , patches@linaro.org, "Edgar E. Iglesias" , qemu-devel@nongnu.org, Greg Bellows , Paolo Bonzini , Richard Henderson Peter Maydell writes: > Add a transaction attribute indicating that a memory access is being > done from user-mode (unprivileged). This corresponds to an equivalent > signal in ARM AMBA buses. > > Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée > --- > include/exec/memattrs.h | 2 ++ > target-arm/helper.c | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h > index 68a9c76..1389b4b 100644 > --- a/include/exec/memattrs.h > +++ b/include/exec/memattrs.h > @@ -31,6 +31,8 @@ typedef struct MemTxAttrs { > unsigned int unspecified:1; > /* ARM/AMBA TrustZone Secure access */ > unsigned int secure:1; > + /* Memory access is usermode (unprivileged) */ > + unsigned int user:1; > } MemTxAttrs; > > /* Bus masters which don't specify any attributes will get this, > diff --git a/target-arm/helper.c b/target-arm/helper.c > index a01ff7f..50469cd 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -5749,6 +5749,7 @@ static inline int get_phys_addr(CPUARMState *env, target_ulong address, > * to secure. > */ > attrs->secure = regime_is_secure(env, mmu_idx); > + attrs->user = regime_is_user(env, mmu_idx); > > /* Fast Context Switch Extension. This doesn't exist at all in v8. > * In v7 and earlier it affects all stage 1 translations. -- Alex Bennée