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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Laurent Desnogues" <laurent.desnogues@gmail.com>,
	patches@linaro.org, "Michael Matz" <matz@suse.de>,
	"Alexander Graf" <agraf@suse.de>,
	qemu-devel@nongnu.org,
	"Claudio Fontana" <claudio.fontana@linaro.org>,
	"Dirk Mueller" <dmueller@suse.de>,
	"Will Newton" <will.newton@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	kvmarm@lists.cs.columbia.edu,
	"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN
Date: Sat, 11 Jan 2014 08:30:10 +0000	[thread overview]
Message-ID: <87y52m2a5p.fsf@linaro.org> (raw)
In-Reply-To: <52D04A0A.4010509@twiddle.net>


rth@twiddle.net writes:

> On 01/10/2014 09:12 AM, Peter Maydell wrote:
>> +    for (i = 0; i < elements; i++) {
>> +        switch (opcode) {
>> +        case 1: /* UZP1/2 */
>> +        {
>> +            int midpoint = elements / 2;
>> +            if (i < midpoint) {
>> +                read_vec_element(s, tcg_res, rn, 2 * i + part, size);
>> +            } else {
>> +                read_vec_element(s, tcg_res, rm,
>> +                                 2 * (i - midpoint) + part, size);
>> +            }
>> +            break;
>> +        }
>
> You're generating up to 16 * 3 + 2 = 50 opcodes here.  I do wonder if it
> wouldn't be better to implement these as helpers.  But,

What's the hit in terms of opcodes for calling a helper function? I
would have thought you spend 10s of opcodes with messing around with
stack frames and the like before you get to the helper.

I was wondering if there is a demand for more SIMD like TCG opcodes but
I suspect all the arches are subtly different enough to make it a pain
to abstract.

>
> Reviewed-by: Richard Henderson <rth@twiddle.net>
>
>
> r~

-- 
Sent with my mu4e

  reply	other threads:[~2014-01-11  8:30 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-10 17:12 [Qemu-devel] [PATCH 00/10] A64 SIMD patchset one: ld/st, C3.6.1..C3.6.7 Peter Maydell
2014-01-10 17:12 ` [Qemu-devel] [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple Peter Maydell
2014-01-10 18:05   ` Richard Henderson
2014-01-10 18:18     ` Peter Maydell
2014-01-10 18:28       ` Richard Henderson
2014-01-10 18:37         ` Peter Maydell
2014-01-10 19:00           ` Richard Henderson
2014-01-10 17:12 ` [Qemu-devel] [PATCH 02/10] target-arm: A64: Add SIMD ld/st single Peter Maydell
2014-01-10 18:12   ` Richard Henderson
2014-01-10 17:12 ` [Qemu-devel] [PATCH 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns Peter Maydell
2014-01-10 18:55   ` Richard Henderson
2014-01-10 19:05   ` Richard Henderson
2014-01-11  0:01     ` Peter Maydell
2014-01-10 17:12 ` [Qemu-devel] [PATCH 04/10] target-arm: A64: Add SIMD EXT Peter Maydell
2014-01-10 19:13   ` Richard Henderson
2014-01-10 17:12 ` [Qemu-devel] [PATCH 05/10] target-arm: A64: Add SIMD TBL/TBLX Peter Maydell
2014-01-10 19:19   ` Richard Henderson
2014-01-10 17:12 ` [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN Peter Maydell
2014-01-10 19:29   ` Richard Henderson
2014-01-11  8:30     ` Alex Bennée [this message]
2014-01-10 17:12 ` [Qemu-devel] [PATCH 07/10] target-arm: A64: Add SIMD across-lanes instructions Peter Maydell
2014-01-10 19:38   ` Richard Henderson
2014-01-10 17:12 ` [Qemu-devel] [PATCH 08/10] target-arm: A64: Add SIMD copy operations Peter Maydell
2014-01-10 19:50   ` Richard Henderson
2014-01-10 17:12 ` [Qemu-devel] [PATCH 09/10] target-arm: A64: Add SIMD modified immediate group Peter Maydell
2014-01-10 20:00   ` Richard Henderson
2014-01-10 17:12 ` [Qemu-devel] [PATCH 10/10] target-arm: A64: Add SIMD scalar copy instructions Peter Maydell
2014-01-10 20:03   ` Richard Henderson
2014-01-15 15:10   ` Claudio Fontana
2014-01-15 18:01     ` Peter Maydell

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