From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46224) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Usdyv-0007qX-U4 for qemu-devel@nongnu.org; Fri, 28 Jun 2013 15:05:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Usdyq-0005yG-W4 for qemu-devel@nongnu.org; Fri, 28 Jun 2013 15:05:17 -0400 Received: from e7.ny.us.ibm.com ([32.97.182.137]:49172) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Usdyq-0005xH-Sp for qemu-devel@nongnu.org; Fri, 28 Jun 2013 15:05:12 -0400 Received: from /spool/local by e7.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 28 Jun 2013 15:05:11 -0400 Received: from d01relay06.pok.ibm.com (d01relay06.pok.ibm.com [9.56.227.116]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id 9B730C9004A for ; Fri, 28 Jun 2013 15:05:06 -0400 (EDT) Received: from d01av03.pok.ibm.com (d01av03.pok.ibm.com [9.56.224.217]) by d01relay06.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r5SJ57b539583832 for ; Fri, 28 Jun 2013 15:05:07 -0400 Received: from d01av03.pok.ibm.com (loopback [127.0.0.1]) by d01av03.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r5SJ56Z2010002 for ; Fri, 28 Jun 2013 16:05:07 -0300 From: Anthony Liguori In-Reply-To: <51CCC73F.7030203@gmail.com> References: <51CCC73F.7030203@gmail.com> Date: Fri, 28 Jun 2013 14:04:57 -0500 Message-ID: <87y59urr8m.fsf@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Subject: Re: [Qemu-devel] [PATCH] q35 chipset: Extend support of SMBUS(module pm_smbus.c) HST_STS register v2. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Maksim Ratnikov , qemu-devel@nongnu.org Maksim Ratnikov writes: > From b4c324b42b488aca76aae06c8fa23a45acd91fcf Mon Sep 17 00:00:00 2001 > From: MRatnikov > Date: Fri, 28 Jun 2013 02:57:51 +0400 > Subject: [PATCH] Extend support of SMBUS(module pm_smbus.c) HST_STS > register v2 Patch is corrupted. Please send with git-send-email. Regards, Anthony Liguori > > Signed-off-by: MRatnikov > --- > Previous realization doesn't consider flags in the status register. > Add DS and INTR bits of HST_STS register set after transaction execution. > Update bits resetting in HST_STS register. Update error processing: > if DEV_ERR bit set transaction isn't execution. > > hw/i2c/pm_smbus.c | 25 +++++++++++++++++++++++-- > 1 files changed, 23 insertions(+), 2 deletions(-) > > diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c > index 0b5bb89..35f154e 100644 > --- a/hw/i2c/pm_smbus.c > +++ b/hw/i2c/pm_smbus.c > @@ -32,6 +32,18 @@ > #define SMBHSTDAT1 0x06 > #define SMBBLKDAT 0x07 > > +#define STS_HOST_BUSY (1) > +#define STS_INTR (1<<1) > +#define STS_DEV_ERR (1<<2) > +#define STS_BUS_ERR (1<<3) > +#define STS_FAILED (1<<4) > +#define STS_SMBALERT (1<<5) > +#define STS_INUSE_STS (1<<6) > +#define STS_BYTE_DONE (1<<7) > +/* Signs of successfully transaction end : > +* ByteDoneStatus = 1 (STS_BYTE_DONE) and INTR = 1 (STS_INTR ) > +*/ > + > //#define DEBUG > > #ifdef DEBUG > @@ -50,9 +62,14 @@ static void smb_transaction(PMSMBus *s) > i2c_bus *bus = s->smbus; > > SMBUS_DPRINTF("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot); > + /* Transaction isn't exec if STS_DEV_ERR bit set */ > + if ((s->smb_stat & STS_DEV_ERR) != 0) { > + goto error; > + } > switch(prot) { > case 0x0: > smbus_quick_command(bus, addr, read); > + s->smb_stat |= STS_BYTE_DONE | STS_INTR; > break; > case 0x1: > if (read) { > @@ -60,6 +77,7 @@ static void smb_transaction(PMSMBus *s) > } else { > smbus_send_byte(bus, addr, cmd); > } > + s->smb_stat |= STS_BYTE_DONE | STS_INTR; > break; > case 0x2: > if (read) { > @@ -67,6 +85,7 @@ static void smb_transaction(PMSMBus *s) > } else { > smbus_write_byte(bus, addr, cmd, s->smb_data0); > } > + s->smb_stat |= STS_BYTE_DONE | STS_INTR; > break; > case 0x3: > if (read) { > @@ -77,6 +96,7 @@ static void smb_transaction(PMSMBus *s) > } else { > smbus_write_word(bus, addr, cmd, (s->smb_data1 << 8) | > s->smb_data0); > } > + s->smb_stat |= STS_BYTE_DONE | STS_INTR; > break; > case 0x5: > if (read) { > @@ -84,6 +104,7 @@ static void smb_transaction(PMSMBus *s) > } else { > smbus_write_block(bus, addr, cmd, s->smb_data, s->smb_data0); > } > + s->smb_stat |= STS_BYTE_DONE | STS_INTR; > break; > default: > goto error; > @@ -91,7 +112,7 @@ static void smb_transaction(PMSMBus *s) > return; > > error: > - s->smb_stat |= 0x04; > + s->smb_stat |= STS_DEV_ERR; > } > > static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val, > @@ -102,7 +123,7 @@ static void smb_ioport_writeb(void *opaque, hwaddr > addr, uint64_t val, > SMBUS_DPRINTF("SMB writeb port=0x%04x val=0x%02x\n", addr, val); > switch(addr) { > case SMBHSTSTS: > - s->smb_stat = 0; > + s->smb_stat = (~(val & 0xff)) & s->smb_stat; > s->smb_index = 0; > break; > case SMBHSTCNT: > -- > 1.7.3.4