From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41472) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UkbyP-0001yT-RT for qemu-devel@nongnu.org; Thu, 06 Jun 2013 11:19:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UkbyN-0006ET-E0 for qemu-devel@nongnu.org; Thu, 06 Jun 2013 11:19:33 -0400 Received: from e7.ny.us.ibm.com ([32.97.182.137]:32951) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UkblU-0001N5-FT for qemu-devel@nongnu.org; Thu, 06 Jun 2013 11:06:12 -0400 Received: from /spool/local by e7.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 6 Jun 2013 11:05:22 -0400 Received: from d01relay01.pok.ibm.com (d01relay01.pok.ibm.com [9.56.227.233]) by d01dlp02.pok.ibm.com (Postfix) with ESMTP id 18C0E6E8054 for ; Thu, 6 Jun 2013 11:05:15 -0400 (EDT) Received: from d01av02.pok.ibm.com (d01av02.pok.ibm.com [9.56.224.216]) by d01relay01.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r56F5IE3286800 for ; Thu, 6 Jun 2013 11:05:18 -0400 Received: from d01av02.pok.ibm.com (loopback [127.0.0.1]) by d01av02.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r56F5IAV020822 for ; Thu, 6 Jun 2013 12:05:18 -0300 From: Anthony Liguori In-Reply-To: <20130606100149.GB8047@redhat.com> References: <1370508534-12335-1-git-send-email-david@gibson.dropbear.id.au> <20130606100149.GB8047@redhat.com> Date: Thu, 06 Jun 2013 10:04:58 -0500 Message-ID: <87y5annuud.fsf@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Subject: Re: [Qemu-devel] [0/10] Clean up PCI code to allow for multiple root buses (v2) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" , David Gibson Cc: pbonzini@redhat.com, qemu-devel@nongnu.org "Michael S. Tsirkin" writes: > On Thu, Jun 06, 2013 at 06:48:44PM +1000, David Gibson wrote: >> The current PCI subsystem has kind of half-hearted support for >> multiple independent root buses - aka PCI domains - in the form of the >> PCIHostBus structure and its domain field. However, it doesn't quite >> work because pci_host_bus_register() is always called with a domain of >> 0. >> >> Worse, though, the whole concept of numbered domains isn't general >> enough. Many platforms can have independent root buses (usually on >> wholly independent host bridges), but only x86 gives them a >> hardware-significant domain number, essentially as a hack to allow all >> the separate config spaces to be accessed via the same IO ports. >> Linux guests on other platforms will show domain numbers in lspci, but >> these are purely guest assigned, so qemu won't know about them. >> >> This patch series, therefore, removes the broken-as-is domain concept >> from qemu, and replaces it with a different way of handling multiple >> root buses, based on a host bridge class method to provide a >> identifier for the root bus. This hook is designed in such a way as >> to allow a single bridge object to support mutiple root buses with >> future changes, which will allow future implementations of x86 north >> bridges with multiple domains to be supported correctly, and in way >> that matches the existing practice for all external interfaces. >> >> v2: >> * Rework concept of "primary" bus in response to Michael Tsirkin's >> comments. > > > Looks good to me. > > Acked-by: Michael S. Tsirkin > > I'll wait a bit so others have a chance to comment, then apply > if everyone is happy. > > No need to repost for the lack of -M flag - I wish there was a way > to specify that in git config. [diff] renames = true Regards, Anthony Liguori > -- > MST