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Tue, 07 Oct 2025 07:21:41 -0700 (PDT) Received: from draig.lan ([185.126.160.19]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8abe90sm25528791f8f.23.2025.10.07.07.21.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 07:21:40 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 3423F5F812; Tue, 07 Oct 2025 15:21:39 +0100 (BST) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Cc: qemu-devel@nongnu.org, Zhao Liu , Paolo Bonzini , Richard Henderson , Pierrick Bouvier Subject: Re: [PATCH v6 04/39] system/cpus: Assert interrupt handling is done with BQL locked In-Reply-To: <20250703173248.44995-5-philmd@linaro.org> ("Philippe =?utf-8?Q?Mathieu-Daud=C3=A9=22's?= message of "Thu, 3 Jul 2025 19:32:10 +0200") References: <20250703173248.44995-1-philmd@linaro.org> <20250703173248.44995-5-philmd@linaro.org> User-Agent: mu4e 1.12.14-dev1; emacs 30.1 Date: Tue, 07 Oct 2025 15:21:39 +0100 Message-ID: <87zfa2yeq4.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Philippe Mathieu-Daud=C3=A9 writes: > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > Reviewed-by: Richard Henderson > --- > accel/tcg/tcg-accel-ops.c | 2 -- > system/cpus.c | 2 ++ > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c > index b24d6a75625..6116644d1c0 100644 > --- a/accel/tcg/tcg-accel-ops.c > +++ b/accel/tcg/tcg-accel-ops.c > @@ -93,8 +93,6 @@ static void tcg_cpu_reset_hold(CPUState *cpu) > /* mask must never be zero, except for A20 change call */ > void tcg_handle_interrupt(CPUState *cpu, int mask) > { > - g_assert(bql_locked()); > - > cpu->interrupt_request |=3D mask; >=20=20 > /* > diff --git a/system/cpus.c b/system/cpus.c > index d16b0dff989..a43e0e4e796 100644 > --- a/system/cpus.c > +++ b/system/cpus.c > @@ -265,6 +265,8 @@ static void generic_handle_interrupt(CPUState *cpu, i= nt mask) >=20=20 > void cpu_interrupt(CPUState *cpu, int mask) > { > + g_assert(bql_locked()); > + Is this really the case since 27e76d01010 (cpu-common: use atomic access for interrupt_request). In fact I think tcg_handle_interrupt now uses cpu_set_interrupt. > if (cpus_accel->handle_interrupt) { > cpus_accel->handle_interrupt(cpu, mask); > } else { --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro