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Tue, 18 Jun 2024 06:56:15 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 99DDB5F8AC; Tue, 18 Jun 2024 14:56:14 +0100 (BST) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Cc: Paolo Bonzini , qemu-devel@nongnu.org, Anton Johansson Subject: Re: [PATCH 3/3] semihosting: Restrict to TCG In-Reply-To: <8a22ada3-34e6-4d6d-aebe-67bc07d0f38f@linaro.org> ("Philippe =?utf-8?Q?Mathieu-Daud=C3=A9=22's?= message of "Tue, 18 Jun 2024 13:33:28 +0200") References: <20240529155548.5878-1-philmd@linaro.org> <20240529155548.5878-4-philmd@linaro.org> <7ce86375-779d-43d6-9871-7f9587c95ba6@linaro.org> <5c913504-d917-4fd1-86d5-85d3bc293623@linaro.org> <8a22ada3-34e6-4d6d-aebe-67bc07d0f38f@linaro.org> Date: Tue, 18 Jun 2024 14:56:14 +0100 Message-ID: <87zfricq2p.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Philippe Mathieu-Daud=C3=A9 writes: > ping :) > > On 12/6/24 15:12, Philippe Mathieu-Daud=C3=A9 wrote: >> Hi Paolo, >> On 30/5/24 15:58, Philippe Mathieu-Daud=C3=A9 wrote: >>> On 30/5/24 09:31, Paolo Bonzini wrote: >>>> On Thu, May 30, 2024 at 9:22=E2=80=AFAM Philippe Mathieu-Daud=C3=A9 >>>> wrote: >>>>> >>>>> On 30/5/24 08:02, Paolo Bonzini wrote: >>>>>> On Wed, May 29, 2024 at 5:56=E2=80=AFPM Philippe Mathieu-Daud=C3=A9 >>>>>> wrote: >>>>>>> It is pointless to build semihosting when TCG is not available. >>>>>> >>>>>> Why? I would have naively assumed that a suitable semihosting API >>>>>> could be implemented by KVM. The justification (and thus the commit >>>>>> message) needs to be different for each architecture if it's a matter >>>>>> of instruction set or insufficient KVM userspace API. >>>>> >>>>> I wasn't sure where semihosting could be used so asked on IRC and >>>>> Alex told me TCG only. Maybe the current implementation is TCG >>>>> only, and I can reword. It certainly need some refactor to work >>>>> on KVM, because currently semihosting end calling the TCG probe_access >>>>> API, which I'm trying to restrict to TCG in order to ease linking >>>>> multiple libtcg for the single binary (see >>>>> https://lore.kernel.org/qemu-devel/20240529155918.6221-1-philmd@linar= o.org/). >>>> >>>> Ok, that goes in the commit message though. >>>> >>>> "Semihosting currently uses the TCG probe_access API. It is pointless >>>> to have it in the binary when TCG isn't". >>>> >>>> and in the first two patches: >>>> >>>> "Semihosting currently uses the TCG probe_access API. To prepare for >>>> encoding the TCG dependency in Kconfig, do not enable it unless TCG is >>>> available". >>>> >>>> But then, "select FOO if TCG" mean that it can be compiled out; so >>>> perhaps "imply SEMIHOSTING if TCG" is better? Same for RISC-V's >>>> "select ARM_COMPATIBLE_SEMIHOSTING if TCG". >> Building qemu-system-mips configured with --without-default-devices: >> Undefined symbols for architecture arm64: >> =C2=A0 "_qemu_semihosting_console_write", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0 "_semihost_sys_close", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0 "_uaccess_strlen_user", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0 ... >> So this one has to use "select". >> Similarly m68k: >> Undefined symbols for architecture arm64: >> =C2=A0 "_semihost_sys_close", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _do_m68k_semihosting in target_m68k_m68k= -semi.c.o >> =C2=A0 ... >> I can link m68k using semihosting stubs but I'm not sure it is >> right: >> -- >8 -- >> diff --git a/semihosting/stubs-target-all.c >> b/semihosting/stubs-target-all.c >> new file mode 100644 >> index 0000000000..1f33173f43 >> --- /dev/null >> +++ b/semihosting/stubs-target-all.c >> @@ -0,0 +1,97 @@ >> +/* >> + * Semihosting Stubs >> + * >> + * Copyright (c) 2024 Linaro Ltd >> + * >> + * Stubs for semihosting targets that don't actually do semihosting. >> + * >> + * SPDX-License-Identifier: GPL-2.0-or-later >> + */ >> + >> +#include "qemu/osdep.h" >> +#include "exec/exec-all.h" >> +#include "semihosting/syscalls.h" >> + >> +void semihost_sys_open(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 target_ulon= g fname, target_ulong fname_len, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int gdb_fla= gs, int mode) >> +{ >> +} >> + >> +void semihost_sys_close(CPUState *cs, gdb_syscall_complete_cb >> complete, int fd) >> +{ >> +} >> + >> +void semihost_sys_read_gf(CPUState *cs, gdb_syscall_complete_cb complet= e, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 GuestFD *gf, target_ulong buf, target_ulong len) >> +{ >> +} >> + >> +void semihost_sys_read(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int fd, tar= get_ulong buf, target_ulong len) >> +{ >> +} >> + >> +void semihost_sys_write_gf(CPUState *cs, gdb_syscall_complete_cb comple= te, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 GuestFD *gf, target_ulong buf, >> target_ulong len) >> +{ >> +} >> + >> +void semihost_sys_write(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int f= d, target_ulong buf, target_ulong len) >> +{ >> +} >> + >> +void semihost_sys_lseek(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int f= d, int64_t off, int gdb_whence) >> +{ >> +} >> + >> +void semihost_sys_isatty(CPUState *cs, gdb_syscall_complete_cb >> complete, int fd) >> +{ >> +} >> + >> +void semihost_sys_flen(CPUState *cs, gdb_syscall_complete_cb fstat_cb, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 gdb_syscall= _complete_cb flen_cb, int fd, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 target_ulon= g fstat_addr) >> +{ >> +} >> + >> +void semihost_sys_fstat(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int f= d, target_ulong addr) >> +{ >> +} >> + >> +void semihost_sys_stat(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 target_ulon= g fname, target_ulong fname_len, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 target_ulon= g addr) >> +{ >> +} >> + >> +void semihost_sys_remove(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= target_ulong fname, target_ulong fname_len) >> +{ >> +} >> + >> +void semihost_sys_rename(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= target_ulong oname, target_ulong oname_len, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= target_ulong nname, target_ulong nname_len) >> +{ >> +} >> + >> +void semihost_sys_system(CPUState *cs, gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= target_ulong cmd, target_ulong cmd_len) >> +{ >> +} >> + >> +void semihost_sys_gettimeofday(CPUState *cs, >> gdb_syscall_complete_cb complete, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 target_ulong tv_addr, target_ulong tz_= addr) >> +{ >> +} >> + >> +#ifndef CONFIG_USER_ONLY >> +void semihost_sys_poll_one(CPUState *cs, gdb_syscall_complete_cb comple= te, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 int fd, GIOCondition cond, int timeout) >> +{ >> +} >> +#endif >> diff --git a/semihosting/meson.build b/semihosting/meson.build >> index 34933e5a19..aa8b7a9913 100644 >> --- a/semihosting/meson.build >> +++ b/semihosting/meson.build >> @@ -7,7 +7,7 @@ specific_ss.add(when: ['CONFIG_SEMIHOSTING', >> 'CONFIG_SYSTEM_ONLY'], if_true: fil >> =C2=A0=C2=A0 'config.c', >> =C2=A0=C2=A0 'console.c', >> =C2=A0=C2=A0 'uaccess.c', >> -)) >> +), if_false: files('stubs-target-all.c')) >> =C2=A0common_ss.add(when: ['CONFIG_SEMIHOSTING', 'CONFIG_SYSTEM_ONLY'], >> if_false: files('stubs-all.c')) >> =C2=A0system_ss.add(when: ['CONFIG_SEMIHOSTING'], if_false: >> files('stubs-system.c')) >> --- >> For mips more stubs are needed: >> Undefined symbols for architecture arm64: >> =C2=A0 "_qemu_semihosting_console_write", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0 "_uaccess_lock_user", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _uhi_fstat_cb in target_mips_tcg_sysemu_= mips-semi.c.o >> =C2=A0 "_uaccess_lock_user_string", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting.cold.6 in target_mips_= tcg_sysemu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting.cold.6 in target_mips_= tcg_sysemu_mips-semi.c.o >> =C2=A0 "_uaccess_strlen_user", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0 "_uaccess_unlock_user", referenced from: >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _mips_semihosting in target_mips_tcg_sys= emu_mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 _uhi_fstat_cb in target_mips_tcg_sysemu_= mips-semi.c.o >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ... >>=20 Oh sorry I was waiting for a re-spin. I should just apply the above to 3/3? --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro