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Thu, 11 Feb 2021 02:25:47 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id f3sm10231418wme.26.2021.02.11.02.25.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Feb 2021 02:25:46 -0800 (PST) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 198791FF7E; Thu, 11 Feb 2021 10:25:46 +0000 (GMT) References: <20210210221053.18050-1-alex.bennee@linaro.org> <20210210221053.18050-11-alex.bennee@linaro.org> <975bb94d-390a-c8d8-8880-313184664e3f@amsat.org> User-agent: mu4e 1.5.8; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Subject: Re: [PATCH v2 10/21] exec: Move TranslationBlock typedef to qemu/typedefs.h Date: Thu, 11 Feb 2021 10:24:19 +0000 In-reply-to: <975bb94d-390a-c8d8-8880-313184664e3f@amsat.org> Message-ID: <87zh0aucie.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Anthony Green , Richard Henderson , qemu-devel@nongnu.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, mahmoudabdalghany@outlook.com, Michael Walle , cota@braap.org, kuhn.chenqun@huawei.com, Paolo Bonzini , Guan Xuetao , "open list:ARM TCG CPUs" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Philippe Mathieu-Daud=C3=A9 writes: > On 2/10/21 11:10 PM, Alex Benn=C3=A9e wrote: >> From: Richard Henderson >>=20 >> This also means we don't need an extra declaration of >> the structure in hw/core/cpu.h. >>=20 >> Signed-off-by: Richard Henderson >> Signed-off-by: Alex Benn=C3=A9e >> Reviewed-by: Alex Benn=C3=A9e >> Message-Id: <20210208233906.479571-2-richard.henderson@linaro.org> > > I'd say this one matters ^, > >> Message-Id: <20210209182749.31323-2-alex.bennee@linaro.org> > > but this one less. My general approach to Message-Id's is to keep the one from where I snarfed the patch and the last Message-Id from whichever iteration of posting it's had. IOW the second one will be replaced by whatever the ID is of the parent post here. > >> --- >> include/exec/tb-context.h | 1 - >> include/hw/core/cpu.h | 4 +--- >> include/hw/core/tcg-cpu-ops.h | 3 +-- >> include/qemu/typedefs.h | 1 + >> target/arm/internals.h | 3 +-- >> target/cris/translate.c | 2 +- >> target/lm32/translate.c | 2 +- >> target/moxie/translate.c | 2 +- >> target/unicore32/translate.c | 2 +- >> 9 files changed, 8 insertions(+), 12 deletions(-) > > Reviewed-by: Philippe Mathieu-Daud=C3=A9 --=20 Alex Benn=C3=A9e