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Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH v2 01/19] ppc/pnv: Change the maximum of PHB3 devices for Power8NVL Content-Language: en-US To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org References: <20211213132830.108372-1-clg@kaod.org> <20211213132830.108372-2-clg@kaod.org> From: Daniel Henrique Barboza In-Reply-To: <20211213132830.108372-2-clg@kaod.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::72f (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::72f; envelope-from=danielhb413@gmail.com; helo=mail-qk1-x72f.google.com X-Spam_score_int: -50 X-Spam_score: -5.1 X-Spam_bar: ----- X-Spam_report: (-5.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, NICE_REPLY_A=-4.093, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frederic Barrat , Greg Kurz Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/13/21 10:28, Cédric Le Goater wrote: > The POWER8 processors with a NVLink logic unit have 4 PHB3 devices per > chip. > > Signed-off-by: Cédric Le Goater > --- Reviewed-by: Daniel Henrique Barboza > hw/ppc/pnv.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index 44ae41a9cb6b..6359bce549ca 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -1309,7 +1309,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) > > k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */ > k->cores_mask = POWER8_CORE_MASK; > - k->num_phbs = 3; > + k->num_phbs = 4; > k->core_pir = pnv_chip_core_pir_p8; > k->intc_create = pnv_chip_power8_intc_create; > k->intc_reset = pnv_chip_power8_intc_reset; >