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From: Auger Eric <eric.auger@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Markus Armbruster <armbru@redhat.com>,
	Peter Xu <peterx@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	bbhushan2@marvell.com, Eric Auger <eric.auger.pro@gmail.com>
Subject: Re: [PATCH v5 5/5] hw/arm/virt: Let the virtio-iommu bypass MSIs
Date: Fri, 26 Jun 2020 09:42:05 +0200	[thread overview]
Message-ID: <88ddd9da-f3bd-a7b3-c8c0-d7dc082e32a5@redhat.com> (raw)
In-Reply-To: <CAFEAcA_gDTuW_13a6MgC1XBMtR1XMkxAY39iUWRePp2U6Ow6XA@mail.gmail.com>

Hi Peter,

On 6/25/20 12:01 PM, Peter Maydell wrote:
> On Wed, 24 Jun 2020 at 14:27, Eric Auger <eric.auger@redhat.com> wrote:
>>
>> At the moment the virtio-iommu translates MSI transactions.
>> This behavior is inherited from ARM SMMU. The virt machine
>> code knows where the guest MSI doorbells are so we can easily
>> declare those regions as VIRTIO_IOMMU_RESV_MEM_T_MSI. With that
>> setting the guest will not map MSIs through the IOMMU and those
>> transactions will be simply bypassed.
>>
>> Depending on which MSI controller is in use (ITS or GICV2M),
>> we declare either:
>> - the ITS interrupt translation space (ITS_base + 0x10000),
>>   containing the GITS_TRANSLATOR or
>> - The GICV2M single frame, containing the MSI_SETSP_NS register.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
>>
> 
>>  static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev,
>>                                              DeviceState *dev, Error **errp)
>>  {
>> +    VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
>> +
>>      if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
>>          virt_memory_pre_plug(hotplug_dev, dev, errp);
>> +    } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
>> +        /* we declare a VIRTIO_IOMMU_RESV_MEM_T_MSI region */
>> +
>> +        if (vms->msi_controller == VIRT_MSI_CTRL_ITS) {
>> +            /* GITS_TRANSLATER page */
>> +            qdev_prop_set_uint32(dev, "len-reserved-regions", 1);
>> +            qdev_prop_set_string(dev, "reserved-regions[0]",
>> +                                 "0x8090000:0x809FFFF:1");
>> +        } else if (vms->msi_controller == VIRT_MSI_CTRL_GICV2M) {
>> +            /* MSI_SETSPI_NS page */
>> +            qdev_prop_set_uint32(dev, "len-reserved-regions", 1);
>> +            qdev_prop_set_string(dev, "reserved-regions[0]",
>> +                                 "0x8020000:0x8020FFF:1");
> 
> This hardcodes addresses and lengths that are in the
> base_memmap[] array for VIRT_GIC_ITS and VIRT_GIC_V2M,
> so it's setting up a bear trap if we ever decide to
> move those. Could we construct the string from the
> base_memmap[] array entry values instead, please ?
Sure

Eric
> 
> thanks
> -- PMM
> 



  reply	other threads:[~2020-06-26  7:43 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-24 13:26 [PATCH v5 0/5] VIRTIO-IOMMU probe request support and MSI bypass on ARM Eric Auger
2020-06-24 13:26 ` [PATCH v5 1/5] qdev: Introduce DEFINE_PROP_RESERVED_REGION Eric Auger
2020-06-24 13:26 ` [PATCH v5 2/5] virtio-iommu: Implement RESV_MEM probe request Eric Auger
2020-06-25  7:05   ` Markus Armbruster
2020-06-25 10:12     ` Peter Maydell
2020-06-26  7:42       ` Auger Eric
2020-06-26  7:41     ` Auger Eric
2020-06-26  8:53       ` Markus Armbruster
2020-06-26  9:09         ` Auger Eric
2020-06-24 13:26 ` [PATCH v5 3/5] virtio-iommu: Handle reserved regions in the translation process Eric Auger
2020-06-24 13:26 ` [PATCH v5 4/5] virtio-iommu-pci: Add array of Interval properties Eric Auger
2020-06-24 13:26 ` [PATCH v5 5/5] hw/arm/virt: Let the virtio-iommu bypass MSIs Eric Auger
2020-06-25 10:01   ` Peter Maydell
2020-06-26  7:42     ` Auger Eric [this message]
2020-06-24 13:47 ` [PATCH v5 0/5] VIRTIO-IOMMU probe request support and MSI bypass on ARM Michael S. Tsirkin
2020-06-26  7:56   ` Jean-Philippe Brucker
2020-06-24 15:16 ` Michael S. Tsirkin
2020-06-25 10:02   ` Peter Maydell

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