[PATCH for-8.2] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes

[PATCH for-8.2] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes

[Peter Maydell]

The syndrome register value always has an IL field at bit 25, which
is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32
bit instruction (or for exceptions which aren't traps on a known
instruction, like PC alignment faults). This means that our
syn_*() functions should always either take an is_16bit argument to
determine whether to set the IL bit, or else unconditionally set it.

We missed setting the IL bit for the syndrome for three kinds of trap:
 * an SVE access exception
 * a pointer authentication check failure
 * a BTI (branch target identification) check failure

All of these traps are AArch64 only, and so the instruction causing
the trap is always 64 bit. This means we can unconditionally set
the IL bit in the syn_*() function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
---
 target/arm/syndrome.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h
index 5d34755508d..95454b5b3bb 100644
--- a/target/arm/syndrome.h
+++ b/target/arm/syndrome.h
@@ -216,7 +216,7 @@ static inline uint32_t syn_simd_access_trap(int cv, int cond, bool is_16bit)
 
 static inline uint32_t syn_sve_access_trap(void)
 {
-    return EC_SVEACCESSTRAP << ARM_EL_EC_SHIFT;
+    return (EC_SVEACCESSTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL;
 }
 
 /*
@@ -242,12 +242,12 @@ static inline uint32_t syn_pacfail(bool data, int keynumber)
 
 static inline uint32_t syn_pactrap(void)
 {
-    return EC_PACTRAP << ARM_EL_EC_SHIFT;
+    return (EC_PACTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL;
 }
 
 static inline uint32_t syn_btitrap(int btype)
 {
-    return (EC_BTITRAP << ARM_EL_EC_SHIFT) | btype;
+    return (EC_BTITRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL | btype;
 }
 
 static inline uint32_t syn_bxjtrap(int cv, int cond, int rm)
-- 
2.34.1

Re: [PATCH for-8.2] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes

[Richard Henderson]

On 11/20/23 07:01, Peter Maydell wrote:
> The syndrome register value always has an IL field at bit 25, which
> is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32
> bit instruction (or for exceptions which aren't traps on a known
> instruction, like PC alignment faults). This means that our
> syn_*() functions should always either take an is_16bit argument to
> determine whether to set the IL bit, or else unconditionally set it.
> 
> We missed setting the IL bit for the syndrome for three kinds of trap:
>   * an SVE access exception
>   * a pointer authentication check failure
>   * a BTI (branch target identification) check failure
> 
> All of these traps are AArch64 only, and so the instruction causing
> the trap is always 64 bit. This means we can unconditionally set
> the IL bit in the syn_*() function.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> Cc: qemu-stable@nongnu.org
> ---
>   target/arm/syndrome.h | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~