From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1breeM-0005LC-U3 for qemu-devel@nongnu.org; Wed, 05 Oct 2016 01:21:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1breeH-0002G1-Oh for qemu-devel@nongnu.org; Wed, 05 Oct 2016 01:21:50 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:56780 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1breeH-0002FS-JC for qemu-devel@nongnu.org; Wed, 05 Oct 2016 01:21:45 -0400 Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u955JTRW085121 for ; Wed, 5 Oct 2016 01:21:44 -0400 Received: from e23smtp04.au.ibm.com (e23smtp04.au.ibm.com [202.81.31.146]) by mx0a-001b2d01.pphosted.com with ESMTP id 25vpmdgvj5-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 05 Oct 2016 01:21:44 -0400 Received: from localhost by e23smtp04.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 5 Oct 2016 15:21:39 +1000 References: <1475041518-9757-1-git-send-email-raji@linux.vnet.ibm.com> <1475041518-9757-3-git-send-email-raji@linux.vnet.ibm.com> <443643e4-26c4-d049-c521-fc8a15da663f@twiddle.net> From: Rajalakshmi Srinivasaraghavan Date: Wed, 5 Oct 2016 10:51:33 +0530 MIME-Version: 1.0 In-Reply-To: <443643e4-26c4-d049-c521-fc8a15da663f@twiddle.net> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Message-Id: <897d84d4-9b85-4d03-a117-555da740b48c@linux.vnet.ibm.com> Subject: Re: [Qemu-devel] [PATCH 2/6] target-ppc: add vextu[bhw]lx instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, benh@kernel.crashing.org, Avinesh Kumar On 09/28/2016 10:24 PM, Richard Henderson wrote: > On 09/27/2016 10:45 PM, Rajalakshmi Srinivasaraghavan wrote: >> +#if defined(HOST_WORDS_BIGENDIAN) >> +#define VEXTULX_DO(name, elem) \ >> +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ >> +{ \ >> + target_ulong r = 0; \ >> + int i; \ >> + int index = a & 0xf; \ >> + for (i = 0; i < elem; i++) { \ >> + r = r << 8; \ >> + if (index + i <= 15) { \ >> + r = r | b->u8[index + i]; \ >> + } \ >> + } \ >> + return r; \ >> +} >> +#else >> +#define VEXTULX_DO(name, elem) \ >> +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ >> +{ \ >> + target_ulong r = 0; \ >> + int i; \ >> + int index = 15 - (a & 0xf); \ >> + for (i = 0; i < elem; i++) { \ >> + r = r << 8; \ >> + if (index - i >= 0) { \ >> + r = r | b->u8[index - i]; \ >> + } \ >> + } \ >> + return r; \ >> +} >> +#endif >> + >> +VEXTULX_DO(vextublx, 1) >> +VEXTULX_DO(vextuhlx, 2) >> +VEXTULX_DO(vextuwlx, 4) >> +#undef VEXTULX_DO > Ew. > > This should be one 128-bit shift and one and. > > Since the shift amount is a multiple of 8, the 128-bit shift for vextub[lr]x > does not need to cross a double-word boundary, and so can be decomposed into > one 64-bit shift of (count & 64 ? hi : lo). > > For vextu[hw]lr]x, you'd need to do the whole left-shift, right-shift, or thing. > > But still, fantastically better than a loop. Ack. Will send an updated patch. > > > r~ > > -- Thanks Rajalakshmi S