From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Bernhard Beschow" <shentey@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PULL v2 48/78] hw/isa/piix3: Create IDE controller in host device
Date: Thu, 19 Oct 2023 14:23:18 -0400 [thread overview]
Message-ID: <89e8173cef14961f548d3ec93754782bf3966e74.1697739629.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1697739629.git.mst@redhat.com>
From: Bernhard Beschow <shentey@gmail.com>
The IDE controller is an integral part of PIIX3 (function 1). So create it as
part of the south bridge.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-12-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/southbridge/piix.h | 2 ++
hw/i386/pc_piix.c | 13 ++++++-------
hw/isa/piix3.c | 9 +++++++++
hw/i386/Kconfig | 1 -
hw/isa/Kconfig | 1 +
5 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index b07ff6bb26..1daeff397c 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -13,6 +13,7 @@
#define HW_SOUTHBRIDGE_PIIX_H
#include "hw/pci/pci_device.h"
+#include "hw/ide/pci.h"
#include "hw/rtc/mc146818rtc.h"
/* PIRQRC[A:D]: PIRQx Route Control Registers */
@@ -52,6 +53,7 @@ struct PIIXState {
int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
MC146818RtcState rtc;
+ PCIIDEState ide;
/* Reset Control Register contents */
uint8_t rcr;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 5988656279..c98a997482 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -43,7 +43,6 @@
#include "net/net.h"
#include "hw/ide/isa.h"
#include "hw/ide/pci.h"
-#include "hw/ide/piix.h"
#include "hw/irq.h"
#include "sysemu/kvm.h"
#include "hw/i386/kvm/clock.h"
@@ -290,6 +289,10 @@ static void pc_init1(MachineState *machine,
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
+ dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
+ pci_ide_create_devs(PCI_DEVICE(dev));
+ idebus[0] = qdev_get_child_bus(dev, "ide.0");
+ idebus[1] = qdev_get_child_bus(dev, "ide.1");
} else {
isa_bus = isa_bus_new(NULL, system_memory, system_io,
&error_abort);
@@ -301,6 +304,8 @@ static void pc_init1(MachineState *machine,
i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
+ idebus[0] = NULL;
+ idebus[1] = NULL;
}
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
@@ -329,12 +334,6 @@ static void pc_init1(MachineState *machine,
pc_nic_init(pcmc, isa_bus, pci_bus);
if (pcmc->pci_enabled) {
- PCIDevice *dev;
-
- dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE);
- pci_ide_create_devs(dev);
- idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
- idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
}
#ifdef CONFIG_IDE_ISA
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 11d72ca2bb..3f1dabade0 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -29,6 +29,7 @@
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "hw/ide/piix.h"
#include "hw/isa/isa.h"
#include "sysemu/runstate.h"
#include "migration/vmstate.h"
@@ -265,6 +266,7 @@ static const MemoryRegionOps rcr_ops = {
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
PIIX3State *d = PIIX3_PCI_DEVICE(dev);
+ PCIBus *pci_bus = pci_get_bus(dev);
ISABus *isa_bus;
uint32_t irq;
@@ -290,6 +292,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
}
irq = object_property_get_uint(OBJECT(&d->rtc), "irq", &error_fatal);
isa_connect_gpio_out(ISA_DEVICE(&d->rtc), 0, irq);
+
+ /* IDE */
+ qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1);
+ if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) {
+ return;
+ }
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
@@ -321,6 +329,7 @@ static void pci_piix3_init(Object *obj)
ISA_NUM_IRQS);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
+ object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
}
static void pci_piix3_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig
index 9051083c1e..ade817f1b6 100644
--- a/hw/i386/Kconfig
+++ b/hw/i386/Kconfig
@@ -73,7 +73,6 @@ config I440FX
select PC_ACPI
select PCI_I440FX
select PIIX3
- select IDE_PIIX
select DIMM
select SMBIOS
select FW_CFG_DMA
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index c10cbc5fc1..28345edbb3 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -34,6 +34,7 @@ config PC87312
config PIIX3
bool
select I8257
+ select IDE_PIIX
select ISA_BUS
select MC146818RTC
--
MST
next prev parent reply other threads:[~2023-10-19 18:33 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-19 18:24 [PULL v2 00/78] virtio,pc,pci: features, cleanups Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 01/78] vdpa: Use iovec for vhost_vdpa_net_cvq_add() Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 02/78] vdpa: Avoid using vhost_vdpa_net_load_*() outside vhost_vdpa_net_load() Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 03/78] vdpa: Check device ack in vhost_vdpa_net_load_rx_mode() Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 04/78] vdpa: Move vhost_svq_poll() to the caller of vhost_vdpa_net_cvq_add() Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 05/78] vdpa: Introduce cursors to vhost_vdpa_net_loadx() Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 06/78] vhost: Expose vhost_svq_available_slots() Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 07/78] vdpa: Send cvq state load commands in parallel Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 08/78] tests: test-smp-parse: Add the test for cores/threads per socket helpers Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 09/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 count test Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 10/78] tests: bios-tables-test: Add test for smbios type4 count Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 11/78] tests: bios-tables-test: Add ACPI table binaries for smbios type4 count test Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 12/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 core " Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 13/78] tests: bios-tables-test: Add test for smbios type4 core count Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 14/78] tests: bios-tables-test: Add ACPI table binaries for smbios type4 core count test Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 15/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 core count2 test Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 16/78] tests: bios-tables-test: Extend smbios core count2 test to cover general topology Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 17/78] tests: bios-tables-test: Update ACPI table binaries for smbios core count2 test Michael S. Tsirkin
2023-10-19 18:21 ` [PULL v2 18/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 thread count test Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 19/78] tests: bios-tables-test: Add test for smbios type4 thread count Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 20/78] tests: bios-tables-test: Add ACPI table binaries for smbios type4 thread count test Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 21/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 thread count2 test Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 22/78] tests: bios-tables-test: Add test for smbios type4 thread count2 Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 23/78] tests: bios-tables-test: Add ACPI table binaries for smbios type4 thread count2 test Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 24/78] vhost-user: strip superfluous whitespace Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 25/78] vhost-user: tighten "reply_supported" scope in "set_vring_addr" Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 26/78] vhost-user: factor out "vhost_user_write_sync" Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 27/78] vhost-user: flatten "enforce_reply" into "vhost_user_write_sync" Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 28/78] vhost-user: hoist "write_sync", "get_features", "get_u64" Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 29/78] vhost-user: allow "vhost_set_vring" to wait for a reply Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 30/78] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 31/78] memory: initialize 'fv' in MemoryRegionCache to make Coverity happy Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 32/78] vhost-user: do not send RESET_OWNER on device reset Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 33/78] vhost-backend: remove vhost_kernel_reset_device() Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 34/78] virtio: call ->vhost_reset_device() during reset Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 35/78] hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers being identical Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 36/78] timer/i8254: Fix one shot PIT mode Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 37/78] hw/display: fix memleak from virtio_add_resource Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 38/78] hw/i386/pc: Merge two if statements into one Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 39/78] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 40/78] hw/i386/pc_piix: Assign PIIX3's ISA interrupts before its realize() Michael S. Tsirkin
2023-10-19 18:22 ` [PULL v2 41/78] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 42/78] hw/i386/pc_piix: Wire PIIX3's ISA interrupts by new "isa-irqs" property Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 43/78] hw/i386/pc_piix: Remove redundant "piix3" variable Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 44/78] hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in" Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 45/78] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize() Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 46/78] hw/isa/piix3: Wire PIC IRQs to ISA bus in host device Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 47/78] hw/i386/pc: Wire RTC ISA IRQs in south bridges Michael S. Tsirkin
2023-10-19 18:23 ` Michael S. Tsirkin [this message]
2023-10-19 18:23 ` [PULL v2 49/78] hw/isa/piix3: Create USB controller in host device Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 50/78] hw/isa/piix3: Create power management " Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 51/78] hw/isa/piix3: Drop the "3" from PIIX base class name Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 52/78] hw/isa/piix4: Remove unused inbound ISA interrupt lines Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 53/78] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in" Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 54/78] hw/isa/piix4: Rename reset control operations to match PIIX3 Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 55/78] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 56/78] hw/isa/piix3: Merge hw/isa/piix4.c Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 57/78] hw/isa/piix: Allow for optional PIC creation in PIIX3 Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 58/78] hw/isa/piix: Allow for optional PIT " Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 59/78] hw/isa/piix: Harmonize names of reset control memory regions Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 60/78] hw/isa/piix: Share PIIX3's base class with PIIX4 Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 61/78] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 62/78] hw/isa/piix: Rename functions to be shared for PCI interrupt triggering Michael S. Tsirkin
2023-10-19 18:23 ` [PULL v2 63/78] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4 Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 64/78] hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 65/78] hw/isa/piix: Implement multi-process QEMU support also for PIIX4 Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 66/78] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 67/78] vhost-user-common: send get_inflight_fd once Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 68/78] vhost: move and rename the conn retry times Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 69/78] vhost-user-scsi: support reconnect to backend Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 70/78] vhost-user-scsi: start vhost when guest kicks Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 71/78] vhost-user: fix lost reconnect Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 72/78] hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 73/78] tests/acpi: Allow update of DSDT.cxl Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 74/78] hw/cxl: Add QTG _DSM support for ACPI0017 device Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 75/78] tests/acpi: Update DSDT.cxl with QTG DSM Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 76/78] vhost-user: Fix protocol feature bit conflict Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 77/78] MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section Michael S. Tsirkin
2023-10-19 18:24 ` [PULL v2 78/78] intel-iommu: Report interrupt remapping faults, fix return value Michael S. Tsirkin
2023-10-20 16:00 ` [PULL v2 00/78] virtio,pc,pci: features, cleanups Stefan Hajnoczi
2023-10-23 11:38 ` Michael S. Tsirkin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=89e8173cef14961f548d3ec93754782bf3966e74.1697739629.git.mst@redhat.com \
--to=mst@redhat.com \
--cc=aurelien@aurel32.net \
--cc=eduardo@habkost.net \
--cc=hpoussin@reactos.org \
--cc=marcel.apfelbaum@gmail.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=shentey@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).