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[50.78.183.178]) by smtp.gmail.com with ESMTPSA id o10sm7394576pfh.67.2021.05.29.17.54.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 May 2021 17:54:54 -0700 (PDT) Subject: Re: [PATCH] target/mips: Raise exception when DINSV opcode used with DSP disabled To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org References: <20210529165443.1114402-1-f4bug@amsat.org> From: Richard Henderson Message-ID: <8a297f82-ed18-b974-b7a7-eca8d4a46817@linaro.org> Date: Sat, 29 May 2021 17:54:52 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210529165443.1114402-1-f4bug@amsat.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Aurelien Jarno , Jia Liu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 5/29/21 9:54 AM, Philippe Mathieu-Daudé wrote: > Per the "MIPS® DSP Module for MIPS64 Architecture" manual, rev. 3.02, > Table 5.3 "SPECIAL3 Encoding of Function Field for DSP Module": > > If the Module/ASE is not implemented, executing such an instruction > must cause a Reserved Instruction Exception. > > The DINSV instruction lists the following exceptions: > - Reserved Instruction > - DSP Disabled > > If the MIPS core doesn't support the DSP module, or the DSP is > disabled, do not handle the '$rt = $0' case as a no-op but raise > the proper exception instead. > > Cc: Jia Liu > Fixes: 1cb6686cf92 ("target-mips: Add ASE DSP bit/manipulation instructions") > Signed-off-by: Philippe Mathieu-Daudé > --- > target/mips/tcg/translate.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~