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[50.78.183.178]) by smtp.gmail.com with ESMTPSA id d139-20020a621d91000000b00505aa0d10desm400411pfd.0.2022.04.21.18.47.58 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 21 Apr 2022 18:47:59 -0700 (PDT) Message-ID: <8a2daad5-c23a-1fe4-3028-25aa53e2dbdc@linaro.org> Date: Thu, 21 Apr 2022 18:47:56 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PULL 0/7] target/rx patch queue Content-Language: en-US From: Richard Henderson To: qemu-devel@nongnu.org References: <20220421173114.48357-1-richard.henderson@linaro.org> In-Reply-To: <20220421173114.48357-1-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/21/22 10:31, Richard Henderson wrote: > The following changes since commit 401d46789410e88e9e90d76a11f46e8e9f358d55: > > Merge tag 'pull-target-arm-20220421' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-04-21 08:04:43 -0700) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-rx-20220421 > > for you to fetch changes up to 724eaecec6d22cf3842f896684bdc5b79492f093: > > target/rx: update PC correctly in wait instruction (2022-04-21 10:09:12 -0700) > > ---------------------------------------------------------------- > Fix usp/isp swapping upon clrpsw/setpsw. > Fix psw.i/pc upon wait. > Align dtb in ram. Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate. r~ > > ---------------------------------------------------------------- > Richard Henderson (4): > target/rx: Put tb_flags into DisasContext > target/rx: Store PSW.U in tb->flags > target/rx: Move DISAS_UPDATE check for write to PSW > target/rx: Swap stack pointers on clrpsw/setpsw instruction > > Tomoaki Kawada (2): > target/rx: set PSW.I when executing wait instruction > target/rx: update PC correctly in wait instruction > > Yoshinori Sato (1): > hw/rx: rx-gdbsim DTB load address aligned of 16byte. > > target/rx/cpu.h | 1 + > hw/rx/rx-gdbsim.c | 2 +- > target/rx/op_helper.c | 1 + > target/rx/translate.c | 69 +++++++++++++++++++++++++++------------------------ > 4 files changed, 40 insertions(+), 33 deletions(-)