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From: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
To: Alistair Francis <alistair.francis@opensource.wdc.com>,
	qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: bmeng.cn@gmail.com, palmer@dabbelt.com, alistair.francis@wdc.com,
	alistair23@gmail.com, richard.henderson@linaro.org
Subject: Re: [PATCH] target/riscv: pmp: Fixup TLB size calculation
Date: Wed, 12 Oct 2022 10:50:48 +0800	[thread overview]
Message-ID: <8ac0e17f-b902-6553-acdb-6ec0c4bfafab@linux.alibaba.com> (raw)
In-Reply-To: <20221012011449.506928-1-alistair.francis@opensource.wdc.com>

Reviewed-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>

By the way, we missed one related patch that once had been picked to riscv-next patch.

The patch v3:
https://lore.kernel.org/all/ceeb4037-6d17-0a09-f35a-eaf3280339bb@c-sky.com/T/#m183e4430bda408bc3a2b2751aa94eff7fc02e23c

The patch v4:
https://lists.gnu.org/archive/html/qemu-devel/2021-12/msg02854.html

I think the patch v4 should be taken at the same time with this patch.

Thanks,
Zhiwei

On 2022/10/12 9:14, Alistair Francis wrote:
> From: Alistair Francis <alistair.francis@wdc.com>
>
> Since commit 4047368938f6 "accel/tcg: Introduce tlb_set_page_full" we
> have been seeing this assert
>
>      ../accel/tcg/cputlb.c:1294: tlb_set_page_with_attrs: Assertion `is_power_of_2(size)' failed.
>
> When running Tock on the OpenTitan machine.
>
> The issue is that pmp_get_tlb_size() would return a TLB size that wasn't
> a power of 2. The size was also smaller then TARGET_PAGE_SIZE.
>
> This patch ensures that any TLB size less then TARGET_PAGE_SIZE is
> rounded down to 1 to ensure it's a valid size.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> This is based on advice from Richard:
> https://patchwork.kernel.org/project/qemu-devel/patch/20221004141051.110653-9-richard.henderson@linaro.org/#25043166
>
>   target/riscv/pmp.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
>
> diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
> index ea2b67d947..2b43e399b8 100644
> --- a/target/riscv/pmp.c
> +++ b/target/riscv/pmp.c
> @@ -628,6 +628,18 @@ bool pmp_is_range_in_tlb(CPURISCVState *env, hwaddr tlb_sa,
>       }
>   
>       if (*tlb_size != 0) {
> +        /*
> +         * At this point we have a tlb_size that is the smallest possible size
> +         * That fits within a TARGET_PAGE_SIZE and the PMP region.
> +         *
> +         * If the size is less then TARGET_PAGE_SIZE we drop the size to 1.
> +         * This means the result isn't cached in the TLB and is only used for
> +         * a single translation.
> +         */
> +        if (*tlb_size < TARGET_PAGE_SIZE) {
> +            *tlb_size = 1;
> +        }
> +
>           return true;
>       }
>   


  reply	other threads:[~2022-10-12  2:52 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-12  1:14 [PATCH] target/riscv: pmp: Fixup TLB size calculation Alistair Francis
2022-10-12  2:50 ` LIU Zhiwei [this message]
2022-10-12  3:09   ` Alistair Francis
2022-10-12  6:04     ` LIU Zhiwei
2022-10-13 18:16 ` Richard Henderson
2022-10-14  4:36 ` Alistair Francis

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