From: Richard Henderson <richard.henderson@linaro.org>
To: "Michael Rolnik" <mrolnik@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>,
Sarah Harris <S.E.Harris@kent.ac.uk>,
Joaquin de Andres <me@xcancerberox.com.ar>,
QEMU Developers <qemu-devel@nongnu.org>,
Pavel Dovgalyuk <dovgaluk@ispras.ru>,
Igor Mammedov <imammedo@redhat.com>,
Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Subject: Re: [PATCH v41 01/21] target/avr: Add outward facing interfaces and core CPU logic
Date: Mon, 23 Mar 2020 11:03:09 -0700 [thread overview]
Message-ID: <8ac9a03a-a02f-1b48-c75d-77e4b8aea9ef@linaro.org> (raw)
In-Reply-To: <CAK4993ie33Awp=sqUOcubqCLFqTd5mTPAkWQfhh3zvorMwnSig@mail.gmail.com>
On 3/23/20 10:03 AM, Michael Rolnik wrote:
> Hi Philippe.
>
> It's been a while. let me think about it and get back to you. what is your
> concern ?
It shouldn't be there. See commit 1f5c00cfdb81.
> > + memset(env->r, 0, sizeof(env->r));
> > +
> > + tlb_flush(cs);
>
> Why are you calling tlb_flush() here?
r~
next prev parent reply other threads:[~2020-03-23 18:04 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-18 19:13 [PATCH v41 00/21] QEMU AVR 8 bit cores Michael Rolnik
2020-01-18 19:13 ` [PATCH v41 01/21] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2020-03-23 15:55 ` Philippe Mathieu-Daudé
2020-03-23 17:03 ` Michael Rolnik
2020-03-23 18:03 ` Richard Henderson [this message]
2020-03-23 19:19 ` Philippe Mathieu-Daudé
2020-03-23 20:14 ` Michael Rolnik
2020-04-12 9:14 ` Michael Rolnik
2020-04-15 6:25 ` Philippe Mathieu-Daudé
2020-01-18 19:13 ` [PATCH v41 02/21] target/avr: Add instruction helpers Michael Rolnik
2020-01-18 19:13 ` [PATCH v41 03/21] target/avr: Add instruction translation - Registers definition Michael Rolnik
2020-01-18 19:13 ` [PATCH v41 04/21] target/avr: Add instruction translation - Arithmetic and Logic Instructions Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 05/21] target/avr: Add instruction translation - Branch Instructions Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 06/21] target/avr: Add instruction translation - Data Transfer Instructions Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 07/21] target/avr: Add instruction translation - Bit and Bit-test Instructions Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 08/21] target/avr: Add instruction translation - MCU Control Instructions Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 09/21] target/avr: Add instruction translation - CPU main translation function Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 10/21] target/avr: Add instruction disassembly function Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 11/21] hw/avr: Add limited support for USART peripheral Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 12/21] hw/avr: Add limited support for 16 bit timer peripheral Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 13/21] hw/avr: Add dummy mask device Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 14/21] hw/avr: Add example board configuration Michael Rolnik
2020-01-21 16:36 ` Igor Mammedov
2020-01-21 17:03 ` Philippe Mathieu-Daudé
2020-01-18 19:14 ` [PATCH v41 15/21] target/avr: Add section about AVR into QEMU documentation Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 16/21] target/avr: Register AVR support with the rest of QEMU Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 17/21] target/avr: Add machine none test Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 18/21] target/avr: Update build system Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 19/21] target/avr: Add boot serial test Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 20/21] target/avr: Add Avocado test Michael Rolnik
2020-01-18 19:14 ` [PATCH v41 21/21] target/avr: Update MAINTAINERS file Michael Rolnik
2020-01-20 22:10 ` [PATCH v41 00/21] QEMU AVR 8 bit cores Philippe Mathieu-Daudé
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