From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: Re: [PATCH] target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS
Date: Mon, 7 Aug 2023 13:39:35 -0700 [thread overview]
Message-ID: <8bf33fec-b26c-1f48-d817-319f17b3ad93@linaro.org> (raw)
In-Reply-To: <20230807150618.101357-1-peter.maydell@linaro.org>
On 8/7/23 08:06, Peter Maydell wrote:
> The architecture requires (R_TYTWB) that an attempt to return from EL3
> when SCR_EL3.{NSE,NS} are {1,0} is an illegal exception return. (This
> enforces that the CPU can't ever be executing below EL3 with the
> NSE,NS bits indicating an invalid security state.)
>
> We were missing this check; add it.
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
> target/arm/tcg/helper-a64.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
prev parent reply other threads:[~2023-08-07 20:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-07 15:06 [PATCH] target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS Peter Maydell
2023-08-07 20:39 ` Richard Henderson [this message]
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