From: Paolo Bonzini <pbonzini@redhat.com>
To: Cao jin <caoj.fnst@cn.fujitsu.com>,
qemu-trivial <qemu-trivial@nongnu.org>,
Michael Tokarev <mjt@tls.msk.ru>
Cc: mst@redhat.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] pci_register_bar: cleanup
Date: Wed, 18 May 2016 14:17:20 +0200 [thread overview]
Message-ID: <8c278e28-6afe-b02e-5a92-2c05ddf2f532@redhat.com> (raw)
In-Reply-To: <573C5D39.10404@cn.fujitsu.com>
On 18/05/2016 14:16, Cao jin wrote:
> I guess maybe this one is more suitable for trivial.
No, it's not trivial. I guess it missed soft freeze. Michael Tsirkin
will pick it up.
Thanks,
Paolo
>>>>> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
>>>>> index e67664d..f0f41dc 100644
>>>>> --- a/hw/pci/pci.c
>>>>> +++ b/hw/pci/pci.c
>>>>> @@ -974,7 +974,7 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
>>>>> uint8_t type, MemoryRegion *memory)
>>>>> {
>>>>> PCIIORegion *r;
>>>>> - uint32_t addr;
>>>>> + uint32_t addr; /* offset in pci config space */
>>>>> uint64_t wmask;
>>>>> pcibus_t size = memory_region_size(memory);
>>>>>
>>>>> @@ -990,15 +990,20 @@ void pci_register_bar(PCIDevice *pci_dev, int
>>>>> region_num,
>>>>> r->addr = PCI_BAR_UNMAPPED;
>>>>> r->size = size;
>>>>> r->type = type;
>>>>> - r->memory = NULL;
>>>>> + r->memory = memory;
>>>>> + r->address_space = type & PCI_BASE_ADDRESS_SPACE_IO
>>>>> + ? pci_dev->bus->address_space_io
>>>>> + : pci_dev->bus->address_space_mem;
>>>>>
>>>>> wmask = ~(size - 1);
>>>>> - addr = pci_bar(pci_dev, region_num);
>>>>> if (region_num == PCI_ROM_SLOT) {
>>>>> /* ROM enable bit is writable */
>>>>> wmask |= PCI_ROM_ADDRESS_ENABLE;
>>>>> }
>>>>> +
>>>>> + addr = pci_bar(pci_dev, region_num);
>>>>> pci_set_long(pci_dev->config + addr, type);
>>>>> +
>>>>> if (!(r->type & PCI_BASE_ADDRESS_SPACE_IO) &&
>>>>> r->type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
>>>>> pci_set_quad(pci_dev->wmask + addr, wmask);
>>>>> @@ -1007,11 +1012,6 @@ void pci_register_bar(PCIDevice *pci_dev, int
>>>>> region_num,
>>>>> pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff);
>>>>> pci_set_long(pci_dev->cmask + addr, 0xffffffff);
>>>>> }
>>>>> - pci_dev->io_regions[region_num].memory = memory;
>>>>> - pci_dev->io_regions[region_num].address_space
>>>>> - = type & PCI_BASE_ADDRESS_SPACE_IO
>>>>> - ? pci_dev->bus->address_space_io
>>>>> - : pci_dev->bus->address_space_mem;
>>>>> }
>>>>>
>>>>> static void pci_update_vga(PCIDevice *pci_dev)
>>>>>
>>>>
>>>> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
next prev parent reply other threads:[~2016-05-18 12:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-25 6:49 [Qemu-devel] [PATCH] pci_register_bar: cleanup Cao jin
2016-03-25 9:25 ` Paolo Bonzini
2016-05-12 1:39 ` Cao jin
2016-05-18 1:38 ` Cao jin
2016-05-18 12:16 ` Cao jin
2016-05-18 12:17 ` Paolo Bonzini [this message]
2016-05-18 12:27 ` Cao jin
2016-05-18 12:31 ` Michael S. Tsirkin
2016-06-20 3:31 ` Cao jin
2016-07-01 2:55 ` Cao jin
2016-03-28 5:55 ` Marcel Apfelbaum
2016-04-09 9:16 ` Cao jin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8c278e28-6afe-b02e-5a92-2c05ddf2f532@redhat.com \
--to=pbonzini@redhat.com \
--cc=caoj.fnst@cn.fujitsu.com \
--cc=mjt@tls.msk.ru \
--cc=mst@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-trivial@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).