From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60684) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b30Pu-00037T-Q1 for qemu-devel@nongnu.org; Wed, 18 May 2016 08:17:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b30Pq-000458-Fb for qemu-devel@nongnu.org; Wed, 18 May 2016 08:17:33 -0400 References: <1458888577-12477-1-git-send-email-caoj.fnst@cn.fujitsu.com> <56F5041C.2060307@redhat.com> <5733DEDF.90606@cn.fujitsu.com> <573BC79F.4070602@cn.fujitsu.com> <573C5D39.10404@cn.fujitsu.com> From: Paolo Bonzini Message-ID: <8c278e28-6afe-b02e-5a92-2c05ddf2f532@redhat.com> Date: Wed, 18 May 2016 14:17:20 +0200 MIME-Version: 1.0 In-Reply-To: <573C5D39.10404@cn.fujitsu.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] pci_register_bar: cleanup List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Cao jin , qemu-trivial , Michael Tokarev Cc: mst@redhat.com, qemu-devel@nongnu.org On 18/05/2016 14:16, Cao jin wrote: > I guess maybe this one is more suitable for trivial. No, it's not trivial. I guess it missed soft freeze. Michael Tsirkin will pick it up. Thanks, Paolo >>>>> diff --git a/hw/pci/pci.c b/hw/pci/pci.c >>>>> index e67664d..f0f41dc 100644 >>>>> --- a/hw/pci/pci.c >>>>> +++ b/hw/pci/pci.c >>>>> @@ -974,7 +974,7 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, >>>>> uint8_t type, MemoryRegion *memory) >>>>> { >>>>> PCIIORegion *r; >>>>> - uint32_t addr; >>>>> + uint32_t addr; /* offset in pci config space */ >>>>> uint64_t wmask; >>>>> pcibus_t size = memory_region_size(memory); >>>>> >>>>> @@ -990,15 +990,20 @@ void pci_register_bar(PCIDevice *pci_dev, int >>>>> region_num, >>>>> r->addr = PCI_BAR_UNMAPPED; >>>>> r->size = size; >>>>> r->type = type; >>>>> - r->memory = NULL; >>>>> + r->memory = memory; >>>>> + r->address_space = type & PCI_BASE_ADDRESS_SPACE_IO >>>>> + ? pci_dev->bus->address_space_io >>>>> + : pci_dev->bus->address_space_mem; >>>>> >>>>> wmask = ~(size - 1); >>>>> - addr = pci_bar(pci_dev, region_num); >>>>> if (region_num == PCI_ROM_SLOT) { >>>>> /* ROM enable bit is writable */ >>>>> wmask |= PCI_ROM_ADDRESS_ENABLE; >>>>> } >>>>> + >>>>> + addr = pci_bar(pci_dev, region_num); >>>>> pci_set_long(pci_dev->config + addr, type); >>>>> + >>>>> if (!(r->type & PCI_BASE_ADDRESS_SPACE_IO) && >>>>> r->type & PCI_BASE_ADDRESS_MEM_TYPE_64) { >>>>> pci_set_quad(pci_dev->wmask + addr, wmask); >>>>> @@ -1007,11 +1012,6 @@ void pci_register_bar(PCIDevice *pci_dev, int >>>>> region_num, >>>>> pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff); >>>>> pci_set_long(pci_dev->cmask + addr, 0xffffffff); >>>>> } >>>>> - pci_dev->io_regions[region_num].memory = memory; >>>>> - pci_dev->io_regions[region_num].address_space >>>>> - = type & PCI_BASE_ADDRESS_SPACE_IO >>>>> - ? pci_dev->bus->address_space_io >>>>> - : pci_dev->bus->address_space_mem; >>>>> } >>>>> >>>>> static void pci_update_vga(PCIDevice *pci_dev) >>>>> >>>> >>>> Reviewed-by: Paolo Bonzini