From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: Matheus Ferst <matheus.ferst@eldorado.org.br>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, david@gibson.dropbear.id.au, groug@kaod.org,
farosas@linux.ibm.com
Subject: Re: [PATCH 6/6] target/ppc: move msgsync to decodetree
Date: Wed, 19 Oct 2022 17:59:38 -0300 [thread overview]
Message-ID: <8c308e1f-6051-2eeb-2e92-473991a60187@gmail.com> (raw)
In-Reply-To: <20221006200654.725390-7-matheus.ferst@eldorado.org.br>
On 10/6/22 17:06, Matheus Ferst wrote:
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> target/ppc/insn32.decode | 1 +
> target/ppc/translate.c | 14 --------------
> target/ppc/translate/processor-ctrl-impl.c.inc | 9 +++++++++
> 3 files changed, 10 insertions(+), 14 deletions(-)
>
> diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
> index 5ba4a6807d..70a3b4de5e 100644
> --- a/target/ppc/insn32.decode
> +++ b/target/ppc/insn32.decode
> @@ -915,3 +915,4 @@ MSGCLR 011111 ----- ----- ..... 0011101110 - @X_rb
> MSGSND 011111 ----- ----- ..... 0011001110 - @X_rb
> MSGCLRP 011111 ----- ----- ..... 0010101110 - @X_rb
> MSGSNDP 011111 ----- ----- ..... 0010001110 - @X_rb
> +MSGSYNC 011111 ----- ----- ----- 1101110110 -
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 087ab8e69d..f092bbeb8b 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -6239,18 +6239,6 @@ static void gen_icbt_440(DisasContext *ctx)
> */
> }
>
> -/* Embedded.Processor Control */
> -
> -static void gen_msgsync(DisasContext *ctx)
> -{
> -#if defined(CONFIG_USER_ONLY)
> - GEN_PRIV(ctx);
> -#else
> - CHK_HV(ctx);
> -#endif /* defined(CONFIG_USER_ONLY) */
> - /* interpreted as no-op */
> -}
> -
> #if defined(TARGET_PPC64)
> static void gen_maddld(DisasContext *ctx)
> {
> @@ -6853,8 +6841,6 @@ GEN_HANDLER2_E(tlbivax_booke206, "tlbivax", 0x1F, 0x12, 0x18, 0x00000001,
> PPC_NONE, PPC2_BOOKE206),
> GEN_HANDLER2_E(tlbilx_booke206, "tlbilx", 0x1F, 0x12, 0x00, 0x03800001,
> PPC_NONE, PPC2_BOOKE206),
> -GEN_HANDLER2_E(msgsync, "msgsync", 0x1F, 0x16, 0x1B, 0x00000000,
> - PPC_NONE, PPC2_ISA300),
> GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_WRTEE),
> GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000E7C01, PPC_WRTEE),
> GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC),
> diff --git a/target/ppc/translate/processor-ctrl-impl.c.inc b/target/ppc/translate/processor-ctrl-impl.c.inc
> index 3703001f31..021e365a57 100644
> --- a/target/ppc/translate/processor-ctrl-impl.c.inc
> +++ b/target/ppc/translate/processor-ctrl-impl.c.inc
> @@ -92,3 +92,12 @@ static bool trans_MSGSNDP(DisasContext *ctx, arg_X_rb *a)
> #endif
> return true;
> }
> +
> +static bool trans_MSGSYNC(DisasContext *ctx, arg_MSGSYNC *a)
> +{
> + REQUIRE_INSNS_FLAGS2(ctx, ISA300);
> + REQUIRE_HV(ctx);
> +
> + /* interpreted as no-op */
> + return true;
> +}
prev parent reply other threads:[~2022-10-19 21:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-06 20:06 [PATCH 0/6] Enable doorbell instruction for POWER8 CPUs Matheus Ferst
2022-10-06 20:06 ` [PATCH 1/6] target/ppc: fix msgclr/msgsnd insns flags Matheus Ferst
2022-10-07 19:07 ` Fabiano Rosas
2022-10-06 20:06 ` [PATCH 2/6] target/ppc: fix msgsync " Matheus Ferst
2022-10-07 19:10 ` Fabiano Rosas
2022-10-06 20:06 ` [PATCH 3/6] target/ppc: fix REQUIRE_HV macro definition Matheus Ferst
2022-10-07 19:07 ` Fabiano Rosas
2022-10-06 20:06 ` [PATCH 4/6] target/ppc: move msgclr/msgsnd to decodetree Matheus Ferst
2022-10-19 20:59 ` Daniel Henrique Barboza
2022-10-06 20:06 ` [PATCH 5/6] target/ppc: move msgclrp/msgsndp " Matheus Ferst
2022-10-19 20:59 ` Daniel Henrique Barboza
2022-10-20 12:18 ` Matheus K. Ferst
2022-10-20 14:25 ` Daniel Henrique Barboza
2022-10-06 20:06 ` [PATCH 6/6] target/ppc: move msgsync " Matheus Ferst
2022-10-19 20:59 ` Daniel Henrique Barboza [this message]
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