* [PULL 00/29] target-arm queue
@ 2020-05-21 19:15 Peter Maydell
0 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2020-05-21 19:15 UTC (permalink / raw)
To: qemu-devel
target-arm queue: nothing big, just a collection of minor things.
-- PMM
The following changes since commit ae3aa5da96f4ccf0c2a28851449d92db9fcfad71:
Merge remote-tracking branch 'remotes/berrange/tags/socket-next-pull-request' into staging (2020-05-21 16:47:28 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200521
for you to fetch changes up to 17b5df7b65d0192c5d775b5e1581518580774c77:
linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 (2020-05-21 20:00:19 +0100)
----------------------------------------------------------------
target-arm queue:
* tests/acceptance: Add a test for the canon-a1100 machine
* docs/system: Document some of the Arm development boards
* linux-user: make BKPT insn cause SIGTRAP, not be a syscall
* target/arm: Remove unused GEN_NEON_INTEGER_OP macro
* fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
* hw/arm: Use qemu_log_mask() instead of hw_error() in various places
* ARM: PL061: Introduce N_GPIOS
* target/arm: Improve clear_vec_high() usage
* target/arm: Allow user-mode code to write CPSR.E via MSR
* linux-user/arm: Reset CPSR_E when entering a signal handler
* linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
----------------------------------------------------------------
Amanieu d'Antras (1):
linux-user/arm: Reset CPSR_E when entering a signal handler
Geert Uytterhoeven (1):
ARM: PL061: Introduce N_GPIOS
Guenter Roeck (8):
hw: Move i.MX watchdog driver to hw/watchdog
hw/watchdog: Implement full i.MX watchdog support
hw/arm/fsl-imx25: Wire up watchdog
hw/arm/fsl-imx31: Wire up watchdog
hw/arm/fsl-imx6: Connect watchdog interrupts
hw/arm/fsl-imx6ul: Connect watchdog interrupts
hw/arm/fsl-imx7: Instantiate various unimplemented devices
hw/arm/fsl-imx7: Connect watchdog interrupts
Peter Maydell (12):
docs/system: Add 'Arm' to the Integrator/CP document title
docs/system: Sort Arm board index into alphabetical order
docs/system: Document Arm Versatile Express boards
docs/system: Document the various MPS2 models
docs/system: Document Musca boards
linux-user/arm: BKPT should cause SIGTRAP, not be a syscall
linux-user/arm: Remove bogus SVC 0xf0002 handling
linux-user/arm: Handle invalid arm-specific syscalls correctly
linux-user/arm: Fix identification of syscall numbers
target/arm: Remove unused GEN_NEON_INTEGER_OP macro
target/arm: Allow user-mode code to write CPSR.E via MSR
linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
Philippe Mathieu-Daudé (4):
hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
Richard Henderson (2):
target/arm: Use tcg_gen_gvec_mov for clear_vec_high
target/arm: Use clear_vec_high more effectively
Thomas Huth (1):
tests/acceptance: Add a test for the canon-a1100 machine
docs/system/arm/integratorcp.rst | 4 +-
docs/system/arm/mps2.rst | 29 +++
docs/system/arm/musca.rst | 31 +++
docs/system/arm/vexpress.rst | 60 ++++++
docs/system/target-arm.rst | 20 +-
include/hw/arm/fsl-imx25.h | 5 +
include/hw/arm/fsl-imx31.h | 4 +
include/hw/arm/fsl-imx6.h | 2 +-
include/hw/arm/fsl-imx6ul.h | 2 +-
include/hw/arm/fsl-imx7.h | 23 ++-
include/hw/misc/imx2_wdt.h | 33 ----
include/hw/watchdog/wdt_imx2.h | 90 +++++++++
target/arm/cpu.h | 2 +-
hw/arm/fsl-imx25.c | 10 +
hw/arm/fsl-imx31.c | 6 +
hw/arm/fsl-imx6.c | 9 +
hw/arm/fsl-imx6ul.c | 10 +
hw/arm/fsl-imx7.c | 35 ++++
hw/arm/integratorcp.c | 23 ++-
hw/arm/pxa2xx_gpio.c | 7 +-
hw/char/xilinx_uartlite.c | 5 +-
hw/display/pxa2xx_lcd.c | 8 +-
hw/dma/pxa2xx_dma.c | 14 +-
hw/gpio/pl061.c | 12 +-
hw/misc/imx2_wdt.c | 90 ---------
hw/timer/exynos4210_mct.c | 12 +-
hw/watchdog/wdt_imx2.c | 303 +++++++++++++++++++++++++++++
linux-user/arm/cpu_loop.c | 145 ++++++++------
linux-user/arm/signal.c | 15 +-
target/arm/translate-a64.c | 63 +++---
target/arm/translate.c | 23 ---
MAINTAINERS | 6 +
hw/arm/Kconfig | 5 +
hw/misc/Makefile.objs | 1 -
hw/watchdog/Kconfig | 3 +
hw/watchdog/Makefile.objs | 1 +
tests/acceptance/machine_arm_canona1100.py | 35 ++++
37 files changed, 854 insertions(+), 292 deletions(-)
create mode 100644 docs/system/arm/mps2.rst
create mode 100644 docs/system/arm/musca.rst
create mode 100644 docs/system/arm/vexpress.rst
delete mode 100644 include/hw/misc/imx2_wdt.h
create mode 100644 include/hw/watchdog/wdt_imx2.h
delete mode 100644 hw/misc/imx2_wdt.c
create mode 100644 hw/watchdog/wdt_imx2.c
create mode 100644 tests/acceptance/machine_arm_canona1100.py
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PULL 00/29] target-arm queue
@ 2020-06-05 16:49 Peter Maydell
2020-06-05 20:10 ` no-reply
2020-06-08 10:04 ` Peter Maydell
0 siblings, 2 replies; 38+ messages in thread
From: Peter Maydell @ 2020-06-05 16:49 UTC (permalink / raw)
To: qemu-devel
Arm queue; some of the simpler stuff, things other have reviewed (thanks!), etc.
-- PMM
The following changes since commit 5d2f557b47dfbf8f23277a5bdd8473d4607c681a:
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20200605-pull-request' into staging (2020-06-05 13:53:05 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200605
for you to fetch changes up to 2c35a39eda0b16c2ed85c94cec204bf5efb97812:
target/arm: Convert Neon one-register-and-immediate insns to decodetree (2020-06-05 17:23:10 +0100)
----------------------------------------------------------------
target-arm queue:
hw/ssi/imx_spi: Handle tx burst lengths other than 8 correctly
hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
target/arm: Convert crypto insns to gvec
hw/adc/stm32f2xx_adc: Correct memory region size and access size
tests/acceptance: Add a boot test for the xlnx-versal-virt machine
docs/system: Document Aspeed boards
raspi: Add model of the USB controller
target/arm: Convert 2-reg-and-shift and 1-reg-imm Neon insns to decodetree
----------------------------------------------------------------
Cédric Le Goater (1):
docs/system: Document Aspeed boards
Eden Mikitas (2):
hw/ssi/imx_spi: changed while statement to prevent underflow
hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave
Paul Zimmerman (7):
raspi: add BCM2835 SOC MPHI emulation
dwc-hsotg (dwc2) USB host controller register definitions
dwc-hsotg (dwc2) USB host controller state definitions
dwc-hsotg (dwc2) USB host controller emulation
usb: add short-packet handling to usb-storage driver
wire in the dwc-hsotg (dwc2) USB host controller emulation
raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host
Peter Maydell (9):
target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree
target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree
target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
target/arm: Convert Neon narrowing shifts with op==8 to decodetree
target/arm: Convert Neon narrowing shifts with op==9 to decodetree
target/arm: Convert Neon VSHLL, VMOVL to decodetree
target/arm: Convert VCVT fixed-point ops to decodetree
target/arm: Convert Neon one-register-and-immediate insns to decodetree
Philippe Mathieu-Daudé (3):
hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
hw/adc/stm32f2xx_adc: Correct memory region size and access size
Richard Henderson (6):
target/arm: Convert aes and sm4 to gvec helpers
target/arm: Convert rax1 to gvec helpers
target/arm: Convert sha512 and sm3 to gvec helpers
target/arm: Convert sha1 and sha256 to gvec helpers
target/arm: Split helper_crypto_sha1_3reg
target/arm: Split helper_crypto_sm3tt
Thomas Huth (1):
tests/acceptance: Add a boot test for the xlnx-versal-virt machine
docs/system/arm/aspeed.rst | 85 ++
docs/system/target-arm.rst | 1 +
hw/usb/hcd-dwc2.h | 190 +++++
include/hw/arm/bcm2835_peripherals.h | 5 +-
include/hw/misc/bcm2835_mphi.h | 44 +
include/hw/usb/dwc2-regs.h | 899 ++++++++++++++++++++
target/arm/helper.h | 45 +-
target/arm/translate-a64.h | 3 +
target/arm/vec_internal.h | 33 +
target/arm/neon-dp.decode | 214 ++++-
hw/adc/stm32f2xx_adc.c | 4 +-
hw/arm/bcm2835_peripherals.c | 38 +-
hw/arm/pxa2xx.c | 66 +-
hw/input/pxa2xx_keypad.c | 10 +-
hw/misc/bcm2835_mphi.c | 191 +++++
hw/ssi/imx_spi.c | 4 +-
hw/usb/dev-storage.c | 15 +-
hw/usb/hcd-dwc2.c | 1417 ++++++++++++++++++++++++++++++++
target/arm/crypto_helper.c | 267 ++++--
target/arm/translate-a64.c | 198 ++---
target/arm/translate-neon.inc.c | 796 ++++++++++++++----
target/arm/translate.c | 539 +-----------
target/arm/vec_helper.c | 12 +-
hw/misc/Makefile.objs | 1 +
hw/usb/Kconfig | 5 +
hw/usb/Makefile.objs | 1 +
hw/usb/trace-events | 50 ++
tests/acceptance/boot_linux_console.py | 35 +-
28 files changed, 4258 insertions(+), 910 deletions(-)
create mode 100644 docs/system/arm/aspeed.rst
create mode 100644 hw/usb/hcd-dwc2.h
create mode 100644 include/hw/misc/bcm2835_mphi.h
create mode 100644 include/hw/usb/dwc2-regs.h
create mode 100644 target/arm/vec_internal.h
create mode 100644 hw/misc/bcm2835_mphi.c
create mode 100644 hw/usb/hcd-dwc2.c
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PULL 00/29] target-arm queue
2020-06-05 16:49 Peter Maydell
@ 2020-06-05 20:10 ` no-reply
2020-06-08 10:04 ` Peter Maydell
1 sibling, 0 replies; 38+ messages in thread
From: no-reply @ 2020-06-05 20:10 UTC (permalink / raw)
To: peter.maydell; +Cc: qemu-devel
Patchew URL: https://patchew.org/QEMU/20200605165007.12095-1-peter.maydell@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200605165007.12095-1-peter.maydell@linaro.org
Subject: [PULL 00/29] target-arm queue
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
5d2f557..175198a master -> master
Switched to a new branch 'test'
8d19bb1 target/arm: Convert Neon one-register-and-immediate insns to decodetree
c07ebcb target/arm: Convert VCVT fixed-point ops to decodetree
595e77e target/arm: Convert Neon VSHLL, VMOVL to decodetree
0f42979 target/arm: Convert Neon narrowing shifts with op==9 to decodetree
93549e8 target/arm: Convert Neon narrowing shifts with op==8 to decodetree
f0efe71 target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
c0457fa target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree
7e946c5 target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
3daf164 target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree
725f9e4 raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host
2a56c0c wire in the dwc-hsotg (dwc2) USB host controller emulation
f9720e8 usb: add short-packet handling to usb-storage driver
d6df0bc dwc-hsotg (dwc2) USB host controller emulation
26ec413 dwc-hsotg (dwc2) USB host controller state definitions
27c3b07 dwc-hsotg (dwc2) USB host controller register definitions
3f982e5 raspi: add BCM2835 SOC MPHI emulation
21a59c9 docs/system: Document Aspeed boards
65b3e83 tests/acceptance: Add a boot test for the xlnx-versal-virt machine
a494cb0 hw/adc/stm32f2xx_adc: Correct memory region size and access size
abbdeb5 target/arm: Split helper_crypto_sm3tt
0db4fd4 target/arm: Split helper_crypto_sha1_3reg
00ad42c target/arm: Convert sha1 and sha256 to gvec helpers
96fc084 target/arm: Convert sha512 and sm3 to gvec helpers
5199605 target/arm: Convert rax1 to gvec helpers
7cd9082 target/arm: Convert aes and sm4 to gvec helpers
188335a hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
240dce6 hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
b09557e hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave
f979463 hw/ssi/imx_spi: changed while statement to prevent underflow
=== OUTPUT BEGIN ===
1/29 Checking commit f979463e1fdd (hw/ssi/imx_spi: changed while statement to prevent underflow)
2/29 Checking commit b09557efe185 (hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave)
3/29 Checking commit 240dce66be50 (hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask())
4/29 Checking commit 188335aa83c3 (hw/arm/pxa2xx: Replace printf() call by qemu_log_mask())
5/29 Checking commit 7cd9082434bd (target/arm: Convert aes and sm4 to gvec helpers)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#396:
new file mode 100644
total: 0 errors, 1 warnings, 364 lines checked
Patch 5/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/29 Checking commit 519960531b00 (target/arm: Convert rax1 to gvec helpers)
7/29 Checking commit 96fc08401629 (target/arm: Convert sha512 and sm3 to gvec helpers)
8/29 Checking commit 00ad42c753c1 (target/arm: Convert sha1 and sha256 to gvec helpers)
ERROR: spaces required around that '*' (ctx:WxV)
#270: FILE: target/arm/translate-neon.inc.c:735:
+ static bool trans_##NAME##_3s(DisasContext *s, arg_3same *a) \
^
total: 1 errors, 0 warnings, 366 lines checked
Patch 8/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/29 Checking commit 0db4fd4a19b7 (target/arm: Split helper_crypto_sha1_3reg)
ERROR: spaces required around that '*' (ctx:WxV)
#246: FILE: target/arm/translate-neon.inc.c:698:
+ static bool trans_##NAME##_3s(DisasContext *s, arg_3same *a) \
^
total: 1 errors, 0 warnings, 243 lines checked
Patch 9/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/29 Checking commit abbdeb5eb100 (target/arm: Split helper_crypto_sm3tt)
11/29 Checking commit a494cb00d665 (hw/adc/stm32f2xx_adc: Correct memory region size and access size)
12/29 Checking commit 65b3e832526b (tests/acceptance: Add a boot test for the xlnx-versal-virt machine)
13/29 Checking commit 21a59c942494 (docs/system: Document Aspeed boards)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#14:
new file mode 100644
total: 0 errors, 1 warnings, 92 lines checked
Patch 13/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/29 Checking commit 3f982e580b4f (raspi: add BCM2835 SOC MPHI emulation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#67:
new file mode 100644
WARNING: line over 80 characters
#222: FILE: hw/misc/bcm2835_mphi.c:151:
+ memory_region_init_io(&s->iomem, obj, &mphi_mmio_ops, s, "mphi", MPHI_MMIO_SIZE);
total: 0 errors, 2 warnings, 285 lines checked
Patch 14/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/29 Checking commit 27c3b07beecb (dwc-hsotg (dwc2) USB host controller register definitions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#21:
new file mode 100644
WARNING: architecture specific defines should be avoided
#67: FILE: include/hw/usb/dwc2-regs.h:42:
+#ifndef __DWC2_HW_H__
ERROR: code indent should never use tabs
#70: FILE: include/hw/usb/dwc2-regs.h:45:
+#define HSOTG_REG(x)^I(x)$
ERROR: code indent should never use tabs
#72: FILE: include/hw/usb/dwc2-regs.h:47:
+#define GOTGCTL^I^I^I^IHSOTG_REG(0x000)$
ERROR: code indent should never use tabs
#73: FILE: include/hw/usb/dwc2-regs.h:48:
+#define GOTGCTL_CHIRPEN^I^I^IBIT(27)$
ERROR: code indent should never use tabs
#74: FILE: include/hw/usb/dwc2-regs.h:49:
+#define GOTGCTL_MULT_VALID_BC_MASK^I(0x1f << 22)$
ERROR: code indent should never use tabs
#75: FILE: include/hw/usb/dwc2-regs.h:50:
+#define GOTGCTL_MULT_VALID_BC_SHIFT^I22$
ERROR: code indent should never use tabs
#76: FILE: include/hw/usb/dwc2-regs.h:51:
+#define GOTGCTL_OTGVER^I^I^IBIT(20)$
ERROR: code indent should never use tabs
#77: FILE: include/hw/usb/dwc2-regs.h:52:
+#define GOTGCTL_BSESVLD^I^I^IBIT(19)$
ERROR: code indent should never use tabs
#78: FILE: include/hw/usb/dwc2-regs.h:53:
+#define GOTGCTL_ASESVLD^I^I^IBIT(18)$
ERROR: code indent should never use tabs
#79: FILE: include/hw/usb/dwc2-regs.h:54:
+#define GOTGCTL_DBNC_SHORT^I^IBIT(17)$
ERROR: code indent should never use tabs
#80: FILE: include/hw/usb/dwc2-regs.h:55:
+#define GOTGCTL_CONID_B^I^I^IBIT(16)$
ERROR: code indent should never use tabs
#81: FILE: include/hw/usb/dwc2-regs.h:56:
+#define GOTGCTL_DBNCE_FLTR_BYPASS^IBIT(15)$
ERROR: code indent should never use tabs
#82: FILE: include/hw/usb/dwc2-regs.h:57:
+#define GOTGCTL_DEVHNPEN^I^IBIT(11)$
ERROR: code indent should never use tabs
#83: FILE: include/hw/usb/dwc2-regs.h:58:
+#define GOTGCTL_HSTSETHNPEN^I^IBIT(10)$
ERROR: code indent should never use tabs
#84: FILE: include/hw/usb/dwc2-regs.h:59:
+#define GOTGCTL_HNPREQ^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#85: FILE: include/hw/usb/dwc2-regs.h:60:
+#define GOTGCTL_HSTNEGSCS^I^IBIT(8)$
ERROR: code indent should never use tabs
#86: FILE: include/hw/usb/dwc2-regs.h:61:
+#define GOTGCTL_SESREQ^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#87: FILE: include/hw/usb/dwc2-regs.h:62:
+#define GOTGCTL_SESREQSCS^I^IBIT(0)$
ERROR: code indent should never use tabs
#89: FILE: include/hw/usb/dwc2-regs.h:64:
+#define GOTGINT^I^I^I^IHSOTG_REG(0x004)$
ERROR: code indent should never use tabs
#90: FILE: include/hw/usb/dwc2-regs.h:65:
+#define GOTGINT_DBNCE_DONE^I^IBIT(19)$
ERROR: code indent should never use tabs
#91: FILE: include/hw/usb/dwc2-regs.h:66:
+#define GOTGINT_A_DEV_TOUT_CHG^I^IBIT(18)$
ERROR: code indent should never use tabs
#92: FILE: include/hw/usb/dwc2-regs.h:67:
+#define GOTGINT_HST_NEG_DET^I^IBIT(17)$
ERROR: code indent should never use tabs
#93: FILE: include/hw/usb/dwc2-regs.h:68:
+#define GOTGINT_HST_NEG_SUC_STS_CHNG^IBIT(9)$
ERROR: code indent should never use tabs
#94: FILE: include/hw/usb/dwc2-regs.h:69:
+#define GOTGINT_SES_REQ_SUC_STS_CHNG^IBIT(8)$
ERROR: code indent should never use tabs
#95: FILE: include/hw/usb/dwc2-regs.h:70:
+#define GOTGINT_SES_END_DET^I^IBIT(2)$
ERROR: code indent should never use tabs
#97: FILE: include/hw/usb/dwc2-regs.h:72:
+#define GAHBCFG^I^I^I^IHSOTG_REG(0x008)$
ERROR: code indent should never use tabs
#98: FILE: include/hw/usb/dwc2-regs.h:73:
+#define GAHBCFG_AHB_SINGLE^I^IBIT(23)$
ERROR: code indent should never use tabs
#99: FILE: include/hw/usb/dwc2-regs.h:74:
+#define GAHBCFG_NOTI_ALL_DMA_WRIT^IBIT(22)$
ERROR: code indent should never use tabs
#100: FILE: include/hw/usb/dwc2-regs.h:75:
+#define GAHBCFG_REM_MEM_SUPP^I^IBIT(21)$
ERROR: code indent should never use tabs
#101: FILE: include/hw/usb/dwc2-regs.h:76:
+#define GAHBCFG_P_TXF_EMP_LVL^I^IBIT(8)$
ERROR: code indent should never use tabs
#102: FILE: include/hw/usb/dwc2-regs.h:77:
+#define GAHBCFG_NP_TXF_EMP_LVL^I^IBIT(7)$
ERROR: code indent should never use tabs
#103: FILE: include/hw/usb/dwc2-regs.h:78:
+#define GAHBCFG_DMA_EN^I^I^IBIT(5)$
ERROR: code indent should never use tabs
#104: FILE: include/hw/usb/dwc2-regs.h:79:
+#define GAHBCFG_HBSTLEN_MASK^I^I(0xf << 1)$
ERROR: code indent should never use tabs
#105: FILE: include/hw/usb/dwc2-regs.h:80:
+#define GAHBCFG_HBSTLEN_SHIFT^I^I1$
ERROR: code indent should never use tabs
#106: FILE: include/hw/usb/dwc2-regs.h:81:
+#define GAHBCFG_HBSTLEN_SINGLE^I^I0$
ERROR: code indent should never use tabs
#107: FILE: include/hw/usb/dwc2-regs.h:82:
+#define GAHBCFG_HBSTLEN_INCR^I^I1$
ERROR: code indent should never use tabs
#108: FILE: include/hw/usb/dwc2-regs.h:83:
+#define GAHBCFG_HBSTLEN_INCR4^I^I3$
ERROR: code indent should never use tabs
#109: FILE: include/hw/usb/dwc2-regs.h:84:
+#define GAHBCFG_HBSTLEN_INCR8^I^I5$
ERROR: code indent should never use tabs
#110: FILE: include/hw/usb/dwc2-regs.h:85:
+#define GAHBCFG_HBSTLEN_INCR16^I^I7$
ERROR: code indent should never use tabs
#111: FILE: include/hw/usb/dwc2-regs.h:86:
+#define GAHBCFG_GLBL_INTR_EN^I^IBIT(0)$
ERROR: code indent should never use tabs
#112: FILE: include/hw/usb/dwc2-regs.h:87:
+#define GAHBCFG_CTRL_MASK^I^I(GAHBCFG_P_TXF_EMP_LVL | \$
ERROR: code indent should never use tabs
#113: FILE: include/hw/usb/dwc2-regs.h:88:
+^I^I^I^I^I GAHBCFG_NP_TXF_EMP_LVL | \$
ERROR: code indent should never use tabs
#114: FILE: include/hw/usb/dwc2-regs.h:89:
+^I^I^I^I^I GAHBCFG_DMA_EN | \$
ERROR: code indent should never use tabs
#115: FILE: include/hw/usb/dwc2-regs.h:90:
+^I^I^I^I^I GAHBCFG_GLBL_INTR_EN)$
ERROR: code indent should never use tabs
#117: FILE: include/hw/usb/dwc2-regs.h:92:
+#define GUSBCFG^I^I^I^IHSOTG_REG(0x00C)$
ERROR: code indent should never use tabs
#118: FILE: include/hw/usb/dwc2-regs.h:93:
+#define GUSBCFG_FORCEDEVMODE^I^IBIT(30)$
ERROR: code indent should never use tabs
#119: FILE: include/hw/usb/dwc2-regs.h:94:
+#define GUSBCFG_FORCEHOSTMODE^I^IBIT(29)$
ERROR: code indent should never use tabs
#120: FILE: include/hw/usb/dwc2-regs.h:95:
+#define GUSBCFG_TXENDDELAY^I^IBIT(28)$
ERROR: code indent should never use tabs
#121: FILE: include/hw/usb/dwc2-regs.h:96:
+#define GUSBCFG_ICTRAFFICPULLREMOVE^IBIT(27)$
ERROR: code indent should never use tabs
#122: FILE: include/hw/usb/dwc2-regs.h:97:
+#define GUSBCFG_ICUSBCAP^I^IBIT(26)$
ERROR: code indent should never use tabs
#123: FILE: include/hw/usb/dwc2-regs.h:98:
+#define GUSBCFG_ULPI_INT_PROT_DIS^IBIT(25)$
ERROR: code indent should never use tabs
#124: FILE: include/hw/usb/dwc2-regs.h:99:
+#define GUSBCFG_INDICATORPASSTHROUGH^IBIT(24)$
ERROR: code indent should never use tabs
#125: FILE: include/hw/usb/dwc2-regs.h:100:
+#define GUSBCFG_INDICATORCOMPLEMENT^IBIT(23)$
ERROR: code indent should never use tabs
#126: FILE: include/hw/usb/dwc2-regs.h:101:
+#define GUSBCFG_TERMSELDLPULSE^I^IBIT(22)$
ERROR: code indent should never use tabs
#127: FILE: include/hw/usb/dwc2-regs.h:102:
+#define GUSBCFG_ULPI_INT_VBUS_IND^IBIT(21)$
ERROR: code indent should never use tabs
#128: FILE: include/hw/usb/dwc2-regs.h:103:
+#define GUSBCFG_ULPI_EXT_VBUS_DRV^IBIT(20)$
ERROR: code indent should never use tabs
#129: FILE: include/hw/usb/dwc2-regs.h:104:
+#define GUSBCFG_ULPI_CLK_SUSP_M^I^IBIT(19)$
ERROR: code indent should never use tabs
#130: FILE: include/hw/usb/dwc2-regs.h:105:
+#define GUSBCFG_ULPI_AUTO_RES^I^IBIT(18)$
ERROR: code indent should never use tabs
#131: FILE: include/hw/usb/dwc2-regs.h:106:
+#define GUSBCFG_ULPI_FS_LS^I^IBIT(17)$
ERROR: code indent should never use tabs
#132: FILE: include/hw/usb/dwc2-regs.h:107:
+#define GUSBCFG_OTG_UTMI_FS_SEL^I^IBIT(16)$
ERROR: code indent should never use tabs
#133: FILE: include/hw/usb/dwc2-regs.h:108:
+#define GUSBCFG_PHY_LP_CLK_SEL^I^IBIT(15)$
ERROR: code indent should never use tabs
#134: FILE: include/hw/usb/dwc2-regs.h:109:
+#define GUSBCFG_USBTRDTIM_MASK^I^I(0xf << 10)$
ERROR: code indent should never use tabs
#135: FILE: include/hw/usb/dwc2-regs.h:110:
+#define GUSBCFG_USBTRDTIM_SHIFT^I^I10$
ERROR: code indent should never use tabs
#136: FILE: include/hw/usb/dwc2-regs.h:111:
+#define GUSBCFG_HNPCAP^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#137: FILE: include/hw/usb/dwc2-regs.h:112:
+#define GUSBCFG_SRPCAP^I^I^IBIT(8)$
ERROR: code indent should never use tabs
#138: FILE: include/hw/usb/dwc2-regs.h:113:
+#define GUSBCFG_DDRSEL^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#139: FILE: include/hw/usb/dwc2-regs.h:114:
+#define GUSBCFG_PHYSEL^I^I^IBIT(6)$
ERROR: code indent should never use tabs
#140: FILE: include/hw/usb/dwc2-regs.h:115:
+#define GUSBCFG_FSINTF^I^I^IBIT(5)$
ERROR: code indent should never use tabs
#141: FILE: include/hw/usb/dwc2-regs.h:116:
+#define GUSBCFG_ULPI_UTMI_SEL^I^IBIT(4)$
ERROR: code indent should never use tabs
#142: FILE: include/hw/usb/dwc2-regs.h:117:
+#define GUSBCFG_PHYIF16^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#143: FILE: include/hw/usb/dwc2-regs.h:118:
+#define GUSBCFG_PHYIF8^I^I^I(0 << 3)$
ERROR: code indent should never use tabs
#144: FILE: include/hw/usb/dwc2-regs.h:119:
+#define GUSBCFG_TOUTCAL_MASK^I^I(0x7 << 0)$
ERROR: code indent should never use tabs
#145: FILE: include/hw/usb/dwc2-regs.h:120:
+#define GUSBCFG_TOUTCAL_SHIFT^I^I0$
ERROR: code indent should never use tabs
#146: FILE: include/hw/usb/dwc2-regs.h:121:
+#define GUSBCFG_TOUTCAL_LIMIT^I^I0x7$
ERROR: code indent should never use tabs
#147: FILE: include/hw/usb/dwc2-regs.h:122:
+#define GUSBCFG_TOUTCAL(_x)^I^I((_x) << 0)$
ERROR: code indent should never use tabs
#149: FILE: include/hw/usb/dwc2-regs.h:124:
+#define GRSTCTL^I^I^I^IHSOTG_REG(0x010)$
ERROR: code indent should never use tabs
#150: FILE: include/hw/usb/dwc2-regs.h:125:
+#define GRSTCTL_AHBIDLE^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#151: FILE: include/hw/usb/dwc2-regs.h:126:
+#define GRSTCTL_DMAREQ^I^I^IBIT(30)$
ERROR: code indent should never use tabs
#152: FILE: include/hw/usb/dwc2-regs.h:127:
+#define GRSTCTL_TXFNUM_MASK^I^I(0x1f << 6)$
ERROR: code indent should never use tabs
#153: FILE: include/hw/usb/dwc2-regs.h:128:
+#define GRSTCTL_TXFNUM_SHIFT^I^I6$
ERROR: code indent should never use tabs
#154: FILE: include/hw/usb/dwc2-regs.h:129:
+#define GRSTCTL_TXFNUM_LIMIT^I^I0x1f$
ERROR: code indent should never use tabs
#155: FILE: include/hw/usb/dwc2-regs.h:130:
+#define GRSTCTL_TXFNUM(_x)^I^I((_x) << 6)$
ERROR: code indent should never use tabs
#156: FILE: include/hw/usb/dwc2-regs.h:131:
+#define GRSTCTL_TXFFLSH^I^I^IBIT(5)$
ERROR: code indent should never use tabs
#157: FILE: include/hw/usb/dwc2-regs.h:132:
+#define GRSTCTL_RXFFLSH^I^I^IBIT(4)$
ERROR: code indent should never use tabs
#158: FILE: include/hw/usb/dwc2-regs.h:133:
+#define GRSTCTL_IN_TKNQ_FLSH^I^IBIT(3)$
ERROR: code indent should never use tabs
#159: FILE: include/hw/usb/dwc2-regs.h:134:
+#define GRSTCTL_FRMCNTRRST^I^IBIT(2)$
ERROR: code indent should never use tabs
#160: FILE: include/hw/usb/dwc2-regs.h:135:
+#define GRSTCTL_HSFTRST^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#161: FILE: include/hw/usb/dwc2-regs.h:136:
+#define GRSTCTL_CSFTRST^I^I^IBIT(0)$
ERROR: code indent should never use tabs
#163: FILE: include/hw/usb/dwc2-regs.h:138:
+#define GINTSTS^I^I^I^IHSOTG_REG(0x014)$
ERROR: code indent should never use tabs
#164: FILE: include/hw/usb/dwc2-regs.h:139:
+#define GINTMSK^I^I^I^IHSOTG_REG(0x018)$
ERROR: code indent should never use tabs
#165: FILE: include/hw/usb/dwc2-regs.h:140:
+#define GINTSTS_WKUPINT^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#166: FILE: include/hw/usb/dwc2-regs.h:141:
+#define GINTSTS_SESSREQINT^I^IBIT(30)$
ERROR: code indent should never use tabs
#167: FILE: include/hw/usb/dwc2-regs.h:142:
+#define GINTSTS_DISCONNINT^I^IBIT(29)$
ERROR: code indent should never use tabs
#168: FILE: include/hw/usb/dwc2-regs.h:143:
+#define GINTSTS_CONIDSTSCHNG^I^IBIT(28)$
ERROR: code indent should never use tabs
#169: FILE: include/hw/usb/dwc2-regs.h:144:
+#define GINTSTS_LPMTRANRCVD^I^IBIT(27)$
ERROR: code indent should never use tabs
#170: FILE: include/hw/usb/dwc2-regs.h:145:
+#define GINTSTS_PTXFEMP^I^I^IBIT(26)$
ERROR: code indent should never use tabs
#171: FILE: include/hw/usb/dwc2-regs.h:146:
+#define GINTSTS_HCHINT^I^I^IBIT(25)$
ERROR: code indent should never use tabs
#172: FILE: include/hw/usb/dwc2-regs.h:147:
+#define GINTSTS_PRTINT^I^I^IBIT(24)$
ERROR: code indent should never use tabs
#173: FILE: include/hw/usb/dwc2-regs.h:148:
+#define GINTSTS_RESETDET^I^IBIT(23)$
ERROR: code indent should never use tabs
#174: FILE: include/hw/usb/dwc2-regs.h:149:
+#define GINTSTS_FET_SUSP^I^IBIT(22)$
ERROR: code indent should never use tabs
#175: FILE: include/hw/usb/dwc2-regs.h:150:
+#define GINTSTS_INCOMPL_IP^I^IBIT(21)$
ERROR: code indent should never use tabs
#176: FILE: include/hw/usb/dwc2-regs.h:151:
+#define GINTSTS_INCOMPL_SOOUT^I^IBIT(21)$
ERROR: code indent should never use tabs
#177: FILE: include/hw/usb/dwc2-regs.h:152:
+#define GINTSTS_INCOMPL_SOIN^I^IBIT(20)$
ERROR: code indent should never use tabs
#178: FILE: include/hw/usb/dwc2-regs.h:153:
+#define GINTSTS_OEPINT^I^I^IBIT(19)$
ERROR: code indent should never use tabs
#179: FILE: include/hw/usb/dwc2-regs.h:154:
+#define GINTSTS_IEPINT^I^I^IBIT(18)$
ERROR: code indent should never use tabs
#180: FILE: include/hw/usb/dwc2-regs.h:155:
+#define GINTSTS_EPMIS^I^I^IBIT(17)$
ERROR: code indent should never use tabs
#181: FILE: include/hw/usb/dwc2-regs.h:156:
+#define GINTSTS_RESTOREDONE^I^IBIT(16)$
ERROR: code indent should never use tabs
#182: FILE: include/hw/usb/dwc2-regs.h:157:
+#define GINTSTS_EOPF^I^I^IBIT(15)$
ERROR: code indent should never use tabs
#183: FILE: include/hw/usb/dwc2-regs.h:158:
+#define GINTSTS_ISOUTDROP^I^IBIT(14)$
ERROR: code indent should never use tabs
#184: FILE: include/hw/usb/dwc2-regs.h:159:
+#define GINTSTS_ENUMDONE^I^IBIT(13)$
ERROR: code indent should never use tabs
#185: FILE: include/hw/usb/dwc2-regs.h:160:
+#define GINTSTS_USBRST^I^I^IBIT(12)$
ERROR: code indent should never use tabs
#186: FILE: include/hw/usb/dwc2-regs.h:161:
+#define GINTSTS_USBSUSP^I^I^IBIT(11)$
ERROR: code indent should never use tabs
#187: FILE: include/hw/usb/dwc2-regs.h:162:
+#define GINTSTS_ERLYSUSP^I^IBIT(10)$
ERROR: code indent should never use tabs
#188: FILE: include/hw/usb/dwc2-regs.h:163:
+#define GINTSTS_I2CINT^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#189: FILE: include/hw/usb/dwc2-regs.h:164:
+#define GINTSTS_ULPI_CK_INT^I^IBIT(8)$
ERROR: code indent should never use tabs
#190: FILE: include/hw/usb/dwc2-regs.h:165:
+#define GINTSTS_GOUTNAKEFF^I^IBIT(7)$
ERROR: code indent should never use tabs
#191: FILE: include/hw/usb/dwc2-regs.h:166:
+#define GINTSTS_GINNAKEFF^I^IBIT(6)$
ERROR: code indent should never use tabs
#192: FILE: include/hw/usb/dwc2-regs.h:167:
+#define GINTSTS_NPTXFEMP^I^IBIT(5)$
ERROR: code indent should never use tabs
#193: FILE: include/hw/usb/dwc2-regs.h:168:
+#define GINTSTS_RXFLVL^I^I^IBIT(4)$
ERROR: code indent should never use tabs
#194: FILE: include/hw/usb/dwc2-regs.h:169:
+#define GINTSTS_SOF^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#195: FILE: include/hw/usb/dwc2-regs.h:170:
+#define GINTSTS_OTGINT^I^I^IBIT(2)$
ERROR: code indent should never use tabs
#196: FILE: include/hw/usb/dwc2-regs.h:171:
+#define GINTSTS_MODEMIS^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#197: FILE: include/hw/usb/dwc2-regs.h:172:
+#define GINTSTS_CURMODE_HOST^I^IBIT(0)$
ERROR: code indent should never use tabs
#199: FILE: include/hw/usb/dwc2-regs.h:174:
+#define GRXSTSR^I^I^I^IHSOTG_REG(0x01C)$
ERROR: code indent should never use tabs
#200: FILE: include/hw/usb/dwc2-regs.h:175:
+#define GRXSTSP^I^I^I^IHSOTG_REG(0x020)$
ERROR: code indent should never use tabs
#201: FILE: include/hw/usb/dwc2-regs.h:176:
+#define GRXSTS_FN_MASK^I^I^I(0x7f << 25)$
ERROR: code indent should never use tabs
#202: FILE: include/hw/usb/dwc2-regs.h:177:
+#define GRXSTS_FN_SHIFT^I^I^I25$
ERROR: code indent should never use tabs
#203: FILE: include/hw/usb/dwc2-regs.h:178:
+#define GRXSTS_PKTSTS_MASK^I^I(0xf << 17)$
ERROR: code indent should never use tabs
#204: FILE: include/hw/usb/dwc2-regs.h:179:
+#define GRXSTS_PKTSTS_SHIFT^I^I17$
ERROR: code indent should never use tabs
#205: FILE: include/hw/usb/dwc2-regs.h:180:
+#define GRXSTS_PKTSTS_GLOBALOUTNAK^I1$
ERROR: code indent should never use tabs
#206: FILE: include/hw/usb/dwc2-regs.h:181:
+#define GRXSTS_PKTSTS_OUTRX^I^I2$
ERROR: code indent should never use tabs
#207: FILE: include/hw/usb/dwc2-regs.h:182:
+#define GRXSTS_PKTSTS_HCHIN^I^I2$
ERROR: code indent should never use tabs
#208: FILE: include/hw/usb/dwc2-regs.h:183:
+#define GRXSTS_PKTSTS_OUTDONE^I^I3$
ERROR: code indent should never use tabs
#209: FILE: include/hw/usb/dwc2-regs.h:184:
+#define GRXSTS_PKTSTS_HCHIN_XFER_COMP^I3$
ERROR: code indent should never use tabs
#210: FILE: include/hw/usb/dwc2-regs.h:185:
+#define GRXSTS_PKTSTS_SETUPDONE^I^I4$
ERROR: code indent should never use tabs
#211: FILE: include/hw/usb/dwc2-regs.h:186:
+#define GRXSTS_PKTSTS_DATATOGGLEERR^I5$
ERROR: code indent should never use tabs
#212: FILE: include/hw/usb/dwc2-regs.h:187:
+#define GRXSTS_PKTSTS_SETUPRX^I^I6$
ERROR: code indent should never use tabs
#213: FILE: include/hw/usb/dwc2-regs.h:188:
+#define GRXSTS_PKTSTS_HCHHALTED^I^I7$
ERROR: code indent should never use tabs
#214: FILE: include/hw/usb/dwc2-regs.h:189:
+#define GRXSTS_HCHNUM_MASK^I^I(0xf << 0)$
ERROR: code indent should never use tabs
#215: FILE: include/hw/usb/dwc2-regs.h:190:
+#define GRXSTS_HCHNUM_SHIFT^I^I0$
ERROR: code indent should never use tabs
#216: FILE: include/hw/usb/dwc2-regs.h:191:
+#define GRXSTS_DPID_MASK^I^I(0x3 << 15)$
ERROR: code indent should never use tabs
#217: FILE: include/hw/usb/dwc2-regs.h:192:
+#define GRXSTS_DPID_SHIFT^I^I15$
ERROR: code indent should never use tabs
#218: FILE: include/hw/usb/dwc2-regs.h:193:
+#define GRXSTS_BYTECNT_MASK^I^I(0x7ff << 4)$
ERROR: code indent should never use tabs
#219: FILE: include/hw/usb/dwc2-regs.h:194:
+#define GRXSTS_BYTECNT_SHIFT^I^I4$
ERROR: code indent should never use tabs
#220: FILE: include/hw/usb/dwc2-regs.h:195:
+#define GRXSTS_EPNUM_MASK^I^I(0xf << 0)$
ERROR: code indent should never use tabs
#221: FILE: include/hw/usb/dwc2-regs.h:196:
+#define GRXSTS_EPNUM_SHIFT^I^I0$
ERROR: code indent should never use tabs
#223: FILE: include/hw/usb/dwc2-regs.h:198:
+#define GRXFSIZ^I^I^I^IHSOTG_REG(0x024)$
ERROR: code indent should never use tabs
#224: FILE: include/hw/usb/dwc2-regs.h:199:
+#define GRXFSIZ_DEPTH_MASK^I^I(0xffff << 0)$
ERROR: code indent should never use tabs
#225: FILE: include/hw/usb/dwc2-regs.h:200:
+#define GRXFSIZ_DEPTH_SHIFT^I^I0$
ERROR: code indent should never use tabs
#227: FILE: include/hw/usb/dwc2-regs.h:202:
+#define GNPTXFSIZ^I^I^IHSOTG_REG(0x028)$
ERROR: code indent should never use tabs
#230: FILE: include/hw/usb/dwc2-regs.h:205:
+#define GNPTXSTS^I^I^IHSOTG_REG(0x02C)$
ERROR: code indent should never use tabs
#231: FILE: include/hw/usb/dwc2-regs.h:206:
+#define GNPTXSTS_NP_TXQ_TOP_MASK^I^I(0x7f << 24)$
ERROR: code indent should never use tabs
#232: FILE: include/hw/usb/dwc2-regs.h:207:
+#define GNPTXSTS_NP_TXQ_TOP_SHIFT^I^I24$
ERROR: code indent should never use tabs
#233: FILE: include/hw/usb/dwc2-regs.h:208:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_MASK^I^I(0xff << 16)$
ERROR: code indent should never use tabs
#234: FILE: include/hw/usb/dwc2-regs.h:209:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_SHIFT^I^I16$
ERROR: code indent should never use tabs
#235: FILE: include/hw/usb/dwc2-regs.h:210:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_GET(_v)^I(((_v) >> 16) & 0xff)$
ERROR: code indent should never use tabs
#236: FILE: include/hw/usb/dwc2-regs.h:211:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_MASK^I^I(0xffff << 0)$
ERROR: code indent should never use tabs
#237: FILE: include/hw/usb/dwc2-regs.h:212:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_SHIFT^I^I0$
ERROR: code indent should never use tabs
#238: FILE: include/hw/usb/dwc2-regs.h:213:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_GET(_v)^I(((_v) >> 0) & 0xffff)$
ERROR: code indent should never use tabs
#240: FILE: include/hw/usb/dwc2-regs.h:215:
+#define GI2CCTL^I^I^I^IHSOTG_REG(0x0030)$
ERROR: code indent should never use tabs
#241: FILE: include/hw/usb/dwc2-regs.h:216:
+#define GI2CCTL_BSYDNE^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#242: FILE: include/hw/usb/dwc2-regs.h:217:
+#define GI2CCTL_RW^I^I^IBIT(30)$
ERROR: code indent should never use tabs
#243: FILE: include/hw/usb/dwc2-regs.h:218:
+#define GI2CCTL_I2CDATSE0^I^IBIT(28)$
ERROR: code indent should never use tabs
#244: FILE: include/hw/usb/dwc2-regs.h:219:
+#define GI2CCTL_I2CDEVADDR_MASK^I^I(0x3 << 26)$
ERROR: code indent should never use tabs
#245: FILE: include/hw/usb/dwc2-regs.h:220:
+#define GI2CCTL_I2CDEVADDR_SHIFT^I26$
ERROR: code indent should never use tabs
#246: FILE: include/hw/usb/dwc2-regs.h:221:
+#define GI2CCTL_I2CSUSPCTL^I^IBIT(25)$
ERROR: code indent should never use tabs
#247: FILE: include/hw/usb/dwc2-regs.h:222:
+#define GI2CCTL_ACK^I^I^IBIT(24)$
ERROR: code indent should never use tabs
#248: FILE: include/hw/usb/dwc2-regs.h:223:
+#define GI2CCTL_I2CEN^I^I^IBIT(23)$
ERROR: code indent should never use tabs
#249: FILE: include/hw/usb/dwc2-regs.h:224:
+#define GI2CCTL_ADDR_MASK^I^I(0x7f << 16)$
ERROR: code indent should never use tabs
#250: FILE: include/hw/usb/dwc2-regs.h:225:
+#define GI2CCTL_ADDR_SHIFT^I^I16$
ERROR: code indent should never use tabs
#251: FILE: include/hw/usb/dwc2-regs.h:226:
+#define GI2CCTL_REGADDR_MASK^I^I(0xff << 8)$
ERROR: code indent should never use tabs
#252: FILE: include/hw/usb/dwc2-regs.h:227:
+#define GI2CCTL_REGADDR_SHIFT^I^I8$
ERROR: code indent should never use tabs
#253: FILE: include/hw/usb/dwc2-regs.h:228:
+#define GI2CCTL_RWDATA_MASK^I^I(0xff << 0)$
ERROR: code indent should never use tabs
#254: FILE: include/hw/usb/dwc2-regs.h:229:
+#define GI2CCTL_RWDATA_SHIFT^I^I0$
ERROR: code indent should never use tabs
#256: FILE: include/hw/usb/dwc2-regs.h:231:
+#define GPVNDCTL^I^I^IHSOTG_REG(0x0034)$
ERROR: code indent should never use tabs
#257: FILE: include/hw/usb/dwc2-regs.h:232:
+#define GGPIO^I^I^I^IHSOTG_REG(0x0038)$
ERROR: code indent should never use tabs
#258: FILE: include/hw/usb/dwc2-regs.h:233:
+#define GGPIO_STM32_OTG_GCCFG_PWRDWN^IBIT(16)$
ERROR: code indent should never use tabs
#260: FILE: include/hw/usb/dwc2-regs.h:235:
+#define GUID^I^I^I^IHSOTG_REG(0x003c)$
ERROR: code indent should never use tabs
#261: FILE: include/hw/usb/dwc2-regs.h:236:
+#define GSNPSID^I^I^I^IHSOTG_REG(0x0040)$
ERROR: code indent should never use tabs
#262: FILE: include/hw/usb/dwc2-regs.h:237:
+#define GHWCFG1^I^I^I^IHSOTG_REG(0x0044)$
ERROR: code indent should never use tabs
#263: FILE: include/hw/usb/dwc2-regs.h:238:
+#define GSNPSID_ID_MASK^I^I^IGENMASK(31, 16)$
ERROR: code indent should never use tabs
#265: FILE: include/hw/usb/dwc2-regs.h:240:
+#define GHWCFG2^I^I^I^IHSOTG_REG(0x0048)$
ERROR: code indent should never use tabs
#266: FILE: include/hw/usb/dwc2-regs.h:241:
+#define GHWCFG2_OTG_ENABLE_IC_USB^I^IBIT(31)$
ERROR: code indent should never use tabs
#267: FILE: include/hw/usb/dwc2-regs.h:242:
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK^I^I(0x1f << 26)$
ERROR: code indent should never use tabs
#268: FILE: include/hw/usb/dwc2-regs.h:243:
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT^I^I26$
ERROR: code indent should never use tabs
#269: FILE: include/hw/usb/dwc2-regs.h:244:
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK^I(0x3 << 24)$
ERROR: code indent should never use tabs
#270: FILE: include/hw/usb/dwc2-regs.h:245:
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT^I24$
ERROR: code indent should never use tabs
#271: FILE: include/hw/usb/dwc2-regs.h:246:
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK^I(0x3 << 22)$
ERROR: code indent should never use tabs
#272: FILE: include/hw/usb/dwc2-regs.h:247:
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT^I22$
ERROR: code indent should never use tabs
#273: FILE: include/hw/usb/dwc2-regs.h:248:
+#define GHWCFG2_MULTI_PROC_INT^I^I^IBIT(20)$
ERROR: code indent should never use tabs
#274: FILE: include/hw/usb/dwc2-regs.h:249:
+#define GHWCFG2_DYNAMIC_FIFO^I^I^IBIT(19)$
ERROR: code indent should never use tabs
#275: FILE: include/hw/usb/dwc2-regs.h:250:
+#define GHWCFG2_PERIO_EP_SUPPORTED^I^IBIT(18)$
ERROR: code indent should never use tabs
#276: FILE: include/hw/usb/dwc2-regs.h:251:
+#define GHWCFG2_NUM_HOST_CHAN_MASK^I^I(0xf << 14)$
ERROR: code indent should never use tabs
#277: FILE: include/hw/usb/dwc2-regs.h:252:
+#define GHWCFG2_NUM_HOST_CHAN_SHIFT^I^I14$
ERROR: code indent should never use tabs
#278: FILE: include/hw/usb/dwc2-regs.h:253:
+#define GHWCFG2_NUM_DEV_EP_MASK^I^I^I(0xf << 10)$
ERROR: code indent should never use tabs
#279: FILE: include/hw/usb/dwc2-regs.h:254:
+#define GHWCFG2_NUM_DEV_EP_SHIFT^I^I10$
ERROR: code indent should never use tabs
#280: FILE: include/hw/usb/dwc2-regs.h:255:
+#define GHWCFG2_FS_PHY_TYPE_MASK^I^I(0x3 << 8)$
ERROR: code indent should never use tabs
#281: FILE: include/hw/usb/dwc2-regs.h:256:
+#define GHWCFG2_FS_PHY_TYPE_SHIFT^I^I8$
ERROR: code indent should never use tabs
#282: FILE: include/hw/usb/dwc2-regs.h:257:
+#define GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED^I0$
ERROR: code indent should never use tabs
#283: FILE: include/hw/usb/dwc2-regs.h:258:
+#define GHWCFG2_FS_PHY_TYPE_DEDICATED^I^I1$
ERROR: code indent should never use tabs
#284: FILE: include/hw/usb/dwc2-regs.h:259:
+#define GHWCFG2_FS_PHY_TYPE_SHARED_UTMI^I^I2$
ERROR: code indent should never use tabs
#285: FILE: include/hw/usb/dwc2-regs.h:260:
+#define GHWCFG2_FS_PHY_TYPE_SHARED_ULPI^I^I3$
ERROR: code indent should never use tabs
#286: FILE: include/hw/usb/dwc2-regs.h:261:
+#define GHWCFG2_HS_PHY_TYPE_MASK^I^I(0x3 << 6)$
ERROR: code indent should never use tabs
#287: FILE: include/hw/usb/dwc2-regs.h:262:
+#define GHWCFG2_HS_PHY_TYPE_SHIFT^I^I6$
ERROR: code indent should never use tabs
#288: FILE: include/hw/usb/dwc2-regs.h:263:
+#define GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED^I0$
ERROR: code indent should never use tabs
#289: FILE: include/hw/usb/dwc2-regs.h:264:
+#define GHWCFG2_HS_PHY_TYPE_UTMI^I^I1$
ERROR: code indent should never use tabs
#290: FILE: include/hw/usb/dwc2-regs.h:265:
+#define GHWCFG2_HS_PHY_TYPE_ULPI^I^I2$
ERROR: code indent should never use tabs
#291: FILE: include/hw/usb/dwc2-regs.h:266:
+#define GHWCFG2_HS_PHY_TYPE_UTMI_ULPI^I^I3$
ERROR: code indent should never use tabs
#292: FILE: include/hw/usb/dwc2-regs.h:267:
+#define GHWCFG2_POINT2POINT^I^I^IBIT(5)$
ERROR: code indent should never use tabs
#293: FILE: include/hw/usb/dwc2-regs.h:268:
+#define GHWCFG2_ARCHITECTURE_MASK^I^I(0x3 << 3)$
ERROR: code indent should never use tabs
#294: FILE: include/hw/usb/dwc2-regs.h:269:
+#define GHWCFG2_ARCHITECTURE_SHIFT^I^I3$
ERROR: code indent should never use tabs
#295: FILE: include/hw/usb/dwc2-regs.h:270:
+#define GHWCFG2_SLAVE_ONLY_ARCH^I^I^I0$
ERROR: code indent should never use tabs
#296: FILE: include/hw/usb/dwc2-regs.h:271:
+#define GHWCFG2_EXT_DMA_ARCH^I^I^I1$
ERROR: code indent should never use tabs
#297: FILE: include/hw/usb/dwc2-regs.h:272:
+#define GHWCFG2_INT_DMA_ARCH^I^I^I2$
ERROR: code indent should never use tabs
#298: FILE: include/hw/usb/dwc2-regs.h:273:
+#define GHWCFG2_OP_MODE_MASK^I^I^I(0x7 << 0)$
ERROR: code indent should never use tabs
#299: FILE: include/hw/usb/dwc2-regs.h:274:
+#define GHWCFG2_OP_MODE_SHIFT^I^I^I0$
ERROR: code indent should never use tabs
#300: FILE: include/hw/usb/dwc2-regs.h:275:
+#define GHWCFG2_OP_MODE_HNP_SRP_CAPABLE^I^I0$
ERROR: code indent should never use tabs
#301: FILE: include/hw/usb/dwc2-regs.h:276:
+#define GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE^I1$
ERROR: code indent should never use tabs
#302: FILE: include/hw/usb/dwc2-regs.h:277:
+#define GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE^I2$
ERROR: code indent should never use tabs
#303: FILE: include/hw/usb/dwc2-regs.h:278:
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE^I3$
ERROR: code indent should never use tabs
#304: FILE: include/hw/usb/dwc2-regs.h:279:
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE^I4$
ERROR: code indent should never use tabs
#305: FILE: include/hw/usb/dwc2-regs.h:280:
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_HOST^I5$
ERROR: code indent should never use tabs
#306: FILE: include/hw/usb/dwc2-regs.h:281:
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST^I6$
ERROR: code indent should never use tabs
#307: FILE: include/hw/usb/dwc2-regs.h:282:
+#define GHWCFG2_OP_MODE_UNDEFINED^I^I7$
ERROR: code indent should never use tabs
#309: FILE: include/hw/usb/dwc2-regs.h:284:
+#define GHWCFG3^I^I^I^IHSOTG_REG(0x004c)$
ERROR: code indent should never use tabs
#310: FILE: include/hw/usb/dwc2-regs.h:285:
+#define GHWCFG3_DFIFO_DEPTH_MASK^I^I(0xffff << 16)$
ERROR: code indent should never use tabs
#311: FILE: include/hw/usb/dwc2-regs.h:286:
+#define GHWCFG3_DFIFO_DEPTH_SHIFT^I^I16$
ERROR: code indent should never use tabs
#312: FILE: include/hw/usb/dwc2-regs.h:287:
+#define GHWCFG3_OTG_LPM_EN^I^I^IBIT(15)$
ERROR: code indent should never use tabs
#313: FILE: include/hw/usb/dwc2-regs.h:288:
+#define GHWCFG3_BC_SUPPORT^I^I^IBIT(14)$
ERROR: code indent should never use tabs
#314: FILE: include/hw/usb/dwc2-regs.h:289:
+#define GHWCFG3_OTG_ENABLE_HSIC^I^I^IBIT(13)$
ERROR: code indent should never use tabs
#315: FILE: include/hw/usb/dwc2-regs.h:290:
+#define GHWCFG3_ADP_SUPP^I^I^IBIT(12)$
ERROR: code indent should never use tabs
#316: FILE: include/hw/usb/dwc2-regs.h:291:
+#define GHWCFG3_SYNCH_RESET_TYPE^I^IBIT(11)$
ERROR: code indent should never use tabs
#317: FILE: include/hw/usb/dwc2-regs.h:292:
+#define GHWCFG3_OPTIONAL_FEATURES^I^IBIT(10)$
ERROR: code indent should never use tabs
#318: FILE: include/hw/usb/dwc2-regs.h:293:
+#define GHWCFG3_VENDOR_CTRL_IF^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#319: FILE: include/hw/usb/dwc2-regs.h:294:
+#define GHWCFG3_I2C^I^I^I^IBIT(8)$
ERROR: code indent should never use tabs
#320: FILE: include/hw/usb/dwc2-regs.h:295:
+#define GHWCFG3_OTG_FUNC^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#321: FILE: include/hw/usb/dwc2-regs.h:296:
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK^I(0x7 << 4)$
ERROR: code indent should never use tabs
#322: FILE: include/hw/usb/dwc2-regs.h:297:
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT^I4$
ERROR: code indent should never use tabs
#323: FILE: include/hw/usb/dwc2-regs.h:298:
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK^I(0xf << 0)$
ERROR: code indent should never use tabs
#324: FILE: include/hw/usb/dwc2-regs.h:299:
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT^I0$
ERROR: code indent should never use tabs
#326: FILE: include/hw/usb/dwc2-regs.h:301:
+#define GHWCFG4^I^I^I^IHSOTG_REG(0x0050)$
ERROR: code indent should never use tabs
#327: FILE: include/hw/usb/dwc2-regs.h:302:
+#define GHWCFG4_DESC_DMA_DYN^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#328: FILE: include/hw/usb/dwc2-regs.h:303:
+#define GHWCFG4_DESC_DMA^I^I^IBIT(30)$
ERROR: code indent should never use tabs
#329: FILE: include/hw/usb/dwc2-regs.h:304:
+#define GHWCFG4_NUM_IN_EPS_MASK^I^I^I(0xf << 26)$
ERROR: code indent should never use tabs
#330: FILE: include/hw/usb/dwc2-regs.h:305:
+#define GHWCFG4_NUM_IN_EPS_SHIFT^I^I26$
ERROR: code indent should never use tabs
#331: FILE: include/hw/usb/dwc2-regs.h:306:
+#define GHWCFG4_DED_FIFO_EN^I^I^IBIT(25)$
ERROR: code indent should never use tabs
#332: FILE: include/hw/usb/dwc2-regs.h:307:
+#define GHWCFG4_DED_FIFO_SHIFT^I^I25$
ERROR: code indent should never use tabs
#333: FILE: include/hw/usb/dwc2-regs.h:308:
+#define GHWCFG4_SESSION_END_FILT_EN^I^IBIT(24)$
ERROR: code indent should never use tabs
#334: FILE: include/hw/usb/dwc2-regs.h:309:
+#define GHWCFG4_B_VALID_FILT_EN^I^I^IBIT(23)$
ERROR: code indent should never use tabs
#335: FILE: include/hw/usb/dwc2-regs.h:310:
+#define GHWCFG4_A_VALID_FILT_EN^I^I^IBIT(22)$
ERROR: code indent should never use tabs
#336: FILE: include/hw/usb/dwc2-regs.h:311:
+#define GHWCFG4_VBUS_VALID_FILT_EN^I^IBIT(21)$
ERROR: code indent should never use tabs
#337: FILE: include/hw/usb/dwc2-regs.h:312:
+#define GHWCFG4_IDDIG_FILT_EN^I^I^IBIT(20)$
ERROR: code indent should never use tabs
#338: FILE: include/hw/usb/dwc2-regs.h:313:
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_MASK^I(0xf << 16)$
ERROR: code indent should never use tabs
#339: FILE: include/hw/usb/dwc2-regs.h:314:
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT^I16$
ERROR: code indent should never use tabs
#340: FILE: include/hw/usb/dwc2-regs.h:315:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK^I(0x3 << 14)$
ERROR: code indent should never use tabs
#341: FILE: include/hw/usb/dwc2-regs.h:316:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT^I14$
ERROR: code indent should never use tabs
#342: FILE: include/hw/usb/dwc2-regs.h:317:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8^I^I0$
ERROR: code indent should never use tabs
#343: FILE: include/hw/usb/dwc2-regs.h:318:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_16^I^I1$
ERROR: code indent should never use tabs
#344: FILE: include/hw/usb/dwc2-regs.h:319:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16^I2$
ERROR: code indent should never use tabs
#345: FILE: include/hw/usb/dwc2-regs.h:320:
+#define GHWCFG4_ACG_SUPPORTED^I^I^IBIT(12)$
ERROR: code indent should never use tabs
#346: FILE: include/hw/usb/dwc2-regs.h:321:
+#define GHWCFG4_IPG_ISOC_SUPPORTED^I^IBIT(11)$
ERROR: code indent should never use tabs
#348: FILE: include/hw/usb/dwc2-regs.h:323:
+#define GHWCFG4_XHIBER^I^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#349: FILE: include/hw/usb/dwc2-regs.h:324:
+#define GHWCFG4_HIBER^I^I^I^IBIT(6)$
ERROR: code indent should never use tabs
#350: FILE: include/hw/usb/dwc2-regs.h:325:
+#define GHWCFG4_MIN_AHB_FREQ^I^I^IBIT(5)$
ERROR: code indent should never use tabs
#351: FILE: include/hw/usb/dwc2-regs.h:326:
+#define GHWCFG4_POWER_OPTIMIZ^I^I^IBIT(4)$
ERROR: code indent should never use tabs
#352: FILE: include/hw/usb/dwc2-regs.h:327:
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK^I(0xf << 0)$
ERROR: code indent should never use tabs
#353: FILE: include/hw/usb/dwc2-regs.h:328:
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT^I0$
ERROR: code indent should never use tabs
#355: FILE: include/hw/usb/dwc2-regs.h:330:
+#define GLPMCFG^I^I^I^IHSOTG_REG(0x0054)$
ERROR: code indent should never use tabs
#356: FILE: include/hw/usb/dwc2-regs.h:331:
+#define GLPMCFG_INVSELHSIC^I^IBIT(31)$
ERROR: code indent should never use tabs
#357: FILE: include/hw/usb/dwc2-regs.h:332:
+#define GLPMCFG_HSICCON^I^I^IBIT(30)$
ERROR: code indent should never use tabs
#358: FILE: include/hw/usb/dwc2-regs.h:333:
+#define GLPMCFG_RSTRSLPSTS^I^IBIT(29)$
ERROR: code indent should never use tabs
#359: FILE: include/hw/usb/dwc2-regs.h:334:
+#define GLPMCFG_ENBESL^I^I^IBIT(28)$
ERROR: code indent should never use tabs
#360: FILE: include/hw/usb/dwc2-regs.h:335:
+#define GLPMCFG_LPM_RETRYCNT_STS_MASK^I(0x7 << 25)$
ERROR: code indent should never use tabs
#361: FILE: include/hw/usb/dwc2-regs.h:336:
+#define GLPMCFG_LPM_RETRYCNT_STS_SHIFT^I25$
ERROR: code indent should never use tabs
#362: FILE: include/hw/usb/dwc2-regs.h:337:
+#define GLPMCFG_SNDLPM^I^I^IBIT(24)$
ERROR: code indent should never use tabs
#363: FILE: include/hw/usb/dwc2-regs.h:338:
+#define GLPMCFG_RETRY_CNT_MASK^I^I(0x7 << 21)$
ERROR: code indent should never use tabs
#364: FILE: include/hw/usb/dwc2-regs.h:339:
+#define GLPMCFG_RETRY_CNT_SHIFT^I^I21$
ERROR: code indent should never use tabs
#365: FILE: include/hw/usb/dwc2-regs.h:340:
+#define GLPMCFG_LPM_REJECT_CTRL_CONTROL^IBIT(21)$
ERROR: code indent should never use tabs
#366: FILE: include/hw/usb/dwc2-regs.h:341:
+#define GLPMCFG_LPM_ACCEPT_CTRL_ISOC^IBIT(22)$
ERROR: code indent should never use tabs
#367: FILE: include/hw/usb/dwc2-regs.h:342:
+#define GLPMCFG_LPM_CHNL_INDX_MASK^I(0xf << 17)$
ERROR: code indent should never use tabs
#368: FILE: include/hw/usb/dwc2-regs.h:343:
+#define GLPMCFG_LPM_CHNL_INDX_SHIFT^I17$
ERROR: code indent should never use tabs
#369: FILE: include/hw/usb/dwc2-regs.h:344:
+#define GLPMCFG_L1RESUMEOK^I^IBIT(16)$
ERROR: code indent should never use tabs
#370: FILE: include/hw/usb/dwc2-regs.h:345:
+#define GLPMCFG_SLPSTS^I^I^IBIT(15)$
ERROR: code indent should never use tabs
#371: FILE: include/hw/usb/dwc2-regs.h:346:
+#define GLPMCFG_COREL1RES_MASK^I^I(0x3 << 13)$
ERROR: code indent should never use tabs
#372: FILE: include/hw/usb/dwc2-regs.h:347:
+#define GLPMCFG_COREL1RES_SHIFT^I^I13$
ERROR: code indent should never use tabs
#373: FILE: include/hw/usb/dwc2-regs.h:348:
+#define GLPMCFG_HIRD_THRES_MASK^I^I(0x1f << 8)$
ERROR: code indent should never use tabs
#374: FILE: include/hw/usb/dwc2-regs.h:349:
+#define GLPMCFG_HIRD_THRES_SHIFT^I8$
ERROR: code indent should never use tabs
#375: FILE: include/hw/usb/dwc2-regs.h:350:
+#define GLPMCFG_HIRD_THRES_EN^I^I(0x10 << 8)$
ERROR: code indent should never use tabs
#376: FILE: include/hw/usb/dwc2-regs.h:351:
+#define GLPMCFG_ENBLSLPM^I^IBIT(7)$
ERROR: code indent should never use tabs
#377: FILE: include/hw/usb/dwc2-regs.h:352:
+#define GLPMCFG_BREMOTEWAKE^I^IBIT(6)$
ERROR: code indent should never use tabs
#378: FILE: include/hw/usb/dwc2-regs.h:353:
+#define GLPMCFG_HIRD_MASK^I^I(0xf << 2)$
ERROR: code indent should never use tabs
#379: FILE: include/hw/usb/dwc2-regs.h:354:
+#define GLPMCFG_HIRD_SHIFT^I^I2$
ERROR: code indent should never use tabs
#380: FILE: include/hw/usb/dwc2-regs.h:355:
+#define GLPMCFG_APPL1RES^I^IBIT(1)$
ERROR: code indent should never use tabs
#381: FILE: include/hw/usb/dwc2-regs.h:356:
+#define GLPMCFG_LPMCAP^I^I^IBIT(0)$
ERROR: code indent should never use tabs
#383: FILE: include/hw/usb/dwc2-regs.h:358:
+#define GPWRDN^I^I^I^IHSOTG_REG(0x0058)$
ERROR: code indent should never use tabs
#384: FILE: include/hw/usb/dwc2-regs.h:359:
+#define GPWRDN_MULT_VAL_ID_BC_MASK^I(0x1f << 24)$
ERROR: code indent should never use tabs
#385: FILE: include/hw/usb/dwc2-regs.h:360:
+#define GPWRDN_MULT_VAL_ID_BC_SHIFT^I24$
ERROR: code indent should never use tabs
#386: FILE: include/hw/usb/dwc2-regs.h:361:
+#define GPWRDN_ADP_INT^I^I^IBIT(23)$
ERROR: code indent should never use tabs
#387: FILE: include/hw/usb/dwc2-regs.h:362:
+#define GPWRDN_BSESSVLD^I^I^IBIT(22)$
ERROR: code indent should never use tabs
#388: FILE: include/hw/usb/dwc2-regs.h:363:
+#define GPWRDN_IDSTS^I^I^IBIT(21)$
ERROR: code indent should never use tabs
#389: FILE: include/hw/usb/dwc2-regs.h:364:
+#define GPWRDN_LINESTATE_MASK^I^I(0x3 << 19)$
ERROR: code indent should never use tabs
#390: FILE: include/hw/usb/dwc2-regs.h:365:
+#define GPWRDN_LINESTATE_SHIFT^I^I19$
ERROR: code indent should never use tabs
#391: FILE: include/hw/usb/dwc2-regs.h:366:
+#define GPWRDN_STS_CHGINT_MSK^I^IBIT(18)$
ERROR: code indent should never use tabs
#392: FILE: include/hw/usb/dwc2-regs.h:367:
+#define GPWRDN_STS_CHGINT^I^IBIT(17)$
ERROR: code indent should never use tabs
#393: FILE: include/hw/usb/dwc2-regs.h:368:
+#define GPWRDN_SRP_DET_MSK^I^IBIT(16)$
ERROR: code indent should never use tabs
#394: FILE: include/hw/usb/dwc2-regs.h:369:
+#define GPWRDN_SRP_DET^I^I^IBIT(15)$
ERROR: code indent should never use tabs
#395: FILE: include/hw/usb/dwc2-regs.h:370:
+#define GPWRDN_CONNECT_DET_MSK^I^IBIT(14)$
ERROR: code indent should never use tabs
#396: FILE: include/hw/usb/dwc2-regs.h:371:
+#define GPWRDN_CONNECT_DET^I^IBIT(13)$
ERROR: code indent should never use tabs
#397: FILE: include/hw/usb/dwc2-regs.h:372:
+#define GPWRDN_DISCONN_DET_MSK^I^IBIT(12)$
ERROR: code indent should never use tabs
#398: FILE: include/hw/usb/dwc2-regs.h:373:
+#define GPWRDN_DISCONN_DET^I^IBIT(11)$
ERROR: code indent should never use tabs
#399: FILE: include/hw/usb/dwc2-regs.h:374:
+#define GPWRDN_RST_DET_MSK^I^IBIT(10)$
ERROR: code indent should never use tabs
#400: FILE: include/hw/usb/dwc2-regs.h:375:
+#define GPWRDN_RST_DET^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#401: FILE: include/hw/usb/dwc2-regs.h:376:
+#define GPWRDN_LNSTSCHG_MSK^I^IBIT(8)$
ERROR: code indent should never use tabs
#402: FILE: include/hw/usb/dwc2-regs.h:377:
+#define GPWRDN_LNSTSCHG^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#403: FILE: include/hw/usb/dwc2-regs.h:378:
+#define GPWRDN_DIS_VBUS^I^I^IBIT(6)$
ERROR: code indent should never use tabs
#404: FILE: include/hw/usb/dwc2-regs.h:379:
+#define GPWRDN_PWRDNSWTCH^I^IBIT(5)$
ERROR: code indent should never use tabs
#405: FILE: include/hw/usb/dwc2-regs.h:380:
+#define GPWRDN_PWRDNRSTN^I^IBIT(4)$
ERROR: code indent should never use tabs
#406: FILE: include/hw/usb/dwc2-regs.h:381:
+#define GPWRDN_PWRDNCLMP^I^IBIT(3)$
ERROR: code indent should never use tabs
#407: FILE: include/hw/usb/dwc2-regs.h:382:
+#define GPWRDN_RESTORE^I^I^IBIT(2)$
ERROR: code indent should never use tabs
#408: FILE: include/hw/usb/dwc2-regs.h:383:
+#define GPWRDN_PMUACTV^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#409: FILE: include/hw/usb/dwc2-regs.h:384:
+#define GPWRDN_PMUINTSEL^I^IBIT(0)$
ERROR: code indent should never use tabs
#411: FILE: include/hw/usb/dwc2-regs.h:386:
+#define GDFIFOCFG^I^I^IHSOTG_REG(0x005c)$
ERROR: code indent should never use tabs
#412: FILE: include/hw/usb/dwc2-regs.h:387:
+#define GDFIFOCFG_EPINFOBASE_MASK^I(0xffff << 16)$
ERROR: code indent should never use tabs
#413: FILE: include/hw/usb/dwc2-regs.h:388:
+#define GDFIFOCFG_EPINFOBASE_SHIFT^I16$
ERROR: code indent should never use tabs
#414: FILE: include/hw/usb/dwc2-regs.h:389:
+#define GDFIFOCFG_GDFIFOCFG_MASK^I(0xffff << 0)$
ERROR: code indent should never use tabs
#415: FILE: include/hw/usb/dwc2-regs.h:390:
+#define GDFIFOCFG_GDFIFOCFG_SHIFT^I0$
ERROR: code indent should never use tabs
#417: FILE: include/hw/usb/dwc2-regs.h:392:
+#define ADPCTL^I^I^I^IHSOTG_REG(0x0060)$
ERROR: code indent should never use tabs
#418: FILE: include/hw/usb/dwc2-regs.h:393:
+#define ADPCTL_AR_MASK^I^I^I(0x3 << 27)$
ERROR: code indent should never use tabs
#419: FILE: include/hw/usb/dwc2-regs.h:394:
+#define ADPCTL_AR_SHIFT^I^I^I27$
ERROR: code indent should never use tabs
#420: FILE: include/hw/usb/dwc2-regs.h:395:
+#define ADPCTL_ADP_TMOUT_INT_MSK^IBIT(26)$
ERROR: code indent should never use tabs
#421: FILE: include/hw/usb/dwc2-regs.h:396:
+#define ADPCTL_ADP_SNS_INT_MSK^I^IBIT(25)$
ERROR: code indent should never use tabs
#422: FILE: include/hw/usb/dwc2-regs.h:397:
+#define ADPCTL_ADP_PRB_INT_MSK^I^IBIT(24)$
ERROR: code indent should never use tabs
#423: FILE: include/hw/usb/dwc2-regs.h:398:
+#define ADPCTL_ADP_TMOUT_INT^I^IBIT(23)$
ERROR: code indent should never use tabs
#424: FILE: include/hw/usb/dwc2-regs.h:399:
+#define ADPCTL_ADP_SNS_INT^I^IBIT(22)$
ERROR: code indent should never use tabs
#425: FILE: include/hw/usb/dwc2-regs.h:400:
+#define ADPCTL_ADP_PRB_INT^I^IBIT(21)$
ERROR: code indent should never use tabs
#426: FILE: include/hw/usb/dwc2-regs.h:401:
+#define ADPCTL_ADPENA^I^I^IBIT(20)$
ERROR: code indent should never use tabs
#427: FILE: include/hw/usb/dwc2-regs.h:402:
+#define ADPCTL_ADPRES^I^I^IBIT(19)$
ERROR: code indent should never use tabs
#428: FILE: include/hw/usb/dwc2-regs.h:403:
+#define ADPCTL_ENASNS^I^I^IBIT(18)$
ERROR: code indent should never use tabs
#429: FILE: include/hw/usb/dwc2-regs.h:404:
+#define ADPCTL_ENAPRB^I^I^IBIT(17)$
ERROR: code indent should never use tabs
#430: FILE: include/hw/usb/dwc2-regs.h:405:
+#define ADPCTL_RTIM_MASK^I^I(0x7ff << 6)$
ERROR: code indent should never use tabs
#431: FILE: include/hw/usb/dwc2-regs.h:406:
+#define ADPCTL_RTIM_SHIFT^I^I6$
ERROR: code indent should never use tabs
#432: FILE: include/hw/usb/dwc2-regs.h:407:
+#define ADPCTL_PRB_PER_MASK^I^I(0x3 << 4)$
ERROR: code indent should never use tabs
#433: FILE: include/hw/usb/dwc2-regs.h:408:
+#define ADPCTL_PRB_PER_SHIFT^I^I4$
ERROR: code indent should never use tabs
#434: FILE: include/hw/usb/dwc2-regs.h:409:
+#define ADPCTL_PRB_DELTA_MASK^I^I(0x3 << 2)$
ERROR: code indent should never use tabs
#435: FILE: include/hw/usb/dwc2-regs.h:410:
+#define ADPCTL_PRB_DELTA_SHIFT^I^I2$
ERROR: code indent should never use tabs
#436: FILE: include/hw/usb/dwc2-regs.h:411:
+#define ADPCTL_PRB_DSCHRG_MASK^I^I(0x3 << 0)$
ERROR: code indent should never use tabs
#437: FILE: include/hw/usb/dwc2-regs.h:412:
+#define ADPCTL_PRB_DSCHRG_SHIFT^I^I0$
ERROR: code indent should never use tabs
#439: FILE: include/hw/usb/dwc2-regs.h:414:
+#define GREFCLK^I^I^I^I HSOTG_REG(0x0064)$
ERROR: code indent should never use tabs
#440: FILE: include/hw/usb/dwc2-regs.h:415:
+#define GREFCLK_REFCLKPER_MASK^I^I (0x1ffff << 15)$
ERROR: code indent should never use tabs
#441: FILE: include/hw/usb/dwc2-regs.h:416:
+#define GREFCLK_REFCLKPER_SHIFT^I^I 15$
ERROR: code indent should never use tabs
#442: FILE: include/hw/usb/dwc2-regs.h:417:
+#define GREFCLK_REF_CLK_MODE^I^I BIT(14)$
ERROR: code indent should never use tabs
#443: FILE: include/hw/usb/dwc2-regs.h:418:
+#define GREFCLK_SOF_CNT_WKUP_ALERT_MASK^I (0x3ff)$
ERROR: code indent should never use tabs
#446: FILE: include/hw/usb/dwc2-regs.h:421:
+#define GINTMSK2^I^I^IHSOTG_REG(0x0068)$
ERROR: code indent should never use tabs
#447: FILE: include/hw/usb/dwc2-regs.h:422:
+#define GINTMSK2_WKUP_ALERT_INT_MSK^IBIT(0)$
ERROR: code indent should never use tabs
#449: FILE: include/hw/usb/dwc2-regs.h:424:
+#define GINTSTS2^I^I^IHSOTG_REG(0x006c)$
ERROR: code indent should never use tabs
#450: FILE: include/hw/usb/dwc2-regs.h:425:
+#define GINTSTS2_WKUP_ALERT_INT^I^IBIT(0)$
ERROR: code indent should never use tabs
#452: FILE: include/hw/usb/dwc2-regs.h:427:
+#define HPTXFSIZ^I^I^IHSOTG_REG(0x100)$
ERROR: code indent should never use tabs
#455: FILE: include/hw/usb/dwc2-regs.h:430:
+#define DPTXFSIZN(_a)^I^I^IHSOTG_REG(0x104 + (((_a) - 1) * 4))$
ERROR: code indent should never use tabs
#459: FILE: include/hw/usb/dwc2-regs.h:434:
+#define FIFOSIZE_DEPTH_MASK^I^I(0xffff << 16)$
ERROR: code indent should never use tabs
#460: FILE: include/hw/usb/dwc2-regs.h:435:
+#define FIFOSIZE_DEPTH_SHIFT^I^I16$
ERROR: code indent should never use tabs
#461: FILE: include/hw/usb/dwc2-regs.h:436:
+#define FIFOSIZE_STARTADDR_MASK^I^I(0xffff << 0)$
ERROR: code indent should never use tabs
#462: FILE: include/hw/usb/dwc2-regs.h:437:
+#define FIFOSIZE_STARTADDR_SHIFT^I0$
ERROR: code indent should never use tabs
#463: FILE: include/hw/usb/dwc2-regs.h:438:
+#define FIFOSIZE_DEPTH_GET(_x)^I^I(((_x) >> 16) & 0xffff)$
ERROR: code indent should never use tabs
#467: FILE: include/hw/usb/dwc2-regs.h:442:
+#define DCFG^I^I^I^IHSOTG_REG(0x800)$
ERROR: code indent should never use tabs
#468: FILE: include/hw/usb/dwc2-regs.h:443:
+#define DCFG_DESCDMA_EN^I^I^IBIT(23)$
ERROR: code indent should never use tabs
#469: FILE: include/hw/usb/dwc2-regs.h:444:
+#define DCFG_EPMISCNT_MASK^I^I(0x1f << 18)$
ERROR: code indent should never use tabs
#470: FILE: include/hw/usb/dwc2-regs.h:445:
+#define DCFG_EPMISCNT_SHIFT^I^I18$
ERROR: code indent should never use tabs
#471: FILE: include/hw/usb/dwc2-regs.h:446:
+#define DCFG_EPMISCNT_LIMIT^I^I0x1f$
ERROR: code indent should never use tabs
#472: FILE: include/hw/usb/dwc2-regs.h:447:
+#define DCFG_EPMISCNT(_x)^I^I((_x) << 18)$
ERROR: code indent should never use tabs
#473: FILE: include/hw/usb/dwc2-regs.h:448:
+#define DCFG_IPG_ISOC_SUPPORDED^I^IBIT(17)$
ERROR: code indent should never use tabs
#474: FILE: include/hw/usb/dwc2-regs.h:449:
+#define DCFG_PERFRINT_MASK^I^I(0x3 << 11)$
ERROR: code indent should never use tabs
#475: FILE: include/hw/usb/dwc2-regs.h:450:
+#define DCFG_PERFRINT_SHIFT^I^I11$
ERROR: code indent should never use tabs
#476: FILE: include/hw/usb/dwc2-regs.h:451:
+#define DCFG_PERFRINT_LIMIT^I^I0x3$
ERROR: code indent should never use tabs
#477: FILE: include/hw/usb/dwc2-regs.h:452:
+#define DCFG_PERFRINT(_x)^I^I((_x) << 11)$
ERROR: code indent should never use tabs
#478: FILE: include/hw/usb/dwc2-regs.h:453:
+#define DCFG_DEVADDR_MASK^I^I(0x7f << 4)$
ERROR: code indent should never use tabs
#479: FILE: include/hw/usb/dwc2-regs.h:454:
+#define DCFG_DEVADDR_SHIFT^I^I4$
ERROR: code indent should never use tabs
#480: FILE: include/hw/usb/dwc2-regs.h:455:
+#define DCFG_DEVADDR_LIMIT^I^I0x7f$
ERROR: code indent should never use tabs
#481: FILE: include/hw/usb/dwc2-regs.h:456:
+#define DCFG_DEVADDR(_x)^I^I((_x) << 4)$
ERROR: code indent should never use tabs
#482: FILE: include/hw/usb/dwc2-regs.h:457:
+#define DCFG_NZ_STS_OUT_HSHK^I^IBIT(2)$
ERROR: code indent should never use tabs
#483: FILE: include/hw/usb/dwc2-regs.h:458:
+#define DCFG_DEVSPD_MASK^I^I(0x3 << 0)$
ERROR: code indent should never use tabs
#484: FILE: include/hw/usb/dwc2-regs.h:459:
+#define DCFG_DEVSPD_SHIFT^I^I0$
ERROR: code indent should never use tabs
#485: FILE: include/hw/usb/dwc2-regs.h:460:
+#define DCFG_DEVSPD_HS^I^I^I0$
ERROR: code indent should never use tabs
#486: FILE: include/hw/usb/dwc2-regs.h:461:
+#define DCFG_DEVSPD_FS^I^I^I1$
ERROR: code indent should never use tabs
#487: FILE: include/hw/usb/dwc2-regs.h:462:
+#define DCFG_DEVSPD_LS^I^I^I2$
ERROR: code indent should never use tabs
#488: FILE: include/hw/usb/dwc2-regs.h:463:
+#define DCFG_DEVSPD_FS48^I^I3$
ERROR: code indent should never use tabs
#490: FILE: include/hw/usb/dwc2-regs.h:465:
+#define DCTL^I^I^I^IHSOTG_REG(0x804)$
ERROR: code indent should never use tabs
#492: FILE: include/hw/usb/dwc2-regs.h:467:
+#define DCTL_PWRONPRGDONE^I^IBIT(11)$
ERROR: code indent should never use tabs
#493: FILE: include/hw/usb/dwc2-regs.h:468:
+#define DCTL_CGOUTNAK^I^I^IBIT(10)$
ERROR: code indent should never use tabs
#494: FILE: include/hw/usb/dwc2-regs.h:469:
+#define DCTL_SGOUTNAK^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#495: FILE: include/hw/usb/dwc2-regs.h:470:
+#define DCTL_CGNPINNAK^I^I^IBIT(8)$
ERROR: code indent should never use tabs
#496: FILE: include/hw/usb/dwc2-regs.h:471:
+#define DCTL_SGNPINNAK^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#497: FILE: include/hw/usb/dwc2-regs.h:472:
+#define DCTL_TSTCTL_MASK^I^I(0x7 << 4)$
ERROR: code indent should never use tabs
#498: FILE: include/hw/usb/dwc2-regs.h:473:
+#define DCTL_TSTCTL_SHIFT^I^I4$
ERROR: code indent should never use tabs
#499: FILE: include/hw/usb/dwc2-regs.h:474:
+#define DCTL_GOUTNAKSTS^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#500: FILE: include/hw/usb/dwc2-regs.h:475:
+#define DCTL_GNPINNAKSTS^I^IBIT(2)$
ERROR: code indent should never use tabs
#501: FILE: include/hw/usb/dwc2-regs.h:476:
+#define DCTL_SFTDISCON^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#502: FILE: include/hw/usb/dwc2-regs.h:477:
+#define DCTL_RMTWKUPSIG^I^I^IBIT(0)$
ERROR: code indent should never use tabs
#504: FILE: include/hw/usb/dwc2-regs.h:479:
+#define DSTS^I^I^I^IHSOTG_REG(0x808)$
ERROR: code indent should never use tabs
#505: FILE: include/hw/usb/dwc2-regs.h:480:
+#define DSTS_SOFFN_MASK^I^I^I(0x3fff << 8)$
ERROR: code indent should never use tabs
#506: FILE: include/hw/usb/dwc2-regs.h:481:
+#define DSTS_SOFFN_SHIFT^I^I8$
ERROR: code indent should never use tabs
#507: FILE: include/hw/usb/dwc2-regs.h:482:
+#define DSTS_SOFFN_LIMIT^I^I0x3fff$
ERROR: code indent should never use tabs
#508: FILE: include/hw/usb/dwc2-regs.h:483:
+#define DSTS_SOFFN(_x)^I^I^I((_x) << 8)$
ERROR: code indent should never use tabs
#509: FILE: include/hw/usb/dwc2-regs.h:484:
+#define DSTS_ERRATICERR^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#510: FILE: include/hw/usb/dwc2-regs.h:485:
+#define DSTS_ENUMSPD_MASK^I^I(0x3 << 1)$
ERROR: code indent should never use tabs
#511: FILE: include/hw/usb/dwc2-regs.h:486:
+#define DSTS_ENUMSPD_SHIFT^I^I1$
ERROR: code indent should never use tabs
#512: FILE: include/hw/usb/dwc2-regs.h:487:
+#define DSTS_ENUMSPD_HS^I^I^I0$
ERROR: code indent should never use tabs
#513: FILE: include/hw/usb/dwc2-regs.h:488:
+#define DSTS_ENUMSPD_FS^I^I^I1$
ERROR: code indent should never use tabs
#514: FILE: include/hw/usb/dwc2-regs.h:489:
+#define DSTS_ENUMSPD_LS^I^I^I2$
ERROR: code indent should never use tabs
#515: FILE: include/hw/usb/dwc2-regs.h:490:
+#define DSTS_ENUMSPD_FS48^I^I3$
ERROR: code indent should never use tabs
#516: FILE: include/hw/usb/dwc2-regs.h:491:
+#define DSTS_SUSPSTS^I^I^IBIT(0)$
ERROR: code indent should never use tabs
#518: FILE: include/hw/usb/dwc2-regs.h:493:
+#define DIEPMSK^I^I^I^IHSOTG_REG(0x810)$
ERROR: code indent should never use tabs
#519: FILE: include/hw/usb/dwc2-regs.h:494:
+#define DIEPMSK_NAKMSK^I^I^IBIT(13)$
ERROR: code indent should never use tabs
#520: FILE: include/hw/usb/dwc2-regs.h:495:
+#define DIEPMSK_BNAININTRMSK^I^IBIT(9)$
ERROR: code indent should never use tabs
#521: FILE: include/hw/usb/dwc2-regs.h:496:
+#define DIEPMSK_TXFIFOUNDRNMSK^I^IBIT(8)$
ERROR: code indent should never use tabs
#522: FILE: include/hw/usb/dwc2-regs.h:497:
+#define DIEPMSK_TXFIFOEMPTY^I^IBIT(7)$
ERROR: code indent should never use tabs
#523: FILE: include/hw/usb/dwc2-regs.h:498:
+#define DIEPMSK_INEPNAKEFFMSK^I^IBIT(6)$
ERROR: code indent should never use tabs
#524: FILE: include/hw/usb/dwc2-regs.h:499:
+#define DIEPMSK_INTKNEPMISMSK^I^IBIT(5)$
ERROR: code indent should never use tabs
#525: FILE: include/hw/usb/dwc2-regs.h:500:
+#define DIEPMSK_INTKNTXFEMPMSK^I^IBIT(4)$
ERROR: code indent should never use tabs
#526: FILE: include/hw/usb/dwc2-regs.h:501:
+#define DIEPMSK_TIMEOUTMSK^I^IBIT(3)$
ERROR: code indent should never use tabs
#527: FILE: include/hw/usb/dwc2-regs.h:502:
+#define DIEPMSK_AHBERRMSK^I^IBIT(2)$
ERROR: code indent should never use tabs
#528: FILE: include/hw/usb/dwc2-regs.h:503:
+#define DIEPMSK_EPDISBLDMSK^I^IBIT(1)$
ERROR: code indent should never use tabs
#529: FILE: include/hw/usb/dwc2-regs.h:504:
+#define DIEPMSK_XFERCOMPLMSK^I^IBIT(0)$
ERROR: code indent should never use tabs
#531: FILE: include/hw/usb/dwc2-regs.h:506:
+#define DOEPMSK^I^I^I^IHSOTG_REG(0x814)$
ERROR: code indent should never use tabs
#532: FILE: include/hw/usb/dwc2-regs.h:507:
+#define DOEPMSK_BNAMSK^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#533: FILE: include/hw/usb/dwc2-regs.h:508:
+#define DOEPMSK_BACK2BACKSETUP^I^IBIT(6)$
ERROR: code indent should never use tabs
#534: FILE: include/hw/usb/dwc2-regs.h:509:
+#define DOEPMSK_STSPHSERCVDMSK^I^IBIT(5)$
ERROR: code indent should never use tabs
#535: FILE: include/hw/usb/dwc2-regs.h:510:
+#define DOEPMSK_OUTTKNEPDISMSK^I^IBIT(4)$
ERROR: code indent should never use tabs
#536: FILE: include/hw/usb/dwc2-regs.h:511:
+#define DOEPMSK_SETUPMSK^I^IBIT(3)$
ERROR: code indent should never use tabs
#537: FILE: include/hw/usb/dwc2-regs.h:512:
+#define DOEPMSK_AHBERRMSK^I^IBIT(2)$
ERROR: code indent should never use tabs
#538: FILE: include/hw/usb/dwc2-regs.h:513:
+#define DOEPMSK_EPDISBLDMSK^I^IBIT(1)$
ERROR: code indent should never use tabs
#539: FILE: include/hw/usb/dwc2-regs.h:514:
+#define DOEPMSK_XFERCOMPLMSK^I^IBIT(0)$
ERROR: code indent should never use tabs
#541: FILE: include/hw/usb/dwc2-regs.h:516:
+#define DAINT^I^I^I^IHSOTG_REG(0x818)$
ERROR: code indent should never use tabs
#542: FILE: include/hw/usb/dwc2-regs.h:517:
+#define DAINTMSK^I^I^IHSOTG_REG(0x81C)$
ERROR: code indent should never use tabs
#543: FILE: include/hw/usb/dwc2-regs.h:518:
+#define DAINT_OUTEP_SHIFT^I^I16$
ERROR: code indent should never use tabs
#544: FILE: include/hw/usb/dwc2-regs.h:519:
+#define DAINT_OUTEP(_x)^I^I^I(1 << ((_x) + 16))$
ERROR: code indent should never use tabs
#545: FILE: include/hw/usb/dwc2-regs.h:520:
+#define DAINT_INEP(_x)^I^I^I(1 << (_x))$
ERROR: code indent should never use tabs
#547: FILE: include/hw/usb/dwc2-regs.h:522:
+#define DTKNQR1^I^I^I^IHSOTG_REG(0x820)$
ERROR: code indent should never use tabs
#548: FILE: include/hw/usb/dwc2-regs.h:523:
+#define DTKNQR2^I^I^I^IHSOTG_REG(0x824)$
ERROR: code indent should never use tabs
#549: FILE: include/hw/usb/dwc2-regs.h:524:
+#define DTKNQR3^I^I^I^IHSOTG_REG(0x830)$
ERROR: code indent should never use tabs
#550: FILE: include/hw/usb/dwc2-regs.h:525:
+#define DTKNQR4^I^I^I^IHSOTG_REG(0x834)$
ERROR: code indent should never use tabs
#551: FILE: include/hw/usb/dwc2-regs.h:526:
+#define DIEPEMPMSK^I^I^IHSOTG_REG(0x834)$
ERROR: code indent should never use tabs
#553: FILE: include/hw/usb/dwc2-regs.h:528:
+#define DVBUSDIS^I^I^IHSOTG_REG(0x828)$
ERROR: code indent should never use tabs
#554: FILE: include/hw/usb/dwc2-regs.h:529:
+#define DVBUSPULSE^I^I^IHSOTG_REG(0x82C)$
ERROR: code indent should never use tabs
#556: FILE: include/hw/usb/dwc2-regs.h:531:
+#define DIEPCTL0^I^I^IHSOTG_REG(0x900)$
ERROR: code indent should never use tabs
#557: FILE: include/hw/usb/dwc2-regs.h:532:
+#define DIEPCTL(_a)^I^I^IHSOTG_REG(0x900 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#559: FILE: include/hw/usb/dwc2-regs.h:534:
+#define DOEPCTL0^I^I^IHSOTG_REG(0xB00)$
ERROR: code indent should never use tabs
#560: FILE: include/hw/usb/dwc2-regs.h:535:
+#define DOEPCTL(_a)^I^I^IHSOTG_REG(0xB00 + ((_a) * 0x20))$
WARNING: Block comments use a leading /* on a separate line
#562: FILE: include/hw/usb/dwc2-regs.h:537:
+/* EP0 specialness:
ERROR: code indent should never use tabs
#567: FILE: include/hw/usb/dwc2-regs.h:542:
+#define D0EPCTL_MPS_MASK^I^I(0x3 << 0)$
ERROR: code indent should never use tabs
#568: FILE: include/hw/usb/dwc2-regs.h:543:
+#define D0EPCTL_MPS_SHIFT^I^I0$
ERROR: code indent should never use tabs
#569: FILE: include/hw/usb/dwc2-regs.h:544:
+#define D0EPCTL_MPS_64^I^I^I0$
ERROR: code indent should never use tabs
#570: FILE: include/hw/usb/dwc2-regs.h:545:
+#define D0EPCTL_MPS_32^I^I^I1$
ERROR: code indent should never use tabs
#571: FILE: include/hw/usb/dwc2-regs.h:546:
+#define D0EPCTL_MPS_16^I^I^I2$
ERROR: code indent should never use tabs
#572: FILE: include/hw/usb/dwc2-regs.h:547:
+#define D0EPCTL_MPS_8^I^I^I3$
ERROR: code indent should never use tabs
#574: FILE: include/hw/usb/dwc2-regs.h:549:
+#define DXEPCTL_EPENA^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#575: FILE: include/hw/usb/dwc2-regs.h:550:
+#define DXEPCTL_EPDIS^I^I^IBIT(30)$
ERROR: code indent should never use tabs
#576: FILE: include/hw/usb/dwc2-regs.h:551:
+#define DXEPCTL_SETD1PID^I^IBIT(29)$
ERROR: code indent should never use tabs
#577: FILE: include/hw/usb/dwc2-regs.h:552:
+#define DXEPCTL_SETODDFR^I^IBIT(29)$
ERROR: code indent should never use tabs
#578: FILE: include/hw/usb/dwc2-regs.h:553:
+#define DXEPCTL_SETD0PID^I^IBIT(28)$
ERROR: code indent should never use tabs
#579: FILE: include/hw/usb/dwc2-regs.h:554:
+#define DXEPCTL_SETEVENFR^I^IBIT(28)$
ERROR: code indent should never use tabs
#580: FILE: include/hw/usb/dwc2-regs.h:555:
+#define DXEPCTL_SNAK^I^I^IBIT(27)$
ERROR: code indent should never use tabs
#581: FILE: include/hw/usb/dwc2-regs.h:556:
+#define DXEPCTL_CNAK^I^I^IBIT(26)$
ERROR: code indent should never use tabs
#582: FILE: include/hw/usb/dwc2-regs.h:557:
+#define DXEPCTL_TXFNUM_MASK^I^I(0xf << 22)$
ERROR: code indent should never use tabs
#583: FILE: include/hw/usb/dwc2-regs.h:558:
+#define DXEPCTL_TXFNUM_SHIFT^I^I22$
ERROR: code indent should never use tabs
#584: FILE: include/hw/usb/dwc2-regs.h:559:
+#define DXEPCTL_TXFNUM_LIMIT^I^I0xf$
ERROR: code indent should never use tabs
#585: FILE: include/hw/usb/dwc2-regs.h:560:
+#define DXEPCTL_TXFNUM(_x)^I^I((_x) << 22)$
ERROR: code indent should never use tabs
#586: FILE: include/hw/usb/dwc2-regs.h:561:
+#define DXEPCTL_STALL^I^I^IBIT(21)$
ERROR: code indent should never use tabs
#587: FILE: include/hw/usb/dwc2-regs.h:562:
+#define DXEPCTL_SNP^I^I^IBIT(20)$
ERROR: code indent should never use tabs
#588: FILE: include/hw/usb/dwc2-regs.h:563:
+#define DXEPCTL_EPTYPE_MASK^I^I(0x3 << 18)$
ERROR: code indent should never use tabs
#589: FILE: include/hw/usb/dwc2-regs.h:564:
+#define DXEPCTL_EPTYPE_CONTROL^I^I(0x0 << 18)$
ERROR: code indent should never use tabs
#590: FILE: include/hw/usb/dwc2-regs.h:565:
+#define DXEPCTL_EPTYPE_ISO^I^I(0x1 << 18)$
ERROR: code indent should never use tabs
#591: FILE: include/hw/usb/dwc2-regs.h:566:
+#define DXEPCTL_EPTYPE_BULK^I^I(0x2 << 18)$
ERROR: code indent should never use tabs
#592: FILE: include/hw/usb/dwc2-regs.h:567:
+#define DXEPCTL_EPTYPE_INTERRUPT^I(0x3 << 18)$
ERROR: code indent should never use tabs
#594: FILE: include/hw/usb/dwc2-regs.h:569:
+#define DXEPCTL_NAKSTS^I^I^IBIT(17)$
ERROR: code indent should never use tabs
#595: FILE: include/hw/usb/dwc2-regs.h:570:
+#define DXEPCTL_DPID^I^I^IBIT(16)$
ERROR: code indent should never use tabs
#596: FILE: include/hw/usb/dwc2-regs.h:571:
+#define DXEPCTL_EOFRNUM^I^I^IBIT(16)$
ERROR: code indent should never use tabs
#597: FILE: include/hw/usb/dwc2-regs.h:572:
+#define DXEPCTL_USBACTEP^I^IBIT(15)$
ERROR: code indent should never use tabs
#598: FILE: include/hw/usb/dwc2-regs.h:573:
+#define DXEPCTL_NEXTEP_MASK^I^I(0xf << 11)$
ERROR: code indent should never use tabs
#599: FILE: include/hw/usb/dwc2-regs.h:574:
+#define DXEPCTL_NEXTEP_SHIFT^I^I11$
ERROR: code indent should never use tabs
#600: FILE: include/hw/usb/dwc2-regs.h:575:
+#define DXEPCTL_NEXTEP_LIMIT^I^I0xf$
ERROR: code indent should never use tabs
#601: FILE: include/hw/usb/dwc2-regs.h:576:
+#define DXEPCTL_NEXTEP(_x)^I^I((_x) << 11)$
ERROR: code indent should never use tabs
#602: FILE: include/hw/usb/dwc2-regs.h:577:
+#define DXEPCTL_MPS_MASK^I^I(0x7ff << 0)$
ERROR: code indent should never use tabs
#603: FILE: include/hw/usb/dwc2-regs.h:578:
+#define DXEPCTL_MPS_SHIFT^I^I0$
ERROR: code indent should never use tabs
#604: FILE: include/hw/usb/dwc2-regs.h:579:
+#define DXEPCTL_MPS_LIMIT^I^I0x7ff$
ERROR: code indent should never use tabs
#605: FILE: include/hw/usb/dwc2-regs.h:580:
+#define DXEPCTL_MPS(_x)^I^I^I((_x) << 0)$
ERROR: code indent should never use tabs
#607: FILE: include/hw/usb/dwc2-regs.h:582:
+#define DIEPINT(_a)^I^I^IHSOTG_REG(0x908 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#608: FILE: include/hw/usb/dwc2-regs.h:583:
+#define DOEPINT(_a)^I^I^IHSOTG_REG(0xB08 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#609: FILE: include/hw/usb/dwc2-regs.h:584:
+#define DXEPINT_SETUP_RCVD^I^IBIT(15)$
ERROR: code indent should never use tabs
#610: FILE: include/hw/usb/dwc2-regs.h:585:
+#define DXEPINT_NYETINTRPT^I^IBIT(14)$
ERROR: code indent should never use tabs
#611: FILE: include/hw/usb/dwc2-regs.h:586:
+#define DXEPINT_NAKINTRPT^I^IBIT(13)$
ERROR: code indent should never use tabs
#612: FILE: include/hw/usb/dwc2-regs.h:587:
+#define DXEPINT_BBLEERRINTRPT^I^IBIT(12)$
ERROR: code indent should never use tabs
#613: FILE: include/hw/usb/dwc2-regs.h:588:
+#define DXEPINT_PKTDRPSTS^I^IBIT(11)$
ERROR: code indent should never use tabs
#614: FILE: include/hw/usb/dwc2-regs.h:589:
+#define DXEPINT_BNAINTR^I^I^IBIT(9)$
ERROR: code indent should never use tabs
#615: FILE: include/hw/usb/dwc2-regs.h:590:
+#define DXEPINT_TXFIFOUNDRN^I^IBIT(8)$
ERROR: code indent should never use tabs
#616: FILE: include/hw/usb/dwc2-regs.h:591:
+#define DXEPINT_OUTPKTERR^I^IBIT(8)$
ERROR: code indent should never use tabs
#617: FILE: include/hw/usb/dwc2-regs.h:592:
+#define DXEPINT_TXFEMP^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#618: FILE: include/hw/usb/dwc2-regs.h:593:
+#define DXEPINT_INEPNAKEFF^I^IBIT(6)$
ERROR: code indent should never use tabs
#619: FILE: include/hw/usb/dwc2-regs.h:594:
+#define DXEPINT_BACK2BACKSETUP^I^IBIT(6)$
ERROR: code indent should never use tabs
#620: FILE: include/hw/usb/dwc2-regs.h:595:
+#define DXEPINT_INTKNEPMIS^I^IBIT(5)$
ERROR: code indent should never use tabs
#621: FILE: include/hw/usb/dwc2-regs.h:596:
+#define DXEPINT_STSPHSERCVD^I^IBIT(5)$
ERROR: code indent should never use tabs
#622: FILE: include/hw/usb/dwc2-regs.h:597:
+#define DXEPINT_INTKNTXFEMP^I^IBIT(4)$
ERROR: code indent should never use tabs
#623: FILE: include/hw/usb/dwc2-regs.h:598:
+#define DXEPINT_OUTTKNEPDIS^I^IBIT(4)$
ERROR: code indent should never use tabs
#624: FILE: include/hw/usb/dwc2-regs.h:599:
+#define DXEPINT_TIMEOUT^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#625: FILE: include/hw/usb/dwc2-regs.h:600:
+#define DXEPINT_SETUP^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#626: FILE: include/hw/usb/dwc2-regs.h:601:
+#define DXEPINT_AHBERR^I^I^IBIT(2)$
ERROR: code indent should never use tabs
#627: FILE: include/hw/usb/dwc2-regs.h:602:
+#define DXEPINT_EPDISBLD^I^IBIT(1)$
ERROR: code indent should never use tabs
#628: FILE: include/hw/usb/dwc2-regs.h:603:
+#define DXEPINT_XFERCOMPL^I^IBIT(0)$
ERROR: code indent should never use tabs
#630: FILE: include/hw/usb/dwc2-regs.h:605:
+#define DIEPTSIZ0^I^I^IHSOTG_REG(0x910)$
ERROR: code indent should never use tabs
#631: FILE: include/hw/usb/dwc2-regs.h:606:
+#define DIEPTSIZ0_PKTCNT_MASK^I^I(0x3 << 19)$
ERROR: code indent should never use tabs
#632: FILE: include/hw/usb/dwc2-regs.h:607:
+#define DIEPTSIZ0_PKTCNT_SHIFT^I^I19$
ERROR: code indent should never use tabs
#633: FILE: include/hw/usb/dwc2-regs.h:608:
+#define DIEPTSIZ0_PKTCNT_LIMIT^I^I0x3$
ERROR: code indent should never use tabs
#634: FILE: include/hw/usb/dwc2-regs.h:609:
+#define DIEPTSIZ0_PKTCNT(_x)^I^I((_x) << 19)$
ERROR: code indent should never use tabs
#635: FILE: include/hw/usb/dwc2-regs.h:610:
+#define DIEPTSIZ0_XFERSIZE_MASK^I^I(0x7f << 0)$
ERROR: code indent should never use tabs
#636: FILE: include/hw/usb/dwc2-regs.h:611:
+#define DIEPTSIZ0_XFERSIZE_SHIFT^I0$
ERROR: code indent should never use tabs
#637: FILE: include/hw/usb/dwc2-regs.h:612:
+#define DIEPTSIZ0_XFERSIZE_LIMIT^I0x7f$
ERROR: code indent should never use tabs
#638: FILE: include/hw/usb/dwc2-regs.h:613:
+#define DIEPTSIZ0_XFERSIZE(_x)^I^I((_x) << 0)$
ERROR: code indent should never use tabs
#640: FILE: include/hw/usb/dwc2-regs.h:615:
+#define DOEPTSIZ0^I^I^IHSOTG_REG(0xB10)$
ERROR: code indent should never use tabs
#641: FILE: include/hw/usb/dwc2-regs.h:616:
+#define DOEPTSIZ0_SUPCNT_MASK^I^I(0x3 << 29)$
ERROR: code indent should never use tabs
#642: FILE: include/hw/usb/dwc2-regs.h:617:
+#define DOEPTSIZ0_SUPCNT_SHIFT^I^I29$
ERROR: code indent should never use tabs
#643: FILE: include/hw/usb/dwc2-regs.h:618:
+#define DOEPTSIZ0_SUPCNT_LIMIT^I^I0x3$
ERROR: code indent should never use tabs
#644: FILE: include/hw/usb/dwc2-regs.h:619:
+#define DOEPTSIZ0_SUPCNT(_x)^I^I((_x) << 29)$
ERROR: code indent should never use tabs
#645: FILE: include/hw/usb/dwc2-regs.h:620:
+#define DOEPTSIZ0_PKTCNT^I^IBIT(19)$
ERROR: code indent should never use tabs
#646: FILE: include/hw/usb/dwc2-regs.h:621:
+#define DOEPTSIZ0_XFERSIZE_MASK^I^I(0x7f << 0)$
ERROR: code indent should never use tabs
#647: FILE: include/hw/usb/dwc2-regs.h:622:
+#define DOEPTSIZ0_XFERSIZE_SHIFT^I0$
ERROR: code indent should never use tabs
#649: FILE: include/hw/usb/dwc2-regs.h:624:
+#define DIEPTSIZ(_a)^I^I^IHSOTG_REG(0x910 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#650: FILE: include/hw/usb/dwc2-regs.h:625:
+#define DOEPTSIZ(_a)^I^I^IHSOTG_REG(0xB10 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#651: FILE: include/hw/usb/dwc2-regs.h:626:
+#define DXEPTSIZ_MC_MASK^I^I(0x3 << 29)$
ERROR: code indent should never use tabs
#652: FILE: include/hw/usb/dwc2-regs.h:627:
+#define DXEPTSIZ_MC_SHIFT^I^I29$
ERROR: code indent should never use tabs
#653: FILE: include/hw/usb/dwc2-regs.h:628:
+#define DXEPTSIZ_MC_LIMIT^I^I0x3$
ERROR: code indent should never use tabs
#654: FILE: include/hw/usb/dwc2-regs.h:629:
+#define DXEPTSIZ_MC(_x)^I^I^I((_x) << 29)$
ERROR: code indent should never use tabs
#655: FILE: include/hw/usb/dwc2-regs.h:630:
+#define DXEPTSIZ_PKTCNT_MASK^I^I(0x3ff << 19)$
ERROR: code indent should never use tabs
#656: FILE: include/hw/usb/dwc2-regs.h:631:
+#define DXEPTSIZ_PKTCNT_SHIFT^I^I19$
ERROR: code indent should never use tabs
#657: FILE: include/hw/usb/dwc2-regs.h:632:
+#define DXEPTSIZ_PKTCNT_LIMIT^I^I0x3ff$
ERROR: code indent should never use tabs
#658: FILE: include/hw/usb/dwc2-regs.h:633:
+#define DXEPTSIZ_PKTCNT_GET(_v)^I^I(((_v) >> 19) & 0x3ff)$
ERROR: code indent should never use tabs
#659: FILE: include/hw/usb/dwc2-regs.h:634:
+#define DXEPTSIZ_PKTCNT(_x)^I^I((_x) << 19)$
ERROR: code indent should never use tabs
#660: FILE: include/hw/usb/dwc2-regs.h:635:
+#define DXEPTSIZ_XFERSIZE_MASK^I^I(0x7ffff << 0)$
ERROR: code indent should never use tabs
#661: FILE: include/hw/usb/dwc2-regs.h:636:
+#define DXEPTSIZ_XFERSIZE_SHIFT^I^I0$
ERROR: code indent should never use tabs
#662: FILE: include/hw/usb/dwc2-regs.h:637:
+#define DXEPTSIZ_XFERSIZE_LIMIT^I^I0x7ffff$
ERROR: code indent should never use tabs
#663: FILE: include/hw/usb/dwc2-regs.h:638:
+#define DXEPTSIZ_XFERSIZE_GET(_v)^I(((_v) >> 0) & 0x7ffff)$
ERROR: code indent should never use tabs
#664: FILE: include/hw/usb/dwc2-regs.h:639:
+#define DXEPTSIZ_XFERSIZE(_x)^I^I((_x) << 0)$
ERROR: code indent should never use tabs
#666: FILE: include/hw/usb/dwc2-regs.h:641:
+#define DIEPDMA(_a)^I^I^IHSOTG_REG(0x914 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#667: FILE: include/hw/usb/dwc2-regs.h:642:
+#define DOEPDMA(_a)^I^I^IHSOTG_REG(0xB14 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#669: FILE: include/hw/usb/dwc2-regs.h:644:
+#define DTXFSTS(_a)^I^I^IHSOTG_REG(0x918 + ((_a) * 0x20))$
ERROR: code indent should never use tabs
#671: FILE: include/hw/usb/dwc2-regs.h:646:
+#define PCGCTL^I^I^I^IHSOTG_REG(0x0e00)$
ERROR: code indent should never use tabs
#672: FILE: include/hw/usb/dwc2-regs.h:647:
+#define PCGCTL_IF_DEV_MODE^I^IBIT(31)$
ERROR: code indent should never use tabs
#673: FILE: include/hw/usb/dwc2-regs.h:648:
+#define PCGCTL_P2HD_PRT_SPD_MASK^I(0x3 << 29)$
ERROR: code indent should never use tabs
#674: FILE: include/hw/usb/dwc2-regs.h:649:
+#define PCGCTL_P2HD_PRT_SPD_SHIFT^I29$
ERROR: code indent should never use tabs
#675: FILE: include/hw/usb/dwc2-regs.h:650:
+#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK^I(0x3 << 27)$
ERROR: code indent should never use tabs
#676: FILE: include/hw/usb/dwc2-regs.h:651:
+#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT^I27$
ERROR: code indent should never use tabs
#677: FILE: include/hw/usb/dwc2-regs.h:652:
+#define PCGCTL_MAC_DEV_ADDR_MASK^I(0x7f << 20)$
ERROR: code indent should never use tabs
#678: FILE: include/hw/usb/dwc2-regs.h:653:
+#define PCGCTL_MAC_DEV_ADDR_SHIFT^I20$
ERROR: code indent should never use tabs
#679: FILE: include/hw/usb/dwc2-regs.h:654:
+#define PCGCTL_MAX_TERMSEL^I^IBIT(19)$
ERROR: code indent should never use tabs
#680: FILE: include/hw/usb/dwc2-regs.h:655:
+#define PCGCTL_MAX_XCVRSELECT_MASK^I(0x3 << 17)$
ERROR: code indent should never use tabs
#681: FILE: include/hw/usb/dwc2-regs.h:656:
+#define PCGCTL_MAX_XCVRSELECT_SHIFT^I17$
ERROR: code indent should never use tabs
#682: FILE: include/hw/usb/dwc2-regs.h:657:
+#define PCGCTL_PORT_POWER^I^IBIT(16)$
ERROR: code indent should never use tabs
#683: FILE: include/hw/usb/dwc2-regs.h:658:
+#define PCGCTL_PRT_CLK_SEL_MASK^I^I(0x3 << 14)$
ERROR: code indent should never use tabs
#684: FILE: include/hw/usb/dwc2-regs.h:659:
+#define PCGCTL_PRT_CLK_SEL_SHIFT^I14$
ERROR: code indent should never use tabs
#685: FILE: include/hw/usb/dwc2-regs.h:660:
+#define PCGCTL_ESS_REG_RESTORED^I^IBIT(13)$
ERROR: code indent should never use tabs
#686: FILE: include/hw/usb/dwc2-regs.h:661:
+#define PCGCTL_EXTND_HIBER_SWITCH^IBIT(12)$
ERROR: code indent should never use tabs
#687: FILE: include/hw/usb/dwc2-regs.h:662:
+#define PCGCTL_EXTND_HIBER_PWRCLMP^IBIT(11)$
ERROR: code indent should never use tabs
#688: FILE: include/hw/usb/dwc2-regs.h:663:
+#define PCGCTL_ENBL_EXTND_HIBER^I^IBIT(10)$
ERROR: code indent should never use tabs
#689: FILE: include/hw/usb/dwc2-regs.h:664:
+#define PCGCTL_RESTOREMODE^I^IBIT(9)$
ERROR: code indent should never use tabs
#690: FILE: include/hw/usb/dwc2-regs.h:665:
+#define PCGCTL_RESETAFTSUSP^I^IBIT(8)$
ERROR: code indent should never use tabs
#691: FILE: include/hw/usb/dwc2-regs.h:666:
+#define PCGCTL_DEEP_SLEEP^I^IBIT(7)$
ERROR: code indent should never use tabs
#692: FILE: include/hw/usb/dwc2-regs.h:667:
+#define PCGCTL_PHY_IN_SLEEP^I^IBIT(6)$
ERROR: code indent should never use tabs
#693: FILE: include/hw/usb/dwc2-regs.h:668:
+#define PCGCTL_ENBL_SLEEP_GATING^IBIT(5)$
ERROR: code indent should never use tabs
#694: FILE: include/hw/usb/dwc2-regs.h:669:
+#define PCGCTL_RSTPDWNMODULE^I^IBIT(3)$
ERROR: code indent should never use tabs
#695: FILE: include/hw/usb/dwc2-regs.h:670:
+#define PCGCTL_PWRCLMP^I^I^IBIT(2)$
ERROR: code indent should never use tabs
#696: FILE: include/hw/usb/dwc2-regs.h:671:
+#define PCGCTL_GATEHCLK^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#697: FILE: include/hw/usb/dwc2-regs.h:672:
+#define PCGCTL_STOPPCLK^I^I^IBIT(0)$
ERROR: code indent should never use tabs
#703: FILE: include/hw/usb/dwc2-regs.h:678:
+#define EPFIFO(_a)^I^I^IHSOTG_REG(0x1000 + ((_a) * 0x1000))$
ERROR: code indent should never use tabs
#707: FILE: include/hw/usb/dwc2-regs.h:682:
+#define HCFG^I^I^I^IHSOTG_REG(0x0400)$
ERROR: code indent should never use tabs
#708: FILE: include/hw/usb/dwc2-regs.h:683:
+#define HCFG_MODECHTIMEN^I^IBIT(31)$
ERROR: code indent should never use tabs
#709: FILE: include/hw/usb/dwc2-regs.h:684:
+#define HCFG_PERSCHEDENA^I^IBIT(26)$
ERROR: code indent should never use tabs
#710: FILE: include/hw/usb/dwc2-regs.h:685:
+#define HCFG_FRLISTEN_MASK^I^I(0x3 << 24)$
ERROR: code indent should never use tabs
#711: FILE: include/hw/usb/dwc2-regs.h:686:
+#define HCFG_FRLISTEN_SHIFT^I^I24$
ERROR: code indent should never use tabs
#712: FILE: include/hw/usb/dwc2-regs.h:687:
+#define HCFG_FRLISTEN_8^I^I^I^I(0 << 24)$
ERROR: code indent should never use tabs
#713: FILE: include/hw/usb/dwc2-regs.h:688:
+#define FRLISTEN_8_SIZE^I^I^I^I8$
ERROR: code indent should never use tabs
#714: FILE: include/hw/usb/dwc2-regs.h:689:
+#define HCFG_FRLISTEN_16^I^I^IBIT(24)$
ERROR: code indent should never use tabs
#715: FILE: include/hw/usb/dwc2-regs.h:690:
+#define FRLISTEN_16_SIZE^I^I^I16$
ERROR: code indent should never use tabs
#716: FILE: include/hw/usb/dwc2-regs.h:691:
+#define HCFG_FRLISTEN_32^I^I^I(2 << 24)$
ERROR: code indent should never use tabs
#717: FILE: include/hw/usb/dwc2-regs.h:692:
+#define FRLISTEN_32_SIZE^I^I^I32$
ERROR: code indent should never use tabs
#718: FILE: include/hw/usb/dwc2-regs.h:693:
+#define HCFG_FRLISTEN_64^I^I^I(3 << 24)$
ERROR: code indent should never use tabs
#719: FILE: include/hw/usb/dwc2-regs.h:694:
+#define FRLISTEN_64_SIZE^I^I^I64$
ERROR: code indent should never use tabs
#720: FILE: include/hw/usb/dwc2-regs.h:695:
+#define HCFG_DESCDMA^I^I^IBIT(23)$
ERROR: code indent should never use tabs
#721: FILE: include/hw/usb/dwc2-regs.h:696:
+#define HCFG_RESVALID_MASK^I^I(0xff << 8)$
ERROR: code indent should never use tabs
#722: FILE: include/hw/usb/dwc2-regs.h:697:
+#define HCFG_RESVALID_SHIFT^I^I8$
ERROR: code indent should never use tabs
#723: FILE: include/hw/usb/dwc2-regs.h:698:
+#define HCFG_ENA32KHZ^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#724: FILE: include/hw/usb/dwc2-regs.h:699:
+#define HCFG_FSLSSUPP^I^I^IBIT(2)$
ERROR: code indent should never use tabs
#725: FILE: include/hw/usb/dwc2-regs.h:700:
+#define HCFG_FSLSPCLKSEL_MASK^I^I(0x3 << 0)$
ERROR: code indent should never use tabs
#726: FILE: include/hw/usb/dwc2-regs.h:701:
+#define HCFG_FSLSPCLKSEL_SHIFT^I^I0$
ERROR: code indent should never use tabs
#727: FILE: include/hw/usb/dwc2-regs.h:702:
+#define HCFG_FSLSPCLKSEL_30_60_MHZ^I0$
ERROR: code indent should never use tabs
#728: FILE: include/hw/usb/dwc2-regs.h:703:
+#define HCFG_FSLSPCLKSEL_48_MHZ^I^I1$
ERROR: code indent should never use tabs
#729: FILE: include/hw/usb/dwc2-regs.h:704:
+#define HCFG_FSLSPCLKSEL_6_MHZ^I^I2$
ERROR: code indent should never use tabs
#731: FILE: include/hw/usb/dwc2-regs.h:706:
+#define HFIR^I^I^I^IHSOTG_REG(0x0404)$
ERROR: code indent should never use tabs
#732: FILE: include/hw/usb/dwc2-regs.h:707:
+#define HFIR_FRINT_MASK^I^I^I(0xffff << 0)$
ERROR: code indent should never use tabs
#733: FILE: include/hw/usb/dwc2-regs.h:708:
+#define HFIR_FRINT_SHIFT^I^I0$
ERROR: code indent should never use tabs
#734: FILE: include/hw/usb/dwc2-regs.h:709:
+#define HFIR_RLDCTRL^I^I^IBIT(16)$
ERROR: code indent should never use tabs
#736: FILE: include/hw/usb/dwc2-regs.h:711:
+#define HFNUM^I^I^I^IHSOTG_REG(0x0408)$
ERROR: code indent should never use tabs
#737: FILE: include/hw/usb/dwc2-regs.h:712:
+#define HFNUM_FRREM_MASK^I^I(0xffff << 16)$
ERROR: code indent should never use tabs
#738: FILE: include/hw/usb/dwc2-regs.h:713:
+#define HFNUM_FRREM_SHIFT^I^I16$
ERROR: code indent should never use tabs
#739: FILE: include/hw/usb/dwc2-regs.h:714:
+#define HFNUM_FRNUM_MASK^I^I(0xffff << 0)$
ERROR: code indent should never use tabs
#740: FILE: include/hw/usb/dwc2-regs.h:715:
+#define HFNUM_FRNUM_SHIFT^I^I0$
ERROR: code indent should never use tabs
#741: FILE: include/hw/usb/dwc2-regs.h:716:
+#define HFNUM_MAX_FRNUM^I^I^I0x3fff$
ERROR: code indent should never use tabs
#743: FILE: include/hw/usb/dwc2-regs.h:718:
+#define HPTXSTS^I^I^I^IHSOTG_REG(0x0410)$
ERROR: code indent should never use tabs
#744: FILE: include/hw/usb/dwc2-regs.h:719:
+#define TXSTS_QTOP_ODD^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#745: FILE: include/hw/usb/dwc2-regs.h:720:
+#define TXSTS_QTOP_CHNEP_MASK^I^I(0xf << 27)$
ERROR: code indent should never use tabs
#746: FILE: include/hw/usb/dwc2-regs.h:721:
+#define TXSTS_QTOP_CHNEP_SHIFT^I^I27$
ERROR: code indent should never use tabs
#747: FILE: include/hw/usb/dwc2-regs.h:722:
+#define TXSTS_QTOP_TOKEN_MASK^I^I(0x3 << 25)$
ERROR: code indent should never use tabs
#748: FILE: include/hw/usb/dwc2-regs.h:723:
+#define TXSTS_QTOP_TOKEN_SHIFT^I^I25$
ERROR: code indent should never use tabs
#749: FILE: include/hw/usb/dwc2-regs.h:724:
+#define TXSTS_QTOP_TERMINATE^I^IBIT(24)$
ERROR: code indent should never use tabs
#750: FILE: include/hw/usb/dwc2-regs.h:725:
+#define TXSTS_QSPCAVAIL_MASK^I^I(0xff << 16)$
ERROR: code indent should never use tabs
#751: FILE: include/hw/usb/dwc2-regs.h:726:
+#define TXSTS_QSPCAVAIL_SHIFT^I^I16$
ERROR: code indent should never use tabs
#752: FILE: include/hw/usb/dwc2-regs.h:727:
+#define TXSTS_FSPCAVAIL_MASK^I^I(0xffff << 0)$
ERROR: code indent should never use tabs
#753: FILE: include/hw/usb/dwc2-regs.h:728:
+#define TXSTS_FSPCAVAIL_SHIFT^I^I0$
ERROR: code indent should never use tabs
#755: FILE: include/hw/usb/dwc2-regs.h:730:
+#define HAINT^I^I^I^IHSOTG_REG(0x0414)$
ERROR: code indent should never use tabs
#756: FILE: include/hw/usb/dwc2-regs.h:731:
+#define HAINTMSK^I^I^IHSOTG_REG(0x0418)$
ERROR: code indent should never use tabs
#757: FILE: include/hw/usb/dwc2-regs.h:732:
+#define HFLBADDR^I^I^IHSOTG_REG(0x041c)$
ERROR: code indent should never use tabs
#759: FILE: include/hw/usb/dwc2-regs.h:734:
+#define HPRT0^I^I^I^IHSOTG_REG(0x0440)$
ERROR: code indent should never use tabs
#760: FILE: include/hw/usb/dwc2-regs.h:735:
+#define HPRT0_SPD_MASK^I^I^I(0x3 << 17)$
ERROR: code indent should never use tabs
#761: FILE: include/hw/usb/dwc2-regs.h:736:
+#define HPRT0_SPD_SHIFT^I^I^I17$
ERROR: code indent should never use tabs
#762: FILE: include/hw/usb/dwc2-regs.h:737:
+#define HPRT0_SPD_HIGH_SPEED^I^I0$
ERROR: code indent should never use tabs
#763: FILE: include/hw/usb/dwc2-regs.h:738:
+#define HPRT0_SPD_FULL_SPEED^I^I1$
ERROR: code indent should never use tabs
#764: FILE: include/hw/usb/dwc2-regs.h:739:
+#define HPRT0_SPD_LOW_SPEED^I^I2$
ERROR: code indent should never use tabs
#765: FILE: include/hw/usb/dwc2-regs.h:740:
+#define HPRT0_TSTCTL_MASK^I^I(0xf << 13)$
ERROR: code indent should never use tabs
#766: FILE: include/hw/usb/dwc2-regs.h:741:
+#define HPRT0_TSTCTL_SHIFT^I^I13$
ERROR: code indent should never use tabs
#767: FILE: include/hw/usb/dwc2-regs.h:742:
+#define HPRT0_PWR^I^I^IBIT(12)$
ERROR: code indent should never use tabs
#768: FILE: include/hw/usb/dwc2-regs.h:743:
+#define HPRT0_LNSTS_MASK^I^I(0x3 << 10)$
ERROR: code indent should never use tabs
#769: FILE: include/hw/usb/dwc2-regs.h:744:
+#define HPRT0_LNSTS_SHIFT^I^I10$
ERROR: code indent should never use tabs
#770: FILE: include/hw/usb/dwc2-regs.h:745:
+#define HPRT0_RST^I^I^IBIT(8)$
ERROR: code indent should never use tabs
#771: FILE: include/hw/usb/dwc2-regs.h:746:
+#define HPRT0_SUSP^I^I^IBIT(7)$
ERROR: code indent should never use tabs
#772: FILE: include/hw/usb/dwc2-regs.h:747:
+#define HPRT0_RES^I^I^IBIT(6)$
ERROR: code indent should never use tabs
#773: FILE: include/hw/usb/dwc2-regs.h:748:
+#define HPRT0_OVRCURRCHG^I^IBIT(5)$
ERROR: code indent should never use tabs
#774: FILE: include/hw/usb/dwc2-regs.h:749:
+#define HPRT0_OVRCURRACT^I^IBIT(4)$
ERROR: code indent should never use tabs
#775: FILE: include/hw/usb/dwc2-regs.h:750:
+#define HPRT0_ENACHG^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#776: FILE: include/hw/usb/dwc2-regs.h:751:
+#define HPRT0_ENA^I^I^IBIT(2)$
ERROR: code indent should never use tabs
#777: FILE: include/hw/usb/dwc2-regs.h:752:
+#define HPRT0_CONNDET^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#778: FILE: include/hw/usb/dwc2-regs.h:753:
+#define HPRT0_CONNSTS^I^I^IBIT(0)$
ERROR: code indent should never use tabs
#780: FILE: include/hw/usb/dwc2-regs.h:755:
+#define HCCHAR(_ch)^I^I^IHSOTG_REG(0x0500 + 0x20 * (_ch))$
ERROR: code indent should never use tabs
#781: FILE: include/hw/usb/dwc2-regs.h:756:
+#define HCCHAR_CHENA^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#782: FILE: include/hw/usb/dwc2-regs.h:757:
+#define HCCHAR_CHDIS^I^I^IBIT(30)$
ERROR: code indent should never use tabs
#783: FILE: include/hw/usb/dwc2-regs.h:758:
+#define HCCHAR_ODDFRM^I^I^IBIT(29)$
ERROR: code indent should never use tabs
#784: FILE: include/hw/usb/dwc2-regs.h:759:
+#define HCCHAR_DEVADDR_MASK^I^I(0x7f << 22)$
ERROR: code indent should never use tabs
#785: FILE: include/hw/usb/dwc2-regs.h:760:
+#define HCCHAR_DEVADDR_SHIFT^I^I22$
ERROR: code indent should never use tabs
#786: FILE: include/hw/usb/dwc2-regs.h:761:
+#define HCCHAR_MULTICNT_MASK^I^I(0x3 << 20)$
ERROR: code indent should never use tabs
#787: FILE: include/hw/usb/dwc2-regs.h:762:
+#define HCCHAR_MULTICNT_SHIFT^I^I20$
ERROR: code indent should never use tabs
#788: FILE: include/hw/usb/dwc2-regs.h:763:
+#define HCCHAR_EPTYPE_MASK^I^I(0x3 << 18)$
ERROR: code indent should never use tabs
#789: FILE: include/hw/usb/dwc2-regs.h:764:
+#define HCCHAR_EPTYPE_SHIFT^I^I18$
ERROR: code indent should never use tabs
#790: FILE: include/hw/usb/dwc2-regs.h:765:
+#define HCCHAR_LSPDDEV^I^I^IBIT(17)$
ERROR: code indent should never use tabs
#791: FILE: include/hw/usb/dwc2-regs.h:766:
+#define HCCHAR_EPDIR^I^I^IBIT(15)$
ERROR: code indent should never use tabs
#792: FILE: include/hw/usb/dwc2-regs.h:767:
+#define HCCHAR_EPNUM_MASK^I^I(0xf << 11)$
ERROR: code indent should never use tabs
#793: FILE: include/hw/usb/dwc2-regs.h:768:
+#define HCCHAR_EPNUM_SHIFT^I^I11$
ERROR: code indent should never use tabs
#794: FILE: include/hw/usb/dwc2-regs.h:769:
+#define HCCHAR_MPS_MASK^I^I^I(0x7ff << 0)$
ERROR: code indent should never use tabs
#795: FILE: include/hw/usb/dwc2-regs.h:770:
+#define HCCHAR_MPS_SHIFT^I^I0$
ERROR: code indent should never use tabs
#797: FILE: include/hw/usb/dwc2-regs.h:772:
+#define HCSPLT(_ch)^I^I^IHSOTG_REG(0x0504 + 0x20 * (_ch))$
ERROR: code indent should never use tabs
#798: FILE: include/hw/usb/dwc2-regs.h:773:
+#define HCSPLT_SPLTENA^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#799: FILE: include/hw/usb/dwc2-regs.h:774:
+#define HCSPLT_COMPSPLT^I^I^IBIT(16)$
ERROR: code indent should never use tabs
#800: FILE: include/hw/usb/dwc2-regs.h:775:
+#define HCSPLT_XACTPOS_MASK^I^I(0x3 << 14)$
ERROR: code indent should never use tabs
#801: FILE: include/hw/usb/dwc2-regs.h:776:
+#define HCSPLT_XACTPOS_SHIFT^I^I14$
ERROR: code indent should never use tabs
#802: FILE: include/hw/usb/dwc2-regs.h:777:
+#define HCSPLT_XACTPOS_MID^I^I0$
ERROR: code indent should never use tabs
#803: FILE: include/hw/usb/dwc2-regs.h:778:
+#define HCSPLT_XACTPOS_END^I^I1$
ERROR: code indent should never use tabs
#804: FILE: include/hw/usb/dwc2-regs.h:779:
+#define HCSPLT_XACTPOS_BEGIN^I^I2$
ERROR: code indent should never use tabs
#805: FILE: include/hw/usb/dwc2-regs.h:780:
+#define HCSPLT_XACTPOS_ALL^I^I3$
ERROR: code indent should never use tabs
#806: FILE: include/hw/usb/dwc2-regs.h:781:
+#define HCSPLT_HUBADDR_MASK^I^I(0x7f << 7)$
ERROR: code indent should never use tabs
#807: FILE: include/hw/usb/dwc2-regs.h:782:
+#define HCSPLT_HUBADDR_SHIFT^I^I7$
ERROR: code indent should never use tabs
#808: FILE: include/hw/usb/dwc2-regs.h:783:
+#define HCSPLT_PRTADDR_MASK^I^I(0x7f << 0)$
ERROR: code indent should never use tabs
#809: FILE: include/hw/usb/dwc2-regs.h:784:
+#define HCSPLT_PRTADDR_SHIFT^I^I0$
ERROR: code indent should never use tabs
#811: FILE: include/hw/usb/dwc2-regs.h:786:
+#define HCINT(_ch)^I^I^IHSOTG_REG(0x0508 + 0x20 * (_ch))$
ERROR: code indent should never use tabs
#812: FILE: include/hw/usb/dwc2-regs.h:787:
+#define HCINTMSK(_ch)^I^I^IHSOTG_REG(0x050c + 0x20 * (_ch))$
ERROR: code indent should never use tabs
#813: FILE: include/hw/usb/dwc2-regs.h:788:
+#define HCINTMSK_RESERVED14_31^I^I(0x3ffff << 14)$
ERROR: code indent should never use tabs
#814: FILE: include/hw/usb/dwc2-regs.h:789:
+#define HCINTMSK_FRM_LIST_ROLL^I^IBIT(13)$
ERROR: code indent should never use tabs
#815: FILE: include/hw/usb/dwc2-regs.h:790:
+#define HCINTMSK_XCS_XACT^I^IBIT(12)$
ERROR: code indent should never use tabs
#816: FILE: include/hw/usb/dwc2-regs.h:791:
+#define HCINTMSK_BNA^I^I^IBIT(11)$
ERROR: code indent should never use tabs
#817: FILE: include/hw/usb/dwc2-regs.h:792:
+#define HCINTMSK_DATATGLERR^I^IBIT(10)$
ERROR: code indent should never use tabs
#818: FILE: include/hw/usb/dwc2-regs.h:793:
+#define HCINTMSK_FRMOVRUN^I^IBIT(9)$
ERROR: code indent should never use tabs
#819: FILE: include/hw/usb/dwc2-regs.h:794:
+#define HCINTMSK_BBLERR^I^I^IBIT(8)$
ERROR: code indent should never use tabs
#820: FILE: include/hw/usb/dwc2-regs.h:795:
+#define HCINTMSK_XACTERR^I^IBIT(7)$
ERROR: code indent should never use tabs
#821: FILE: include/hw/usb/dwc2-regs.h:796:
+#define HCINTMSK_NYET^I^I^IBIT(6)$
ERROR: code indent should never use tabs
#822: FILE: include/hw/usb/dwc2-regs.h:797:
+#define HCINTMSK_ACK^I^I^IBIT(5)$
ERROR: code indent should never use tabs
#823: FILE: include/hw/usb/dwc2-regs.h:798:
+#define HCINTMSK_NAK^I^I^IBIT(4)$
ERROR: code indent should never use tabs
#824: FILE: include/hw/usb/dwc2-regs.h:799:
+#define HCINTMSK_STALL^I^I^IBIT(3)$
ERROR: code indent should never use tabs
#825: FILE: include/hw/usb/dwc2-regs.h:800:
+#define HCINTMSK_AHBERR^I^I^IBIT(2)$
ERROR: code indent should never use tabs
#826: FILE: include/hw/usb/dwc2-regs.h:801:
+#define HCINTMSK_CHHLTD^I^I^IBIT(1)$
ERROR: code indent should never use tabs
#827: FILE: include/hw/usb/dwc2-regs.h:802:
+#define HCINTMSK_XFERCOMPL^I^IBIT(0)$
ERROR: code indent should never use tabs
#829: FILE: include/hw/usb/dwc2-regs.h:804:
+#define HCTSIZ(_ch)^I^I^IHSOTG_REG(0x0510 + 0x20 * (_ch))$
ERROR: code indent should never use tabs
#830: FILE: include/hw/usb/dwc2-regs.h:805:
+#define TSIZ_DOPNG^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#831: FILE: include/hw/usb/dwc2-regs.h:806:
+#define TSIZ_SC_MC_PID_MASK^I^I(0x3 << 29)$
ERROR: code indent should never use tabs
#832: FILE: include/hw/usb/dwc2-regs.h:807:
+#define TSIZ_SC_MC_PID_SHIFT^I^I29$
ERROR: code indent should never use tabs
#833: FILE: include/hw/usb/dwc2-regs.h:808:
+#define TSIZ_SC_MC_PID_DATA0^I^I0$
ERROR: code indent should never use tabs
#834: FILE: include/hw/usb/dwc2-regs.h:809:
+#define TSIZ_SC_MC_PID_DATA2^I^I1$
ERROR: code indent should never use tabs
#835: FILE: include/hw/usb/dwc2-regs.h:810:
+#define TSIZ_SC_MC_PID_DATA1^I^I2$
ERROR: code indent should never use tabs
#836: FILE: include/hw/usb/dwc2-regs.h:811:
+#define TSIZ_SC_MC_PID_MDATA^I^I3$
ERROR: code indent should never use tabs
#837: FILE: include/hw/usb/dwc2-regs.h:812:
+#define TSIZ_SC_MC_PID_SETUP^I^I3$
ERROR: code indent should never use tabs
#838: FILE: include/hw/usb/dwc2-regs.h:813:
+#define TSIZ_PKTCNT_MASK^I^I(0x3ff << 19)$
ERROR: code indent should never use tabs
#839: FILE: include/hw/usb/dwc2-regs.h:814:
+#define TSIZ_PKTCNT_SHIFT^I^I19$
ERROR: code indent should never use tabs
#840: FILE: include/hw/usb/dwc2-regs.h:815:
+#define TSIZ_NTD_MASK^I^I^I(0xff << 8)$
ERROR: code indent should never use tabs
#841: FILE: include/hw/usb/dwc2-regs.h:816:
+#define TSIZ_NTD_SHIFT^I^I^I8$
ERROR: code indent should never use tabs
#842: FILE: include/hw/usb/dwc2-regs.h:817:
+#define TSIZ_SCHINFO_MASK^I^I(0xff << 0)$
ERROR: code indent should never use tabs
#843: FILE: include/hw/usb/dwc2-regs.h:818:
+#define TSIZ_SCHINFO_SHIFT^I^I0$
ERROR: code indent should never use tabs
#844: FILE: include/hw/usb/dwc2-regs.h:819:
+#define TSIZ_XFERSIZE_MASK^I^I(0x7ffff << 0)$
ERROR: code indent should never use tabs
#845: FILE: include/hw/usb/dwc2-regs.h:820:
+#define TSIZ_XFERSIZE_SHIFT^I^I0$
ERROR: code indent should never use tabs
#847: FILE: include/hw/usb/dwc2-regs.h:822:
+#define HCDMA(_ch)^I^I^IHSOTG_REG(0x0514 + 0x20 * (_ch))$
ERROR: code indent should never use tabs
#849: FILE: include/hw/usb/dwc2-regs.h:824:
+#define HCDMAB(_ch)^I^I^IHSOTG_REG(0x051c + 0x20 * (_ch))$
ERROR: code indent should never use tabs
#851: FILE: include/hw/usb/dwc2-regs.h:826:
+#define HCFIFO(_ch)^I^I^IHSOTG_REG(0x1000 + 0x1000 * (_ch))$
ERROR: code indent should never use tabs
#864: FILE: include/hw/usb/dwc2-regs.h:839:
+^Iuint32_t status;$
ERROR: code indent should never use tabs
#865: FILE: include/hw/usb/dwc2-regs.h:840:
+^Iuint32_t buf;$
ERROR: code indent should never use tabs
#870: FILE: include/hw/usb/dwc2-regs.h:845:
+#define HOST_DMA_A^I^I^IBIT(31)$
ERROR: code indent should never use tabs
#871: FILE: include/hw/usb/dwc2-regs.h:846:
+#define HOST_DMA_STS_MASK^I^I(0x3 << 28)$
ERROR: code indent should never use tabs
#872: FILE: include/hw/usb/dwc2-regs.h:847:
+#define HOST_DMA_STS_SHIFT^I^I28$
ERROR: code indent should never use tabs
#873: FILE: include/hw/usb/dwc2-regs.h:848:
+#define HOST_DMA_STS_PKTERR^I^IBIT(28)$
ERROR: code indent should never use tabs
#874: FILE: include/hw/usb/dwc2-regs.h:849:
+#define HOST_DMA_EOL^I^I^IBIT(26)$
ERROR: code indent should never use tabs
#875: FILE: include/hw/usb/dwc2-regs.h:850:
+#define HOST_DMA_IOC^I^I^IBIT(25)$
ERROR: code indent should never use tabs
#876: FILE: include/hw/usb/dwc2-regs.h:851:
+#define HOST_DMA_SUP^I^I^IBIT(24)$
ERROR: code indent should never use tabs
#877: FILE: include/hw/usb/dwc2-regs.h:852:
+#define HOST_DMA_ALT_QTD^I^IBIT(23)$
ERROR: code indent should never use tabs
#878: FILE: include/hw/usb/dwc2-regs.h:853:
+#define HOST_DMA_QTD_OFFSET_MASK^I(0x3f << 17)$
ERROR: code indent should never use tabs
#879: FILE: include/hw/usb/dwc2-regs.h:854:
+#define HOST_DMA_QTD_OFFSET_SHIFT^I17$
ERROR: code indent should never use tabs
#880: FILE: include/hw/usb/dwc2-regs.h:855:
+#define HOST_DMA_ISOC_NBYTES_MASK^I(0xfff << 0)$
ERROR: code indent should never use tabs
#881: FILE: include/hw/usb/dwc2-regs.h:856:
+#define HOST_DMA_ISOC_NBYTES_SHIFT^I0$
ERROR: code indent should never use tabs
#882: FILE: include/hw/usb/dwc2-regs.h:857:
+#define HOST_DMA_NBYTES_MASK^I^I(0x1ffff << 0)$
ERROR: code indent should never use tabs
#883: FILE: include/hw/usb/dwc2-regs.h:858:
+#define HOST_DMA_NBYTES_SHIFT^I^I0$
ERROR: code indent should never use tabs
#884: FILE: include/hw/usb/dwc2-regs.h:859:
+#define HOST_DMA_NBYTES_LIMIT^I^I131071$
ERROR: code indent should never use tabs
#888: FILE: include/hw/usb/dwc2-regs.h:863:
+#define DEV_DMA_BUFF_STS_MASK^I^I(0x3 << 30)$
ERROR: code indent should never use tabs
#889: FILE: include/hw/usb/dwc2-regs.h:864:
+#define DEV_DMA_BUFF_STS_SHIFT^I^I30$
ERROR: code indent should never use tabs
#890: FILE: include/hw/usb/dwc2-regs.h:865:
+#define DEV_DMA_BUFF_STS_HREADY^I^I0$
ERROR: code indent should never use tabs
#891: FILE: include/hw/usb/dwc2-regs.h:866:
+#define DEV_DMA_BUFF_STS_DMABUSY^I1$
ERROR: code indent should never use tabs
#892: FILE: include/hw/usb/dwc2-regs.h:867:
+#define DEV_DMA_BUFF_STS_DMADONE^I2$
ERROR: code indent should never use tabs
#893: FILE: include/hw/usb/dwc2-regs.h:868:
+#define DEV_DMA_BUFF_STS_HBUSY^I^I3$
ERROR: code indent should never use tabs
#894: FILE: include/hw/usb/dwc2-regs.h:869:
+#define DEV_DMA_STS_MASK^I^I(0x3 << 28)$
ERROR: code indent should never use tabs
#895: FILE: include/hw/usb/dwc2-regs.h:870:
+#define DEV_DMA_STS_SHIFT^I^I28$
ERROR: code indent should never use tabs
#896: FILE: include/hw/usb/dwc2-regs.h:871:
+#define DEV_DMA_STS_SUCC^I^I0$
ERROR: code indent should never use tabs
#897: FILE: include/hw/usb/dwc2-regs.h:872:
+#define DEV_DMA_STS_BUFF_FLUSH^I^I1$
ERROR: code indent should never use tabs
#898: FILE: include/hw/usb/dwc2-regs.h:873:
+#define DEV_DMA_STS_BUFF_ERR^I^I3$
ERROR: code indent should never use tabs
#899: FILE: include/hw/usb/dwc2-regs.h:874:
+#define DEV_DMA_L^I^I^IBIT(27)$
ERROR: code indent should never use tabs
#900: FILE: include/hw/usb/dwc2-regs.h:875:
+#define DEV_DMA_SHORT^I^I^IBIT(26)$
ERROR: code indent should never use tabs
#901: FILE: include/hw/usb/dwc2-regs.h:876:
+#define DEV_DMA_IOC^I^I^IBIT(25)$
ERROR: code indent should never use tabs
#902: FILE: include/hw/usb/dwc2-regs.h:877:
+#define DEV_DMA_SR^I^I^IBIT(24)$
ERROR: code indent should never use tabs
#903: FILE: include/hw/usb/dwc2-regs.h:878:
+#define DEV_DMA_MTRF^I^I^IBIT(23)$
ERROR: code indent should never use tabs
#904: FILE: include/hw/usb/dwc2-regs.h:879:
+#define DEV_DMA_ISOC_PID_MASK^I^I(0x3 << 23)$
ERROR: code indent should never use tabs
#905: FILE: include/hw/usb/dwc2-regs.h:880:
+#define DEV_DMA_ISOC_PID_SHIFT^I^I23$
ERROR: code indent should never use tabs
#906: FILE: include/hw/usb/dwc2-regs.h:881:
+#define DEV_DMA_ISOC_PID_DATA0^I^I0$
ERROR: code indent should never use tabs
#907: FILE: include/hw/usb/dwc2-regs.h:882:
+#define DEV_DMA_ISOC_PID_DATA2^I^I1$
ERROR: code indent should never use tabs
#908: FILE: include/hw/usb/dwc2-regs.h:883:
+#define DEV_DMA_ISOC_PID_DATA1^I^I2$
ERROR: code indent should never use tabs
#909: FILE: include/hw/usb/dwc2-regs.h:884:
+#define DEV_DMA_ISOC_PID_MDATA^I^I3$
ERROR: code indent should never use tabs
#910: FILE: include/hw/usb/dwc2-regs.h:885:
+#define DEV_DMA_ISOC_FRNUM_MASK^I^I(0x7ff << 12)$
ERROR: code indent should never use tabs
#911: FILE: include/hw/usb/dwc2-regs.h:886:
+#define DEV_DMA_ISOC_FRNUM_SHIFT^I12$
ERROR: code indent should never use tabs
#912: FILE: include/hw/usb/dwc2-regs.h:887:
+#define DEV_DMA_ISOC_TX_NBYTES_MASK^I(0xfff << 0)$
ERROR: code indent should never use tabs
#913: FILE: include/hw/usb/dwc2-regs.h:888:
+#define DEV_DMA_ISOC_TX_NBYTES_LIMIT^I0xfff$
ERROR: code indent should never use tabs
#914: FILE: include/hw/usb/dwc2-regs.h:889:
+#define DEV_DMA_ISOC_RX_NBYTES_MASK^I(0x7ff << 0)$
ERROR: code indent should never use tabs
#915: FILE: include/hw/usb/dwc2-regs.h:890:
+#define DEV_DMA_ISOC_RX_NBYTES_LIMIT^I0x7ff$
ERROR: code indent should never use tabs
#916: FILE: include/hw/usb/dwc2-regs.h:891:
+#define DEV_DMA_ISOC_NBYTES_SHIFT^I0$
ERROR: code indent should never use tabs
#917: FILE: include/hw/usb/dwc2-regs.h:892:
+#define DEV_DMA_NBYTES_MASK^I^I(0xffff << 0)$
ERROR: code indent should never use tabs
#918: FILE: include/hw/usb/dwc2-regs.h:893:
+#define DEV_DMA_NBYTES_SHIFT^I^I0$
ERROR: code indent should never use tabs
#919: FILE: include/hw/usb/dwc2-regs.h:894:
+#define DEV_DMA_NBYTES_LIMIT^I^I0xffff$
ERROR: code indent should never use tabs
#921: FILE: include/hw/usb/dwc2-regs.h:896:
+#define MAX_DMA_DESC_NUM_GENERIC^I64$
ERROR: code indent should never use tabs
#922: FILE: include/hw/usb/dwc2-regs.h:897:
+#define MAX_DMA_DESC_NUM_HS_ISOC^I256$
total: 753 errors, 3 warnings, 899 lines checked
Patch 15/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/29 Checking commit 26ec4138d588 (dwc-hsotg (dwc2) USB host controller state definitions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#17:
new file mode 100644
total: 0 errors, 1 warnings, 190 lines checked
Patch 16/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/29 Checking commit d6df0bcd83ac (dwc-hsotg (dwc2) USB host controller emulation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#66:
new file mode 100644
total: 0 errors, 1 warnings, 1491 lines checked
Patch 17/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
18/29 Checking commit f9720e85e5d3 (usb: add short-packet handling to usb-storage driver)
19/29 Checking commit 2a56c0cabb41 (wire in the dwc-hsotg (dwc2) USB host controller emulation)
20/29 Checking commit 725f9e459f44 (raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host)
21/29 Checking commit 3daf1647a8b3 (target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#57: FILE: target/arm/translate-neon.inc.c:1206:
+static bool do_vector_2sh(DisasContext *s, arg_2reg_shift *a, GVecGen2iFn *fn)
^
ERROR: spaces required around that '*' (ctx:WxV)
#87: FILE: target/arm/translate-neon.inc.c:1236:
+ static bool trans_##INSN##_2sh(DisasContext *s, arg_2reg_shift *a) \
^
total: 2 errors, 0 warnings, 99 lines checked
Patch 21/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
22/29 Checking commit 7e946c583157 (target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#94: FILE: target/arm/translate-neon.inc.c:1262:
+static bool trans_VSHR_S_2sh(DisasContext *s, arg_2reg_shift *a)
^
total: 1 errors, 0 warnings, 120 lines checked
Patch 22/29 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
23/29 Checking commit c0457fa632e7 (target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree)
24/29 Checking commit f0efe7163fde (target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree)
25/29 Checking commit 93549e817474 (target/arm: Convert Neon narrowing shifts with op==8 to decodetree)
26/29 Checking commit 0f4297947d88 (target/arm: Convert Neon narrowing shifts with op==9 to decodetree)
27/29 Checking commit 595e77ee5b7f (target/arm: Convert Neon VSHLL, VMOVL to decodetree)
28/29 Checking commit c07ebcb34b60 (target/arm: Convert VCVT fixed-point ops to decodetree)
29/29 Checking commit 8d19bb160420 (target/arm: Convert Neon one-register-and-immediate insns to decodetree)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20200605165007.12095-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PULL 00/29] target-arm queue
2020-06-05 16:49 Peter Maydell
2020-06-05 20:10 ` no-reply
@ 2020-06-08 10:04 ` Peter Maydell
1 sibling, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2020-06-08 10:04 UTC (permalink / raw)
To: QEMU Developers
On Fri, 5 Jun 2020 at 17:50, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Arm queue; some of the simpler stuff, things other have reviewed (thanks!), etc.
>
> -- PMM
>
> The following changes since commit 5d2f557b47dfbf8f23277a5bdd8473d4607c681a:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/vga-20200605-pull-request' into staging (2020-06-05 13:53:05 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200605
>
> for you to fetch changes up to 2c35a39eda0b16c2ed85c94cec204bf5efb97812:
>
> target/arm: Convert Neon one-register-and-immediate insns to decodetree (2020-06-05 17:23:10 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> hw/ssi/imx_spi: Handle tx burst lengths other than 8 correctly
> hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
> hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
> target/arm: Convert crypto insns to gvec
> hw/adc/stm32f2xx_adc: Correct memory region size and access size
> tests/acceptance: Add a boot test for the xlnx-versal-virt machine
> docs/system: Document Aspeed boards
> raspi: Add model of the USB controller
> target/arm: Convert 2-reg-and-shift and 1-reg-imm Neon insns to decodetree
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PULL 00/29] target-arm queue
@ 2022-12-15 12:49 Peter Maydell
0 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
To: qemu-devel
First arm pullreq of the 8.0 series...
The following changes since commit ae2b87341b5ddb0dcb1b3f2d4f586ef18de75873:
Merge tag 'pull-qapi-2022-12-14-v2' of https://repo.or.cz/qemu/armbru into staging (2022-12-14 22:42:14 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20221215
for you to fetch changes up to 4f3ebdc33618e7c163f769047859d6f34373e3af:
target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator (2022-12-15 11:18:20 +0000)
----------------------------------------------------------------
target-arm queue:
* hw/arm/virt: Add properties to allow more granular
configuration of use of highmem space
* target/arm: Add Cortex-A55 CPU
* hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement
* Implement FEAT_EVT
* Some 3-phase-reset conversions for Arm GIC, SMMU
* hw/arm/boot: set initrd with #address-cells type in fdt
* align user-mode exposed ID registers with Linux
* hw/misc: Move some arm-related files from specific_ss into softmmu_ss
* Restrict arm_cpu_exec_interrupt() to TCG accelerator
----------------------------------------------------------------
Gavin Shan (7):
hw/arm/virt: Introduce virt_set_high_memmap() helper
hw/arm/virt: Rename variable size to region_size in virt_set_high_memmap()
hw/arm/virt: Introduce variable region_base in virt_set_high_memmap()
hw/arm/virt: Introduce virt_get_high_memmap_enabled() helper
hw/arm/virt: Improve high memory region address assignment
hw/arm/virt: Add 'compact-highmem' property
hw/arm/virt: Add properties to disable high memory regions
Luke Starrett (1):
hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement
Mihai Carabas (1):
hw/arm/virt: build SMBIOS 19 table
Peter Maydell (15):
target/arm: Allow relevant HCR bits to be written for FEAT_EVT
target/arm: Implement HCR_EL2.TTLBIS traps
target/arm: Implement HCR_EL2.TTLBOS traps
target/arm: Implement HCR_EL2.TICAB,TOCU traps
target/arm: Implement HCR_EL2.TID4 traps
target/arm: Report FEAT_EVT for TCG '-cpu max'
hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset
hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset
hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset
hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset
hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset
hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset
hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset
hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset
hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset
Philippe Mathieu-Daudé (1):
target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator
Schspa Shi (1):
hw/arm/boot: set initrd with #address-cells type in fdt
Thomas Huth (1):
hw/misc: Move some arm-related files from specific_ss into softmmu_ss
Timofey Kutergin (1):
target/arm: Add Cortex-A55 CPU
Zhuojia Shen (1):
target/arm: align exposed ID registers with Linux
docs/system/arm/emulation.rst | 1 +
docs/system/arm/virt.rst | 18 +++
include/hw/arm/smmuv3.h | 2 +-
include/hw/arm/virt.h | 2 +
include/hw/misc/xlnx-zynqmp-apu-ctrl.h | 2 +-
target/arm/cpu.h | 30 +++++
target/arm/kvm-consts.h | 8 +-
hw/arm/boot.c | 10 +-
hw/arm/smmu-common.c | 7 +-
hw/arm/smmuv3.c | 12 +-
hw/arm/virt.c | 202 +++++++++++++++++++++++-----
hw/intc/arm_gic_common.c | 7 +-
hw/intc/arm_gic_kvm.c | 14 +-
hw/intc/arm_gicv3_common.c | 7 +-
hw/intc/arm_gicv3_dist.c | 4 +-
hw/intc/arm_gicv3_its.c | 14 +-
hw/intc/arm_gicv3_its_common.c | 7 +-
hw/intc/arm_gicv3_its_kvm.c | 14 +-
hw/intc/arm_gicv3_kvm.c | 14 +-
hw/misc/imx6_src.c | 2 +-
hw/misc/iotkit-sysctl.c | 1 -
target/arm/cpu.c | 5 +-
target/arm/cpu64.c | 70 ++++++++++
target/arm/cpu_tcg.c | 1 +
target/arm/helper.c | 231 ++++++++++++++++++++++++---------
hw/misc/meson.build | 11 +-
26 files changed, 538 insertions(+), 158 deletions(-)
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PULL 00/29] target-arm queue
@ 2023-05-18 12:50 Peter Maydell
2023-05-18 14:51 ` Richard Henderson
0 siblings, 1 reply; 38+ messages in thread
From: Peter Maydell @ 2023-05-18 12:50 UTC (permalink / raw)
To: qemu-devel
Hi; this mostly contains the first slice of A64 decodetree
patches, plus some other minor pieces. It also has the
enablement of MTE for KVM guests.
thanks
-- PMM
The following changes since commit d27e7c359330ba7020bdbed7ed2316cb4cf6ffc1:
qapi/parser: Drop two bad type hints for now (2023-05-17 10:18:33 -0700)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230518
for you to fetch changes up to 91608e2a44f36e79cb83f863b8a7bb57d2c98061:
docs: Convert u2f.txt to rST (2023-05-18 11:40:32 +0100)
----------------------------------------------------------------
target-arm queue:
* Fix vd == vm overlap in sve_ldff1_z
* Add support for MTE with KVM guests
* Add RAZ/WI handling for DBGDTR[TX|RX]
* Start of conversion of A64 decoder to decodetree
* Saturate L2CTLR_EL1 core count field rather than overflowing
* vexpress: Avoid trivial memory leak of 'flashalias'
* sbsa-ref: switch default cpu core to Neoverse-N1
* sbsa-ref: use Bochs graphics card instead of VGA
* MAINTAINERS: Add Marcin Juszkiewicz to sbsa-ref reviewer list
* docs: Convert u2f.txt to rST
----------------------------------------------------------------
Alex Bennée (1):
target/arm: add RAZ/WI handling for DBGDTR[TX|RX]
Cornelia Huck (1):
arm/kvm: add support for MTE
Marcin Juszkiewicz (3):
sbsa-ref: switch default cpu core to Neoverse-N1
Maintainers: add myself as reviewer for sbsa-ref
sbsa-ref: use Bochs graphics card instead of VGA
Peter Maydell (14):
target/arm: Create decodetree skeleton for A64
target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder
target/arm: Convert Extract instructions to decodetree
target/arm: Convert unconditional branch immediate to decodetree
target/arm: Convert CBZ, CBNZ to decodetree
target/arm: Convert TBZ, TBNZ to decodetree
target/arm: Convert conditional branch insns to decodetree
target/arm: Convert BR, BLR, RET to decodetree
target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree
target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree
target/arm: Convert ERET, ERETAA, ERETAB to decodetree
target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing
hw/arm/vexpress: Avoid trivial memory leak of 'flashalias'
docs: Convert u2f.txt to rST
Richard Henderson (10):
target/arm: Fix vd == vm overlap in sve_ldff1_z
target/arm: Split out disas_a64_legacy
target/arm: Convert PC-rel addressing to decodetree
target/arm: Split gen_add_CC and gen_sub_CC
target/arm: Convert Add/subtract (immediate) to decodetree
target/arm: Convert Add/subtract (immediate with tags) to decodetree
target/arm: Replace bitmask64 with MAKE_64BIT_MASK
target/arm: Convert Logical (immediate) to decodetree
target/arm: Convert Move wide (immediate) to decodetree
target/arm: Convert Bitfield to decodetree
MAINTAINERS | 1 +
docs/system/device-emulation.rst | 1 +
docs/system/devices/usb-u2f.rst | 93 +++
docs/system/devices/usb.rst | 2 +-
docs/u2f.txt | 110 ----
target/arm/cpu.h | 4 +
target/arm/kvm_arm.h | 19 +
target/arm/tcg/translate.h | 5 +
target/arm/tcg/a64.decode | 152 +++++
hw/arm/sbsa-ref.c | 4 +-
hw/arm/vexpress.c | 40 +-
hw/arm/virt.c | 73 ++-
target/arm/cortex-regs.c | 11 +-
target/arm/cpu.c | 9 +-
target/arm/debug_helper.c | 11 +-
target/arm/kvm.c | 35 +
target/arm/kvm64.c | 5 +
target/arm/tcg/sve_helper.c | 6 +
target/arm/tcg/translate-a64.c | 1321 ++++++++++++++++----------------------
target/arm/tcg/meson.build | 1 +
20 files changed, 979 insertions(+), 924 deletions(-)
create mode 100644 docs/system/devices/usb-u2f.rst
delete mode 100644 docs/u2f.txt
create mode 100644 target/arm/tcg/a64.decode
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [PULL 00/29] target-arm queue
2023-05-18 12:50 Peter Maydell
@ 2023-05-18 14:51 ` Richard Henderson
0 siblings, 0 replies; 38+ messages in thread
From: Richard Henderson @ 2023-05-18 14:51 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
On 5/18/23 05:50, Peter Maydell wrote:
> Hi; this mostly contains the first slice of A64 decodetree
> patches, plus some other minor pieces. It also has the
> enablement of MTE for KVM guests.
>
> thanks
> -- PMM
>
> The following changes since commit d27e7c359330ba7020bdbed7ed2316cb4cf6ffc1:
>
> qapi/parser: Drop two bad type hints for now (2023-05-17 10:18:33 -0700)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230518
>
> for you to fetch changes up to 91608e2a44f36e79cb83f863b8a7bb57d2c98061:
>
> docs: Convert u2f.txt to rST (2023-05-18 11:40:32 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Fix vd == vm overlap in sve_ldff1_z
> * Add support for MTE with KVM guests
> * Add RAZ/WI handling for DBGDTR[TX|RX]
> * Start of conversion of A64 decoder to decodetree
> * Saturate L2CTLR_EL1 core count field rather than overflowing
> * vexpress: Avoid trivial memory leak of 'flashalias'
> * sbsa-ref: switch default cpu core to Neoverse-N1
> * sbsa-ref: use Bochs graphics card instead of VGA
> * MAINTAINERS: Add Marcin Juszkiewicz to sbsa-ref reviewer list
> * docs: Convert u2f.txt to rST
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate.
r~
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PULL 00/29] target-arm queue
@ 2024-07-01 16:07 Peter Maydell
2024-07-01 16:07 ` [PULL 01/29] hw/nvram: Add BCM2835 OTP device Peter Maydell
` (29 more replies)
0 siblings, 30 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
The following changes since commit b6d32a06fc0984e537091cba08f2e1ed9f775d74:
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging (2024-06-30 16:12:24 -0700)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240701
for you to fetch changes up to 58c782de557beb496bfb4c5ade721bbbd2480c72:
tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests (2024-07-01 15:40:54 +0100)
----------------------------------------------------------------
target-arm queue:
* tests/avocado: update firmware for sbsa-ref and use all cores
* hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev
* arm: Fix VCMLA Dd, Dn, Dm[idx]
* arm: Fix SQDMULH (by element) with Q=0
* arm: Fix FJCVTZS vs flush-to-zero
* arm: More conversion of A64 AdvSIMD to decodetree
* arm: Enable FEAT_Debugv8p8 for -cpu max
* MAINTAINERS: Update family name for Patrick Leis
* hw/arm/xilinx_zynq: Add boot-mode property
* docs/system/arm: Add a doc for zynq board
* hw/misc: In STM32L4x5 EXTI, correct configurable interrupts
* tests/qtest: fix minor issues in STM32L4x5 tests
----------------------------------------------------------------
Gustavo Romero (3):
target/arm: Fix indentation
target/arm: Move initialization of debug ID registers
target/arm: Enable FEAT_Debugv8p8 for -cpu max
Inès Varhol (3):
tests/qtest: Fix STM32L4x5 SYSCFG irq line 15 state assumption
hw/misc: In STM32L4x5 EXTI, correct configurable interrupts
tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests
Marcin Juszkiewicz (2):
tests/avocado: update firmware for sbsa-ref
tests/avocado: use default amount of cores on sbsa-ref
Nicolin Chen (1):
hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev
Patrick Leis (1):
MAINTAINERS: Update my family name
Rayhan Faizel (3):
hw/nvram: Add BCM2835 OTP device
hw/arm: Connect OTP device to BCM2835
hw/misc: Implement mailbox properties for customer OTP and device specific private keys
Richard Henderson (13):
target/arm: Fix VCMLA Dd, Dn, Dm[idx]
target/arm: Fix SQDMULH (by element) with Q=0
target/arm: Fix FJCVTZS vs flush-to-zero
target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree
target/arm: Convert SDOT, UDOT to decodetree
target/arm: Convert SUDOT, USDOT to decodetree
target/arm: Convert BFDOT to decodetree
target/arm: Convert BFMLALB, BFMLALT to decodetree
target/arm: Convert BFMMLA, SMMLA, UMMLA, USMMLA to decodetree
target/arm: Add data argument to do_fp3_vector
target/arm: Convert FCADD to decodetree
target/arm: Convert FCMLA to decodetree
target/arm: Delete dead code from disas_simd_indexed
Sai Pavan Boddu (3):
hw/misc/zynq_slcr: Add boot-mode property
hw/arm/xilinx_zynq: Add boot-mode property
docs/system/arm: Add a doc for zynq board
MAINTAINERS | 3 +-
docs/system/arm/emulation.rst | 1 +
docs/system/arm/xlnx-zynq.rst | 47 ++
docs/system/target-arm.rst | 1 +
include/hw/arm/bcm2835_peripherals.h | 3 +-
include/hw/arm/raspberrypi-fw-defs.h | 2 +
include/hw/arm/smmu-common.h | 4 +-
include/hw/misc/bcm2835_property.h | 2 +
include/hw/misc/stm32l4x5_exti.h | 2 +
include/hw/nvram/bcm2835_otp.h | 68 +++
target/arm/cpu.h | 2 +
target/arm/helper.h | 10 +
target/arm/tcg/a64.decode | 43 ++
hw/arm/bcm2835_peripherals.c | 15 +-
hw/arm/smmu-common.c | 8 +-
hw/arm/smmuv3.c | 12 +-
hw/arm/xilinx_zynq.c | 31 ++
hw/misc/bcm2835_property.c | 87 ++++
hw/misc/stm32l4x5_exti.c | 28 +-
hw/misc/zynq_slcr.c | 22 +-
hw/nvram/bcm2835_otp.c | 187 +++++++
target/arm/tcg/cpu32.c | 35 +-
target/arm/tcg/cpu64.c | 4 +-
target/arm/tcg/translate-a64.c | 808 ++++++++++---------------------
target/arm/tcg/vec_helper.c | 100 +++-
target/arm/vfp_helper.c | 18 +-
tests/qtest/stm32l4x5_exti-test.c | 8 +
tests/qtest/stm32l4x5_syscfg-test.c | 16 +-
tests/tcg/aarch64/test-2375.c | 21 +
hw/nvram/meson.build | 1 +
tests/avocado/machine_aarch64_sbsaref.py | 16 +-
tests/tcg/aarch64/Makefile.target | 3 +-
32 files changed, 967 insertions(+), 641 deletions(-)
create mode 100644 docs/system/arm/xlnx-zynq.rst
create mode 100644 include/hw/nvram/bcm2835_otp.h
create mode 100644 hw/nvram/bcm2835_otp.c
create mode 100644 tests/tcg/aarch64/test-2375.c
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PULL 01/29] hw/nvram: Add BCM2835 OTP device
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 02/29] hw/arm: Connect OTP device to BCM2835 Peter Maydell
` (28 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Rayhan Faizel <rayhan.faizel@gmail.com>
The OTP device registers are currently stubbed. For now, the device
houses the OTP rows which will be accessed directly by other peripherals.
Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/nvram/bcm2835_otp.h | 68 ++++++++++++
hw/nvram/bcm2835_otp.c | 187 +++++++++++++++++++++++++++++++++
hw/nvram/meson.build | 1 +
3 files changed, 256 insertions(+)
create mode 100644 include/hw/nvram/bcm2835_otp.h
create mode 100644 hw/nvram/bcm2835_otp.c
diff --git a/include/hw/nvram/bcm2835_otp.h b/include/hw/nvram/bcm2835_otp.h
new file mode 100644
index 00000000000..1df33700bde
--- /dev/null
+++ b/include/hw/nvram/bcm2835_otp.h
@@ -0,0 +1,68 @@
+/*
+ * BCM2835 One-Time Programmable (OTP) Memory
+ *
+ * Copyright (c) 2024 Rayhan Faizel <rayhan.faizel@gmail.com>
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef BCM2835_OTP_H
+#define BCM2835_OTP_H
+
+#include "hw/sysbus.h"
+#include "qom/object.h"
+
+#define TYPE_BCM2835_OTP "bcm2835-otp"
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835OTPState, BCM2835_OTP)
+
+#define BCM2835_OTP_ROW_COUNT 66
+
+/* https://elinux.org/BCM2835_registers#OTP */
+#define BCM2835_OTP_BOOTMODE_REG 0x00
+#define BCM2835_OTP_CONFIG_REG 0x04
+#define BCM2835_OTP_CTRL_LO_REG 0x08
+#define BCM2835_OTP_CTRL_HI_REG 0x0c
+#define BCM2835_OTP_STATUS_REG 0x10
+#define BCM2835_OTP_BITSEL_REG 0x14
+#define BCM2835_OTP_DATA_REG 0x18
+#define BCM2835_OTP_ADDR_REG 0x1c
+#define BCM2835_OTP_WRITE_DATA_READ_REG 0x20
+#define BCM2835_OTP_INIT_STATUS_REG 0x24
+
+
+/* -- Row 32: Undocumented -- */
+
+#define BCM2835_OTP_ROW_32 32
+
+/* Lock OTP Programming (Customer OTP and private key) */
+#define BCM2835_OTP_ROW_32_LOCK BIT(6)
+
+/* -- Row 36-43: Customer OTP -- */
+
+#define BCM2835_OTP_CUSTOMER_OTP 36
+#define BCM2835_OTP_CUSTOMER_OTP_LEN 8
+
+/* Magic numbers to lock programming of customer OTP and private key */
+#define BCM2835_OTP_LOCK_NUM1 0xffffffff
+#define BCM2835_OTP_LOCK_NUM2 0xaffe0000
+
+/* -- Row 56-63: Device-specific private key -- */
+
+#define BCM2835_OTP_PRIVATE_KEY 56
+#define BCM2835_OTP_PRIVATE_KEY_LEN 8
+
+
+struct BCM2835OTPState {
+ /* <private> */
+ SysBusDevice parent_obj;
+
+ /* <public> */
+ MemoryRegion iomem;
+ uint32_t otp_rows[BCM2835_OTP_ROW_COUNT];
+};
+
+
+uint32_t bcm2835_otp_get_row(BCM2835OTPState *s, unsigned int row);
+void bcm2835_otp_set_row(BCM2835OTPState *s, unsigned int row, uint32_t value);
+
+#endif
diff --git a/hw/nvram/bcm2835_otp.c b/hw/nvram/bcm2835_otp.c
new file mode 100644
index 00000000000..c4aed28472b
--- /dev/null
+++ b/hw/nvram/bcm2835_otp.c
@@ -0,0 +1,187 @@
+/*
+ * BCM2835 One-Time Programmable (OTP) Memory
+ *
+ * The OTP implementation is mostly a stub except for the OTP rows
+ * which are accessed directly by other peripherals such as the mailbox.
+ *
+ * The OTP registers are unimplemented due to lack of documentation.
+ *
+ * Copyright (c) 2024 Rayhan Faizel <rayhan.faizel@gmail.com>
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "hw/nvram/bcm2835_otp.h"
+#include "migration/vmstate.h"
+
+/* OTP rows are 1-indexed */
+uint32_t bcm2835_otp_get_row(BCM2835OTPState *s, unsigned int row)
+{
+ assert(row <= BCM2835_OTP_ROW_COUNT && row >= 1);
+
+ return s->otp_rows[row - 1];
+}
+
+void bcm2835_otp_set_row(BCM2835OTPState *s, unsigned int row,
+ uint32_t value)
+{
+ assert(row <= BCM2835_OTP_ROW_COUNT && row >= 1);
+
+ /* Real OTP rows work as e-fuses */
+ s->otp_rows[row - 1] |= value;
+}
+
+static uint64_t bcm2835_otp_read(void *opaque, hwaddr addr, unsigned size)
+{
+ switch (addr) {
+ case BCM2835_OTP_BOOTMODE_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_BOOTMODE_REG\n");
+ break;
+ case BCM2835_OTP_CONFIG_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_CONFIG_REG\n");
+ break;
+ case BCM2835_OTP_CTRL_LO_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_CTRL_LO_REG\n");
+ break;
+ case BCM2835_OTP_CTRL_HI_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_CTRL_HI_REG\n");
+ break;
+ case BCM2835_OTP_STATUS_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_STATUS_REG\n");
+ break;
+ case BCM2835_OTP_BITSEL_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_BITSEL_REG\n");
+ break;
+ case BCM2835_OTP_DATA_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_DATA_REG\n");
+ break;
+ case BCM2835_OTP_ADDR_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_ADDR_REG\n");
+ break;
+ case BCM2835_OTP_WRITE_DATA_READ_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_WRITE_DATA_READ_REG\n");
+ break;
+ case BCM2835_OTP_INIT_STATUS_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_INIT_STATUS_REG\n");
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr);
+ }
+
+ return 0;
+}
+
+static void bcm2835_otp_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned int size)
+{
+ switch (addr) {
+ case BCM2835_OTP_BOOTMODE_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_BOOTMODE_REG\n");
+ break;
+ case BCM2835_OTP_CONFIG_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_CONFIG_REG\n");
+ break;
+ case BCM2835_OTP_CTRL_LO_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_CTRL_LO_REG\n");
+ break;
+ case BCM2835_OTP_CTRL_HI_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_CTRL_HI_REG\n");
+ break;
+ case BCM2835_OTP_STATUS_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_STATUS_REG\n");
+ break;
+ case BCM2835_OTP_BITSEL_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_BITSEL_REG\n");
+ break;
+ case BCM2835_OTP_DATA_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_DATA_REG\n");
+ break;
+ case BCM2835_OTP_ADDR_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_ADDR_REG\n");
+ break;
+ case BCM2835_OTP_WRITE_DATA_READ_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_WRITE_DATA_READ_REG\n");
+ break;
+ case BCM2835_OTP_INIT_STATUS_REG:
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_otp: BCM2835_OTP_INIT_STATUS_REG\n");
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr);
+ }
+}
+
+static const MemoryRegionOps bcm2835_otp_ops = {
+ .read = bcm2835_otp_read,
+ .write = bcm2835_otp_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+};
+
+static void bcm2835_otp_realize(DeviceState *dev, Error **errp)
+{
+ BCM2835OTPState *s = BCM2835_OTP(dev);
+ memory_region_init_io(&s->iomem, OBJECT(dev), &bcm2835_otp_ops, s,
+ TYPE_BCM2835_OTP, 0x80);
+ sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
+
+ memset(s->otp_rows, 0x00, sizeof(s->otp_rows));
+}
+
+static const VMStateDescription vmstate_bcm2835_otp = {
+ .name = TYPE_BCM2835_OTP,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (const VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(otp_rows, BCM2835OTPState, BCM2835_OTP_ROW_COUNT),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void bcm2835_otp_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = bcm2835_otp_realize;
+ dc->vmsd = &vmstate_bcm2835_otp;
+}
+
+static const TypeInfo bcm2835_otp_info = {
+ .name = TYPE_BCM2835_OTP,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(BCM2835OTPState),
+ .class_init = bcm2835_otp_class_init,
+};
+
+static void bcm2835_otp_register_types(void)
+{
+ type_register_static(&bcm2835_otp_info);
+}
+
+type_init(bcm2835_otp_register_types)
diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build
index 4996c72456f..10f3639db6a 100644
--- a/hw/nvram/meson.build
+++ b/hw/nvram/meson.build
@@ -1,5 +1,6 @@
system_ss.add(files('fw_cfg-interface.c'))
system_ss.add(files('fw_cfg.c'))
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_otp.c'))
system_ss.add(when: 'CONFIG_CHRP_NVRAM', if_true: files('chrp_nvram.c'))
system_ss.add(when: 'CONFIG_DS1225Y', if_true: files('ds1225y.c'))
system_ss.add(when: 'CONFIG_NMC93XX_EEPROM', if_true: files('eeprom93xx.c'))
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 02/29] hw/arm: Connect OTP device to BCM2835
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
2024-07-01 16:07 ` [PULL 01/29] hw/nvram: Add BCM2835 OTP device Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 03/29] hw/misc: Implement mailbox properties for customer OTP and device specific private keys Peter Maydell
` (27 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Rayhan Faizel <rayhan.faizel@gmail.com>
Replace stubbed OTP memory region with the new OTP device.
Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/bcm2835_peripherals.h | 3 ++-
hw/arm/bcm2835_peripherals.c | 13 ++++++++++++-
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 636203baa5a..1eeaeec9e0e 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -33,6 +33,7 @@
#include "hw/usb/hcd-dwc2.h"
#include "hw/ssi/bcm2835_spi.h"
#include "hw/i2c/bcm2835_i2c.h"
+#include "hw/nvram/bcm2835_otp.h"
#include "hw/misc/unimp.h"
#include "qom/object.h"
@@ -71,7 +72,7 @@ struct BCMSocPeripheralBaseState {
BCM2835SPIState spi[1];
BCM2835I2CState i2c[3];
OrIRQState orgated_i2c_irq;
- UnimplementedDeviceState otp;
+ BCM2835OTPState otp;
UnimplementedDeviceState dbus;
UnimplementedDeviceState ave0;
UnimplementedDeviceState v3d;
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 1695d8b453a..7d735bb56cf 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -116,6 +116,10 @@ static void raspi_peripherals_base_init(Object *obj)
object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
OBJECT(&s->gpu_bus_mr));
+ /* OTP */
+ object_initialize_child(obj, "bcm2835-otp", &s->otp,
+ TYPE_BCM2835_OTP);
+
/* Property channel */
object_initialize_child(obj, "property", &s->property,
TYPE_BCM2835_PROPERTY);
@@ -374,6 +378,14 @@ void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
+ /* OTP */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->otp), errp)) {
+ return;
+ }
+
+ memory_region_add_subregion(&s->peri_mr, OTP_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->otp), 0));
+
/* Property channel */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
return;
@@ -500,7 +512,6 @@ void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp)
create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
- create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 03/29] hw/misc: Implement mailbox properties for customer OTP and device specific private keys
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
2024-07-01 16:07 ` [PULL 01/29] hw/nvram: Add BCM2835 OTP device Peter Maydell
2024-07-01 16:07 ` [PULL 02/29] hw/arm: Connect OTP device to BCM2835 Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 04/29] tests/avocado: update firmware for sbsa-ref Peter Maydell
` (26 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Rayhan Faizel <rayhan.faizel@gmail.com>
Four mailbox properties are implemented as follows:
1. Customer OTP: GET_CUSTOMER_OTP and SET_CUSTOMER_OTP
2. Device-specific private key: GET_PRIVATE_KEY and
SET_PRIVATE_KEY.
The customer OTP is located in the rows 36-43. The device-specific private key
is located in the rows 56-63.
The customer OTP can be locked with the magic numbers 0xffffffff 0xaffe0000
when running the SET_CUSTOMER_OTP mailbox command. Bit 6 of row 32 indicates
this lock, which is undocumented. The lock also applies to the device-specific
private key.
Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/raspberrypi-fw-defs.h | 2 +
include/hw/misc/bcm2835_property.h | 2 +
hw/arm/bcm2835_peripherals.c | 2 +
hw/misc/bcm2835_property.c | 87 ++++++++++++++++++++++++++++
4 files changed, 93 insertions(+)
diff --git a/include/hw/arm/raspberrypi-fw-defs.h b/include/hw/arm/raspberrypi-fw-defs.h
index 8b404e05336..60b8e5b4513 100644
--- a/include/hw/arm/raspberrypi-fw-defs.h
+++ b/include/hw/arm/raspberrypi-fw-defs.h
@@ -56,6 +56,7 @@ enum rpi_firmware_property_tag {
RPI_FWREQ_GET_THROTTLED = 0x00030046,
RPI_FWREQ_GET_CLOCK_MEASURED = 0x00030047,
RPI_FWREQ_NOTIFY_REBOOT = 0x00030048,
+ RPI_FWREQ_GET_PRIVATE_KEY = 0x00030081,
RPI_FWREQ_SET_CLOCK_STATE = 0x00038001,
RPI_FWREQ_SET_CLOCK_RATE = 0x00038002,
RPI_FWREQ_SET_VOLTAGE = 0x00038003,
@@ -73,6 +74,7 @@ enum rpi_firmware_property_tag {
RPI_FWREQ_SET_PERIPH_REG = 0x00038045,
RPI_FWREQ_GET_POE_HAT_VAL = 0x00030049,
RPI_FWREQ_SET_POE_HAT_VAL = 0x00038049,
+ RPI_FWREQ_SET_PRIVATE_KEY = 0x00038081,
RPI_FWREQ_SET_POE_HAT_VAL_OLD = 0x00030050,
RPI_FWREQ_NOTIFY_XHCI_RESET = 0x00030058,
RPI_FWREQ_GET_REBOOT_FLAGS = 0x00030064,
diff --git a/include/hw/misc/bcm2835_property.h b/include/hw/misc/bcm2835_property.h
index ba8896610cc..2f93fd0c757 100644
--- a/include/hw/misc/bcm2835_property.h
+++ b/include/hw/misc/bcm2835_property.h
@@ -11,6 +11,7 @@
#include "hw/sysbus.h"
#include "net/net.h"
#include "hw/display/bcm2835_fb.h"
+#include "hw/nvram/bcm2835_otp.h"
#include "qom/object.h"
#define TYPE_BCM2835_PROPERTY "bcm2835-property"
@@ -26,6 +27,7 @@ struct BCM2835PropertyState {
MemoryRegion iomem;
qemu_irq mbox_irq;
BCM2835FBState *fbdev;
+ BCM2835OTPState *otp;
MACAddr macaddr;
uint32_t board_rev;
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 7d735bb56cf..ac153a96b9a 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -132,6 +132,8 @@ static void raspi_peripherals_base_init(Object *obj)
OBJECT(&s->fb));
object_property_add_const_link(OBJECT(&s->property), "dma-mr",
OBJECT(&s->gpu_bus_mr));
+ object_property_add_const_link(OBJECT(&s->property), "otp",
+ OBJECT(&s->otp));
/* Extended Mass Media Controller */
object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index bdd9a6bbcec..63de3db6215 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -32,6 +32,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
uint32_t tmp;
int n;
uint32_t offset, length, color;
+ uint32_t start_num, number, otp_row;
/*
* Copy the current state of the framebuffer config; we will update
@@ -322,6 +323,89 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
0);
resplen = VCHI_BUSADDR_SIZE;
break;
+
+ /* Customer OTP */
+
+ case RPI_FWREQ_GET_CUSTOMER_OTP:
+ start_num = ldl_le_phys(&s->dma_as, value + 12);
+ number = ldl_le_phys(&s->dma_as, value + 16);
+
+ resplen = 8 + 4 * number;
+
+ for (n = start_num; n < start_num + number &&
+ n < BCM2835_OTP_CUSTOMER_OTP_LEN; n++) {
+ otp_row = bcm2835_otp_get_row(s->otp,
+ BCM2835_OTP_CUSTOMER_OTP + n);
+ stl_le_phys(&s->dma_as,
+ value + 20 + ((n - start_num) << 2), otp_row);
+ }
+ break;
+ case RPI_FWREQ_SET_CUSTOMER_OTP:
+ start_num = ldl_le_phys(&s->dma_as, value + 12);
+ number = ldl_le_phys(&s->dma_as, value + 16);
+
+ resplen = 4;
+
+ /* Magic numbers to permanently lock customer OTP */
+ if (start_num == BCM2835_OTP_LOCK_NUM1 &&
+ number == BCM2835_OTP_LOCK_NUM2) {
+ bcm2835_otp_set_row(s->otp,
+ BCM2835_OTP_ROW_32,
+ BCM2835_OTP_ROW_32_LOCK);
+ break;
+ }
+
+ /* If row 32 has the lock bit, don't allow further writes */
+ if (bcm2835_otp_get_row(s->otp, BCM2835_OTP_ROW_32) &
+ BCM2835_OTP_ROW_32_LOCK) {
+ break;
+ }
+
+ for (n = start_num; n < start_num + number &&
+ n < BCM2835_OTP_CUSTOMER_OTP_LEN; n++) {
+ otp_row = ldl_le_phys(&s->dma_as,
+ value + 20 + ((n - start_num) << 2));
+ bcm2835_otp_set_row(s->otp,
+ BCM2835_OTP_CUSTOMER_OTP + n, otp_row);
+ }
+ break;
+
+ /* Device-specific private key */
+
+ case RPI_FWREQ_GET_PRIVATE_KEY:
+ start_num = ldl_le_phys(&s->dma_as, value + 12);
+ number = ldl_le_phys(&s->dma_as, value + 16);
+
+ resplen = 8 + 4 * number;
+
+ for (n = start_num; n < start_num + number &&
+ n < BCM2835_OTP_PRIVATE_KEY_LEN; n++) {
+ otp_row = bcm2835_otp_get_row(s->otp,
+ BCM2835_OTP_PRIVATE_KEY + n);
+ stl_le_phys(&s->dma_as,
+ value + 20 + ((n - start_num) << 2), otp_row);
+ }
+ break;
+ case RPI_FWREQ_SET_PRIVATE_KEY:
+ start_num = ldl_le_phys(&s->dma_as, value + 12);
+ number = ldl_le_phys(&s->dma_as, value + 16);
+
+ resplen = 4;
+
+ /* If row 32 has the lock bit, don't allow further writes */
+ if (bcm2835_otp_get_row(s->otp, BCM2835_OTP_ROW_32) &
+ BCM2835_OTP_ROW_32_LOCK) {
+ break;
+ }
+
+ for (n = start_num; n < start_num + number &&
+ n < BCM2835_OTP_PRIVATE_KEY_LEN; n++) {
+ otp_row = ldl_le_phys(&s->dma_as,
+ value + 20 + ((n - start_num) << 2));
+ bcm2835_otp_set_row(s->otp,
+ BCM2835_OTP_PRIVATE_KEY + n, otp_row);
+ }
+ break;
default:
qemu_log_mask(LOG_UNIMP,
"bcm2835_property: unhandled tag 0x%08x\n", tag);
@@ -449,6 +533,9 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp)
s->dma_mr = MEMORY_REGION(obj);
address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_PROPERTY "-memory");
+ obj = object_property_get_link(OBJECT(dev), "otp", &error_abort);
+ s->otp = BCM2835_OTP(obj);
+
/* TODO: connect to MAC address of USB NIC device, once we emulate it */
qemu_macaddr_default_if_unset(&s->macaddr);
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 04/29] tests/avocado: update firmware for sbsa-ref
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (2 preceding siblings ...)
2024-07-01 16:07 ` [PULL 03/29] hw/misc: Implement mailbox properties for customer OTP and device specific private keys Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 05/29] tests/avocado: use default amount of cores on sbsa-ref Peter Maydell
` (25 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Update firmware to have graphics card memory fix from EDK2 commit
c1d1910be6e04a8b1a73090cf2881fb698947a6e:
OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C
Some platforms (such as SBSA-QEMU on recent builds of the emulator) only
tolerate misaligned accesses to normal memory, and raise alignment
faults on such accesses to device memory, which is the default for PCIe
MMIO BARs.
When emulating a PCIe graphics controller, the framebuffer is typically
exposed via a MMIO BAR, while the disposition of the region is closer to
memory (no side effects on reads or writes, except for the changing
picture on the screen; direct random access to any pixel in the image).
In order to permit the use of such controllers on platforms that only
tolerate these types of accesses for normal memory, it is necessary to
remap the memory. Use the DXE services to set the desired capabilities
and attributes.
Hide this behavior under a feature PCD so only platforms that really
need it can enable it. (OVMF on x86 has no need for this)
With this fix enabled we can boot sbsa-ref with more than one cpu core.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240620-b4-new-firmware-v3-1-29a3a2f1be1e@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/avocado/machine_aarch64_sbsaref.py | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py b/tests/avocado/machine_aarch64_sbsaref.py
index 6bb82f2a03c..e854ec6a1af 100644
--- a/tests/avocado/machine_aarch64_sbsaref.py
+++ b/tests/avocado/machine_aarch64_sbsaref.py
@@ -37,18 +37,18 @@ def fetch_firmware(self):
Used components:
- - Trusted Firmware 2.11.0
- - Tianocore EDK2 stable202405
- - Tianocore EDK2-platforms commit 4bbd0ed
+ - Trusted Firmware v2.11.0
+ - Tianocore EDK2 4d4f569924
+ - Tianocore EDK2-platforms 3f08401
"""
# Secure BootRom (TF-A code)
fs0_xz_url = (
"https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/"
- "20240528-140808/edk2/SBSA_FLASH0.fd.xz"
+ "20240619-148232/edk2/SBSA_FLASH0.fd.xz"
)
- fs0_xz_hash = "fa6004900b67172914c908b78557fec4d36a5f784f4c3dd08f49adb75e1892a9"
+ fs0_xz_hash = "0c954842a590988f526984de22e21ae0ab9cb351a0c99a8a58e928f0c7359cf7"
tar_xz_path = self.fetch_asset(fs0_xz_url, asset_hash=fs0_xz_hash,
algorithm='sha256')
archive.extract(tar_xz_path, self.workdir)
@@ -57,9 +57,9 @@ def fetch_firmware(self):
# Non-secure rom (UEFI and EFI variables)
fs1_xz_url = (
"https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/"
- "20240528-140808/edk2/SBSA_FLASH1.fd.xz"
+ "20240619-148232/edk2/SBSA_FLASH1.fd.xz"
)
- fs1_xz_hash = "5f3747d4000bc416d9641e33ff4ac60c3cc8cb74ca51b6e932e58531c62eb6f7"
+ fs1_xz_hash = "c6ec39374c4d79bb9e9cdeeb6db44732d90bb4a334cec92002b3f4b9cac4b5ee"
tar_xz_path = self.fetch_asset(fs1_xz_url, asset_hash=fs1_xz_hash,
algorithm='sha256')
archive.extract(tar_xz_path, self.workdir)
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 05/29] tests/avocado: use default amount of cores on sbsa-ref
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (3 preceding siblings ...)
2024-07-01 16:07 ` [PULL 04/29] tests/avocado: update firmware for sbsa-ref Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 06/29] hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev Peter Maydell
` (24 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
The version of the sbsa-ref EDK2 firmware we used to use in this test
had a bug where it might make an unaligned access to the framebuffer,
which causes a guest crash on newer versions of QEMU where we enforce
the architectural requirement that unaligned accesses to Device memory
should take an exception.
We happened to not notice this because our test was booting with "-smp
1" and through luck this didn't write the boot logo to the framebuffer
at an unaligned address; but trying to boot the same firmware with two
CPUs would result in a guest crash. Now we have updated the firmware
we're using for the test, we can make the test use all the cores on the
board, so we are testing the SMP boot path.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240620-b4-new-firmware-v3-2-29a3a2f1be1e@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/avocado/machine_aarch64_sbsaref.py | 2 --
1 file changed, 2 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py b/tests/avocado/machine_aarch64_sbsaref.py
index e854ec6a1af..e920bbf08c1 100644
--- a/tests/avocado/machine_aarch64_sbsaref.py
+++ b/tests/avocado/machine_aarch64_sbsaref.py
@@ -75,8 +75,6 @@ def fetch_firmware(self):
f"if=pflash,file={fs0_path},format=raw",
"-drive",
f"if=pflash,file={fs1_path},format=raw",
- "-smp",
- "1",
"-machine",
"sbsa-ref",
)
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 06/29] hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (4 preceding siblings ...)
2024-07-01 16:07 ` [PULL 05/29] tests/avocado: use default amount of cores on sbsa-ref Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 07/29] target/arm: Fix VCMLA Dd, Dn, Dm[idx] Peter Maydell
` (23 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Nicolin Chen <nicolinc@nvidia.com>
The caller of smmu_iommu_mr wants to get sdev for smmuv3_flush_config().
Do it directly instead of bridging with an iommu mr pointer.
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Message-id: 20240619002218.926674-1-nicolinc@nvidia.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/smmu-common.h | 4 ++--
hw/arm/smmu-common.c | 8 ++------
hw/arm/smmuv3.c | 12 ++++--------
3 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index 5ec2e6c1a43..687b7ca132d 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -182,8 +182,8 @@ int smmu_ptw(SMMUTransCfg *cfg, dma_addr_t iova, IOMMUAccessFlags perm,
*/
SMMUTransTableInfo *select_tt(SMMUTransCfg *cfg, dma_addr_t iova);
-/* Return the iommu mr associated to @sid, or NULL if none */
-IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t sid);
+/* Return the SMMUDevice associated to @sid, or NULL if none */
+SMMUDevice *smmu_find_sdev(SMMUState *s, uint32_t sid);
#define SMMU_IOTLB_MAX_SIZE 256
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index 1ce706bf94b..b6601cc102e 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -620,20 +620,16 @@ static const PCIIOMMUOps smmu_ops = {
.get_address_space = smmu_find_add_as,
};
-IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t sid)
+SMMUDevice *smmu_find_sdev(SMMUState *s, uint32_t sid)
{
uint8_t bus_n, devfn;
SMMUPciBus *smmu_bus;
- SMMUDevice *smmu;
bus_n = PCI_BUS_NUM(sid);
smmu_bus = smmu_find_smmu_pcibus(s, bus_n);
if (smmu_bus) {
devfn = SMMU_PCI_DEVFN(sid);
- smmu = smmu_bus->pbdev[devfn];
- if (smmu) {
- return &smmu->iommu;
- }
+ return smmu_bus->pbdev[devfn];
}
return NULL;
}
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 2d1e0d55ec2..445e04ddf7c 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1218,20 +1218,18 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
case SMMU_CMD_CFGI_STE:
{
uint32_t sid = CMD_SID(&cmd);
- IOMMUMemoryRegion *mr = smmu_iommu_mr(bs, sid);
- SMMUDevice *sdev;
+ SMMUDevice *sdev = smmu_find_sdev(bs, sid);
if (CMD_SSEC(&cmd)) {
cmd_error = SMMU_CERROR_ILL;
break;
}
- if (!mr) {
+ if (!sdev) {
break;
}
trace_smmuv3_cmdq_cfgi_ste(sid);
- sdev = container_of(mr, SMMUDevice, iommu);
smmuv3_flush_config(sdev);
break;
@@ -1260,20 +1258,18 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
case SMMU_CMD_CFGI_CD_ALL:
{
uint32_t sid = CMD_SID(&cmd);
- IOMMUMemoryRegion *mr = smmu_iommu_mr(bs, sid);
- SMMUDevice *sdev;
+ SMMUDevice *sdev = smmu_find_sdev(bs, sid);
if (CMD_SSEC(&cmd)) {
cmd_error = SMMU_CERROR_ILL;
break;
}
- if (!mr) {
+ if (!sdev) {
break;
}
trace_smmuv3_cmdq_cfgi_cd(sid);
- sdev = container_of(mr, SMMUDevice, iommu);
smmuv3_flush_config(sdev);
break;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 07/29] target/arm: Fix VCMLA Dd, Dn, Dm[idx]
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (5 preceding siblings ...)
2024-07-01 16:07 ` [PULL 06/29] hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 08/29] target/arm: Fix SQDMULH (by element) with Q=0 Peter Maydell
` (22 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
The inner loop, bounded by eltspersegment, must not be
larger than the outer loop, bounded by elements.
Cc: qemu-stable@nongnu.org
Fixes: 18fc2405781 ("target/arm: Implement SVE fp complex multiply add (indexed)")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2376
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/vec_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index b05922b425f..7b34cc98afe 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -907,7 +907,7 @@ void HELPER(gvec_fcmlah_idx)(void *vd, void *vn, void *vm, void *va,
intptr_t index = extract32(desc, SIMD_DATA_SHIFT + 2, 2);
uint32_t neg_real = flip ^ neg_imag;
intptr_t elements = opr_sz / sizeof(float16);
- intptr_t eltspersegment = 16 / sizeof(float16);
+ intptr_t eltspersegment = MIN(16 / sizeof(float16), elements);
intptr_t i, j;
/* Shift boolean to the sign bit so we can xor to negate. */
@@ -969,7 +969,7 @@ void HELPER(gvec_fcmlas_idx)(void *vd, void *vn, void *vm, void *va,
intptr_t index = extract32(desc, SIMD_DATA_SHIFT + 2, 2);
uint32_t neg_real = flip ^ neg_imag;
intptr_t elements = opr_sz / sizeof(float32);
- intptr_t eltspersegment = 16 / sizeof(float32);
+ intptr_t eltspersegment = MIN(16 / sizeof(float32), elements);
intptr_t i, j;
/* Shift boolean to the sign bit so we can xor to negate. */
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 08/29] target/arm: Fix SQDMULH (by element) with Q=0
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (6 preceding siblings ...)
2024-07-01 16:07 ` [PULL 07/29] target/arm: Fix VCMLA Dd, Dn, Dm[idx] Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 09/29] target/arm: Fix FJCVTZS vs flush-to-zero Peter Maydell
` (21 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
The inner loop, bounded by eltspersegment, must not be
larger than the outer loop, bounded by elements.
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/vec_helper.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index 7b34cc98afe..d477479bb19 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -317,10 +317,12 @@ void HELPER(neon_sqdmulh_idx_h)(void *vd, void *vn, void *vm,
intptr_t i, j, opr_sz = simd_oprsz(desc);
int idx = simd_data(desc);
int16_t *d = vd, *n = vn, *m = (int16_t *)vm + H2(idx);
+ intptr_t elements = opr_sz / 2;
+ intptr_t eltspersegment = MIN(16 / 2, elements);
- for (i = 0; i < opr_sz / 2; i += 16 / 2) {
+ for (i = 0; i < elements; i += 16 / 2) {
int16_t mm = m[i];
- for (j = 0; j < 16 / 2; ++j) {
+ for (j = 0; j < eltspersegment; ++j) {
d[i + j] = do_sqrdmlah_h(n[i + j], mm, 0, false, false, vq);
}
}
@@ -333,10 +335,12 @@ void HELPER(neon_sqrdmulh_idx_h)(void *vd, void *vn, void *vm,
intptr_t i, j, opr_sz = simd_oprsz(desc);
int idx = simd_data(desc);
int16_t *d = vd, *n = vn, *m = (int16_t *)vm + H2(idx);
+ intptr_t elements = opr_sz / 2;
+ intptr_t eltspersegment = MIN(16 / 2, elements);
- for (i = 0; i < opr_sz / 2; i += 16 / 2) {
+ for (i = 0; i < elements; i += 16 / 2) {
int16_t mm = m[i];
- for (j = 0; j < 16 / 2; ++j) {
+ for (j = 0; j < eltspersegment; ++j) {
d[i + j] = do_sqrdmlah_h(n[i + j], mm, 0, false, true, vq);
}
}
@@ -512,10 +516,12 @@ void HELPER(neon_sqdmulh_idx_s)(void *vd, void *vn, void *vm,
intptr_t i, j, opr_sz = simd_oprsz(desc);
int idx = simd_data(desc);
int32_t *d = vd, *n = vn, *m = (int32_t *)vm + H4(idx);
+ intptr_t elements = opr_sz / 4;
+ intptr_t eltspersegment = MIN(16 / 4, elements);
- for (i = 0; i < opr_sz / 4; i += 16 / 4) {
+ for (i = 0; i < elements; i += 16 / 4) {
int32_t mm = m[i];
- for (j = 0; j < 16 / 4; ++j) {
+ for (j = 0; j < eltspersegment; ++j) {
d[i + j] = do_sqrdmlah_s(n[i + j], mm, 0, false, false, vq);
}
}
@@ -528,10 +534,12 @@ void HELPER(neon_sqrdmulh_idx_s)(void *vd, void *vn, void *vm,
intptr_t i, j, opr_sz = simd_oprsz(desc);
int idx = simd_data(desc);
int32_t *d = vd, *n = vn, *m = (int32_t *)vm + H4(idx);
+ intptr_t elements = opr_sz / 4;
+ intptr_t eltspersegment = MIN(16 / 4, elements);
- for (i = 0; i < opr_sz / 4; i += 16 / 4) {
+ for (i = 0; i < elements; i += 16 / 4) {
int32_t mm = m[i];
- for (j = 0; j < 16 / 4; ++j) {
+ for (j = 0; j < eltspersegment; ++j) {
d[i + j] = do_sqrdmlah_s(n[i + j], mm, 0, false, true, vq);
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 09/29] target/arm: Fix FJCVTZS vs flush-to-zero
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (7 preceding siblings ...)
2024-07-01 16:07 ` [PULL 08/29] target/arm: Fix SQDMULH (by element) with Q=0 Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 10/29] target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree Peter Maydell
` (20 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Input denormals cause the Javascript inexact bit
(output to Z) to be set.
Cc: qemu-stable@nongnu.org
Fixes: 6c1f6f2733a ("target/arm: Implement ARMv8.3-JSConv")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2375
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-4-richard.henderson@linaro.org
[PMM: fixed hardcoded tab in test case]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/vfp_helper.c | 18 +++++++++---------
tests/tcg/aarch64/test-2375.c | 21 +++++++++++++++++++++
tests/tcg/aarch64/Makefile.target | 3 ++-
3 files changed, 32 insertions(+), 10 deletions(-)
create mode 100644 tests/tcg/aarch64/test-2375.c
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index ce26b8a71a1..50d7042fa9e 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -1091,8 +1091,8 @@ const FloatRoundMode arm_rmode_to_sf_map[] = {
uint64_t HELPER(fjcvtzs)(float64 value, void *vstatus)
{
float_status *status = vstatus;
- uint32_t inexact, frac;
- uint32_t e_old, e_new;
+ uint32_t frac, e_old, e_new;
+ bool inexact;
e_old = get_float_exception_flags(status);
set_float_exception_flags(0, status);
@@ -1100,13 +1100,13 @@ uint64_t HELPER(fjcvtzs)(float64 value, void *vstatus)
e_new = get_float_exception_flags(status);
set_float_exception_flags(e_old | e_new, status);
- if (value == float64_chs(float64_zero)) {
- /* While not inexact for IEEE FP, -0.0 is inexact for JavaScript. */
- inexact = 1;
- } else {
- /* Normal inexact or overflow or NaN */
- inexact = e_new & (float_flag_inexact | float_flag_invalid);
- }
+ /* Normal inexact, denormal with flush-to-zero, or overflow or NaN */
+ inexact = e_new & (float_flag_inexact |
+ float_flag_input_denormal |
+ float_flag_invalid);
+
+ /* While not inexact for IEEE FP, -0.0 is inexact for JavaScript. */
+ inexact |= value == float64_chs(float64_zero);
/* Pack the result and the env->ZF representation of Z together. */
return deposit64(frac, 32, 32, inexact);
diff --git a/tests/tcg/aarch64/test-2375.c b/tests/tcg/aarch64/test-2375.c
new file mode 100644
index 00000000000..84c7e7de716
--- /dev/null
+++ b/tests/tcg/aarch64/test-2375.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Copyright (c) 2024 Linaro Ltd */
+/* See https://gitlab.com/qemu-project/qemu/-/issues/2375 */
+
+#include <assert.h>
+
+int main(void)
+{
+ int r, z;
+
+ asm("msr fpcr, %2\n\t"
+ "fjcvtzs %w0, %d3\n\t"
+ "cset %1, eq"
+ : "=r"(r), "=r"(z)
+ : "r"(0x01000000L), /* FZ = 1 */
+ "w"(0xfcff00L)); /* denormal */
+
+ assert(r == 0);
+ assert(z == 0);
+ return 0;
+}
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index 70d728ae9af..4ecbca6a416 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -41,8 +41,9 @@ endif
# Pauth Tests
ifneq ($(CROSS_CC_HAS_ARMV8_3),)
-AARCH64_TESTS += pauth-1 pauth-2 pauth-4 pauth-5
+AARCH64_TESTS += pauth-1 pauth-2 pauth-4 pauth-5 test-2375
pauth-%: CFLAGS += -march=armv8.3-a
+test-2375: CFLAGS += -march=armv8.3-a
run-pauth-1: QEMU_OPTS += -cpu max
run-pauth-2: QEMU_OPTS += -cpu max
# Choose a cpu with FEAT_Pauth but without FEAT_FPAC for pauth-[45].
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 10/29] target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (8 preceding siblings ...)
2024-07-01 16:07 ` [PULL 09/29] target/arm: Fix FJCVTZS vs flush-to-zero Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 11/29] target/arm: Convert SDOT, UDOT " Peter Maydell
` (19 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.h | 10 ++
target/arm/tcg/a64.decode | 16 +++
target/arm/tcg/translate-a64.c | 206 +++++++++++++--------------------
target/arm/tcg/vec_helper.c | 72 ++++++++++++
4 files changed, 180 insertions(+), 124 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index eca2043fc2a..970d059dec5 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -979,6 +979,16 @@ DEF_HELPER_FLAGS_5(neon_sqrdmulh_idx_h, TCG_CALL_NO_RWG,
DEF_HELPER_FLAGS_5(neon_sqrdmulh_idx_s, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_5(neon_sqrdmlah_idx_h, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_5(neon_sqrdmlah_idx_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_5(neon_sqrdmlsh_idx_h, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_5(neon_sqrdmlsh_idx_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, i32)
+
DEF_HELPER_FLAGS_4(sve2_sqdmulh_b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(sve2_sqdmulh_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(sve2_sqdmulh_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 2b7a3254a0e..613cc9365cf 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -781,6 +781,8 @@ CMEQ_s 0111 1110 111 ..... 10001 1 ..... ..... @rrr_d
SQDMULH_s 0101 1110 ..1 ..... 10110 1 ..... ..... @rrr_e
SQRDMULH_s 0111 1110 ..1 ..... 10110 1 ..... ..... @rrr_e
+SQRDMLAH_s 0111 1110 ..0 ..... 10000 1 ..... ..... @rrr_e
+SQRDMLSH_s 0111 1110 ..0 ..... 10001 1 ..... ..... @rrr_e
### Advanced SIMD scalar pairwise
@@ -941,6 +943,8 @@ MLS_v 0.10 1110 ..1 ..... 10010 1 ..... ..... @qrrr_e
SQDMULH_v 0.00 1110 ..1 ..... 10110 1 ..... ..... @qrrr_e
SQRDMULH_v 0.10 1110 ..1 ..... 10110 1 ..... ..... @qrrr_e
+SQRDMLAH_v 0.10 1110 ..0 ..... 10000 1 ..... ..... @qrrr_e
+SQRDMLSH_v 0.10 1110 ..0 ..... 10001 1 ..... ..... @qrrr_e
### Advanced SIMD scalar x indexed element
@@ -966,6 +970,12 @@ SQDMULH_si 0101 1111 10 .. .... 1100 . 0 ..... ..... @rrx_s
SQRDMULH_si 0101 1111 01 .. .... 1101 . 0 ..... ..... @rrx_h
SQRDMULH_si 0101 1111 10 . ..... 1101 . 0 ..... ..... @rrx_s
+SQRDMLAH_si 0111 1111 01 .. .... 1101 . 0 ..... ..... @rrx_h
+SQRDMLAH_si 0111 1111 10 .. .... 1101 . 0 ..... ..... @rrx_s
+
+SQRDMLSH_si 0111 1111 01 .. .... 1111 . 0 ..... ..... @rrx_h
+SQRDMLSH_si 0111 1111 10 .. .... 1111 . 0 ..... ..... @rrx_s
+
### Advanced SIMD vector x indexed element
FMUL_vi 0.00 1111 00 .. .... 1001 . 0 ..... ..... @qrrx_h
@@ -1004,6 +1014,12 @@ SQDMULH_vi 0.00 1111 10 . ..... 1100 . 0 ..... ..... @qrrx_s
SQRDMULH_vi 0.00 1111 01 .. .... 1101 . 0 ..... ..... @qrrx_h
SQRDMULH_vi 0.00 1111 10 . ..... 1101 . 0 ..... ..... @qrrx_s
+SQRDMLAH_vi 0.10 1111 01 .. .... 1101 . 0 ..... ..... @qrrx_h
+SQRDMLAH_vi 0.10 1111 10 .. .... 1101 . 0 ..... ..... @qrrx_s
+
+SQRDMLSH_vi 0.10 1111 01 .. .... 1111 . 0 ..... ..... @qrrx_h
+SQRDMLSH_vi 0.10 1111 10 .. .... 1111 . 0 ..... ..... @qrrx_s
+
# Floating-point conditional select
FCSEL 0001 1110 .. 1 rm:5 cond:4 11 rn:5 rd:5 esz=%esz_hsd
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 93543da39cc..32c24c74220 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5235,6 +5235,43 @@ static const ENVScalar2 f_scalar_sqrdmulh = {
};
TRANS(SQRDMULH_s, do_env_scalar2_hs, a, &f_scalar_sqrdmulh)
+typedef struct ENVScalar3 {
+ NeonGenThreeOpEnvFn *gen_hs[2];
+} ENVScalar3;
+
+static bool do_env_scalar3_hs(DisasContext *s, arg_rrr_e *a,
+ const ENVScalar3 *f)
+{
+ TCGv_i32 t0, t1, t2;
+
+ if (a->esz != MO_16 && a->esz != MO_32) {
+ return false;
+ }
+ if (!fp_access_check(s)) {
+ return true;
+ }
+
+ t0 = tcg_temp_new_i32();
+ t1 = tcg_temp_new_i32();
+ t2 = tcg_temp_new_i32();
+ read_vec_element_i32(s, t0, a->rn, 0, a->esz);
+ read_vec_element_i32(s, t1, a->rm, 0, a->esz);
+ read_vec_element_i32(s, t2, a->rd, 0, a->esz);
+ f->gen_hs[a->esz - 1](t0, tcg_env, t0, t1, t2);
+ write_fp_sreg(s, a->rd, t0);
+ return true;
+}
+
+static const ENVScalar3 f_scalar_sqrdmlah = {
+ { gen_helper_neon_qrdmlah_s16, gen_helper_neon_qrdmlah_s32 }
+};
+TRANS_FEAT(SQRDMLAH_s, aa64_rdm, do_env_scalar3_hs, a, &f_scalar_sqrdmlah)
+
+static const ENVScalar3 f_scalar_sqrdmlsh = {
+ { gen_helper_neon_qrdmlsh_s16, gen_helper_neon_qrdmlsh_s32 }
+};
+TRANS_FEAT(SQRDMLSH_s, aa64_rdm, do_env_scalar3_hs, a, &f_scalar_sqrdmlsh)
+
static bool do_cmop_d(DisasContext *s, arg_rrr_e *a, TCGCond cond)
{
if (fp_access_check(s)) {
@@ -5552,6 +5589,8 @@ TRANS(CMTST_v, do_gvec_fn3, a, gen_gvec_cmtst)
TRANS(SQDMULH_v, do_gvec_fn3_no8_no64, a, gen_gvec_sqdmulh_qc)
TRANS(SQRDMULH_v, do_gvec_fn3_no8_no64, a, gen_gvec_sqrdmulh_qc)
+TRANS_FEAT(SQRDMLAH_v, aa64_rdm, do_gvec_fn3_no8_no64, a, gen_gvec_sqrdmlah_qc)
+TRANS_FEAT(SQRDMLSH_v, aa64_rdm, do_gvec_fn3_no8_no64, a, gen_gvec_sqrdmlsh_qc)
/*
* Advanced SIMD scalar/vector x indexed element
@@ -5681,6 +5720,29 @@ static bool do_env_scalar2_idx_hs(DisasContext *s, arg_rrx_e *a,
TRANS(SQDMULH_si, do_env_scalar2_idx_hs, a, &f_scalar_sqdmulh)
TRANS(SQRDMULH_si, do_env_scalar2_idx_hs, a, &f_scalar_sqrdmulh)
+static bool do_env_scalar3_idx_hs(DisasContext *s, arg_rrx_e *a,
+ const ENVScalar3 *f)
+{
+ if (a->esz < MO_16 || a->esz > MO_32) {
+ return false;
+ }
+ if (fp_access_check(s)) {
+ TCGv_i32 t0 = tcg_temp_new_i32();
+ TCGv_i32 t1 = tcg_temp_new_i32();
+ TCGv_i32 t2 = tcg_temp_new_i32();
+
+ read_vec_element_i32(s, t0, a->rn, 0, a->esz);
+ read_vec_element_i32(s, t1, a->rm, a->idx, a->esz);
+ read_vec_element_i32(s, t2, a->rd, 0, a->esz);
+ f->gen_hs[a->esz - 1](t0, tcg_env, t0, t1, t2);
+ write_fp_sreg(s, a->rd, t0);
+ }
+ return true;
+}
+
+TRANS_FEAT(SQRDMLAH_si, aa64_rdm, do_env_scalar3_idx_hs, a, &f_scalar_sqrdmlah)
+TRANS_FEAT(SQRDMLSH_si, aa64_rdm, do_env_scalar3_idx_hs, a, &f_scalar_sqrdmlsh)
+
static bool do_fp3_vector_idx(DisasContext *s, arg_qrrx_e *a,
gen_helper_gvec_3_ptr * const fns[3])
{
@@ -5838,6 +5900,20 @@ static gen_helper_gvec_4 * const f_vector_idx_sqrdmulh[2] = {
};
TRANS(SQRDMULH_vi, do_int3_qc_vector_idx, a, f_vector_idx_sqrdmulh)
+static gen_helper_gvec_4 * const f_vector_idx_sqrdmlah[2] = {
+ gen_helper_neon_sqrdmlah_idx_h,
+ gen_helper_neon_sqrdmlah_idx_s,
+};
+TRANS_FEAT(SQRDMLAH_vi, aa64_rdm, do_int3_qc_vector_idx, a,
+ f_vector_idx_sqrdmlah)
+
+static gen_helper_gvec_4 * const f_vector_idx_sqrdmlsh[2] = {
+ gen_helper_neon_sqrdmlsh_idx_h,
+ gen_helper_neon_sqrdmlsh_idx_s,
+};
+TRANS_FEAT(SQRDMLSH_vi, aa64_rdm, do_int3_qc_vector_idx, a,
+ f_vector_idx_sqrdmlsh)
+
/*
* Advanced SIMD scalar pairwise
*/
@@ -9536,84 +9612,6 @@ static void disas_simd_scalar_three_reg_diff(DisasContext *s, uint32_t insn)
}
}
-/* AdvSIMD scalar three same extra
- * 31 30 29 28 24 23 22 21 20 16 15 14 11 10 9 5 4 0
- * +-----+---+-----------+------+---+------+---+--------+---+----+----+
- * | 0 1 | U | 1 1 1 1 0 | size | 0 | Rm | 1 | opcode | 1 | Rn | Rd |
- * +-----+---+-----------+------+---+------+---+--------+---+----+----+
- */
-static void disas_simd_scalar_three_reg_same_extra(DisasContext *s,
- uint32_t insn)
-{
- int rd = extract32(insn, 0, 5);
- int rn = extract32(insn, 5, 5);
- int opcode = extract32(insn, 11, 4);
- int rm = extract32(insn, 16, 5);
- int size = extract32(insn, 22, 2);
- bool u = extract32(insn, 29, 1);
- TCGv_i32 ele1, ele2, ele3;
- TCGv_i64 res;
- bool feature;
-
- switch (u * 16 + opcode) {
- case 0x10: /* SQRDMLAH (vector) */
- case 0x11: /* SQRDMLSH (vector) */
- if (size != 1 && size != 2) {
- unallocated_encoding(s);
- return;
- }
- feature = dc_isar_feature(aa64_rdm, s);
- break;
- default:
- unallocated_encoding(s);
- return;
- }
- if (!feature) {
- unallocated_encoding(s);
- return;
- }
- if (!fp_access_check(s)) {
- return;
- }
-
- /* Do a single operation on the lowest element in the vector.
- * We use the standard Neon helpers and rely on 0 OP 0 == 0
- * with no side effects for all these operations.
- * OPTME: special-purpose helpers would avoid doing some
- * unnecessary work in the helper for the 16 bit cases.
- */
- ele1 = tcg_temp_new_i32();
- ele2 = tcg_temp_new_i32();
- ele3 = tcg_temp_new_i32();
-
- read_vec_element_i32(s, ele1, rn, 0, size);
- read_vec_element_i32(s, ele2, rm, 0, size);
- read_vec_element_i32(s, ele3, rd, 0, size);
-
- switch (opcode) {
- case 0x0: /* SQRDMLAH */
- if (size == 1) {
- gen_helper_neon_qrdmlah_s16(ele3, tcg_env, ele1, ele2, ele3);
- } else {
- gen_helper_neon_qrdmlah_s32(ele3, tcg_env, ele1, ele2, ele3);
- }
- break;
- case 0x1: /* SQRDMLSH */
- if (size == 1) {
- gen_helper_neon_qrdmlsh_s16(ele3, tcg_env, ele1, ele2, ele3);
- } else {
- gen_helper_neon_qrdmlsh_s32(ele3, tcg_env, ele1, ele2, ele3);
- }
- break;
- default:
- g_assert_not_reached();
- }
-
- res = tcg_temp_new_i64();
- tcg_gen_extu_i32_i64(res, ele3);
- write_fp_dreg(s, rd, res);
-}
-
static void handle_2misc_64(DisasContext *s, int opcode, bool u,
TCGv_i64 tcg_rd, TCGv_i64 tcg_rn,
TCGv_i32 tcg_rmode, TCGv_ptr tcg_fpstatus)
@@ -10892,14 +10890,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
int rot;
switch (u * 16 + opcode) {
- case 0x10: /* SQRDMLAH (vector) */
- case 0x11: /* SQRDMLSH (vector) */
- if (size != 1 && size != 2) {
- unallocated_encoding(s);
- return;
- }
- feature = dc_isar_feature(aa64_rdm, s);
- break;
case 0x02: /* SDOT (vector) */
case 0x12: /* UDOT (vector) */
if (size != MO_32) {
@@ -10957,6 +10947,8 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
break;
default:
+ case 0x10: /* SQRDMLAH (vector) */
+ case 0x11: /* SQRDMLSH (vector) */
unallocated_encoding(s);
return;
}
@@ -10969,14 +10961,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
switch (opcode) {
- case 0x0: /* SQRDMLAH (vector) */
- gen_gvec_fn3(s, is_q, rd, rn, rm, gen_gvec_sqrdmlah_qc, size);
- return;
-
- case 0x1: /* SQRDMLSH (vector) */
- gen_gvec_fn3(s, is_q, rd, rn, rm, gen_gvec_sqrdmlsh_qc, size);
- return;
-
case 0x2: /* SDOT / UDOT */
gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, 0,
u ? gen_helper_gvec_udot_b : gen_helper_gvec_sdot_b);
@@ -12059,13 +12043,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x0b: /* SQDMULL, SQDMULL2 */
is_long = true;
break;
- case 0x1d: /* SQRDMLAH */
- case 0x1f: /* SQRDMLSH */
- if (!dc_isar_feature(aa64_rdm, s)) {
- unallocated_encoding(s);
- return;
- }
- break;
case 0x0e: /* SDOT */
case 0x1e: /* UDOT */
if (is_scalar || size != MO_32 || !dc_isar_feature(aa64_dp, s)) {
@@ -12127,6 +12104,8 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x18: /* FMLAL2 */
case 0x19: /* FMULX */
case 0x1c: /* FMLSL2 */
+ case 0x1d: /* SQRDMLAH */
+ case 0x1f: /* SQRDMLSH */
unallocated_encoding(s);
return;
}
@@ -12320,33 +12299,13 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
tcg_op, tcg_idx);
}
break;
- case 0x1d: /* SQRDMLAH */
- read_vec_element_i32(s, tcg_res, rd, pass,
- is_scalar ? size : MO_32);
- if (size == 1) {
- gen_helper_neon_qrdmlah_s16(tcg_res, tcg_env,
- tcg_op, tcg_idx, tcg_res);
- } else {
- gen_helper_neon_qrdmlah_s32(tcg_res, tcg_env,
- tcg_op, tcg_idx, tcg_res);
- }
- break;
- case 0x1f: /* SQRDMLSH */
- read_vec_element_i32(s, tcg_res, rd, pass,
- is_scalar ? size : MO_32);
- if (size == 1) {
- gen_helper_neon_qrdmlsh_s16(tcg_res, tcg_env,
- tcg_op, tcg_idx, tcg_res);
- } else {
- gen_helper_neon_qrdmlsh_s32(tcg_res, tcg_env,
- tcg_op, tcg_idx, tcg_res);
- }
- break;
default:
case 0x01: /* FMLA */
case 0x05: /* FMLS */
case 0x09: /* FMUL */
case 0x19: /* FMULX */
+ case 0x1d: /* SQRDMLAH */
+ case 0x1f: /* SQRDMLSH */
g_assert_not_reached();
}
@@ -12538,7 +12497,6 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0x0e000000, 0xbf208c00, disas_simd_tb },
{ 0x0e000800, 0xbf208c00, disas_simd_zip_trn },
{ 0x2e000000, 0xbf208400, disas_simd_ext },
- { 0x5e008400, 0xdf208400, disas_simd_scalar_three_reg_same_extra },
{ 0x5e200000, 0xdf200c00, disas_simd_scalar_three_reg_diff },
{ 0x5e200800, 0xdf3e0c00, disas_simd_scalar_two_reg_misc },
{ 0x5f000000, 0xdf000400, disas_simd_indexed }, /* scalar indexed */
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index d477479bb19..98604d170fd 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -347,6 +347,42 @@ void HELPER(neon_sqrdmulh_idx_h)(void *vd, void *vn, void *vm,
clear_tail(d, opr_sz, simd_maxsz(desc));
}
+void HELPER(neon_sqrdmlah_idx_h)(void *vd, void *vn, void *vm,
+ void *vq, uint32_t desc)
+{
+ intptr_t i, j, opr_sz = simd_oprsz(desc);
+ int idx = simd_data(desc);
+ int16_t *d = vd, *n = vn, *m = (int16_t *)vm + H2(idx);
+ intptr_t elements = opr_sz / 2;
+ intptr_t eltspersegment = MIN(16 / 2, elements);
+
+ for (i = 0; i < elements; i += 16 / 2) {
+ int16_t mm = m[i];
+ for (j = 0; j < eltspersegment; ++j) {
+ d[i + j] = do_sqrdmlah_h(n[i + j], mm, d[i + j], false, true, vq);
+ }
+ }
+ clear_tail(d, opr_sz, simd_maxsz(desc));
+}
+
+void HELPER(neon_sqrdmlsh_idx_h)(void *vd, void *vn, void *vm,
+ void *vq, uint32_t desc)
+{
+ intptr_t i, j, opr_sz = simd_oprsz(desc);
+ int idx = simd_data(desc);
+ int16_t *d = vd, *n = vn, *m = (int16_t *)vm + H2(idx);
+ intptr_t elements = opr_sz / 2;
+ intptr_t eltspersegment = MIN(16 / 2, elements);
+
+ for (i = 0; i < elements; i += 16 / 2) {
+ int16_t mm = m[i];
+ for (j = 0; j < eltspersegment; ++j) {
+ d[i + j] = do_sqrdmlah_h(n[i + j], mm, d[i + j], true, true, vq);
+ }
+ }
+ clear_tail(d, opr_sz, simd_maxsz(desc));
+}
+
void HELPER(sve2_sqrdmlah_h)(void *vd, void *vn, void *vm,
void *va, uint32_t desc)
{
@@ -546,6 +582,42 @@ void HELPER(neon_sqrdmulh_idx_s)(void *vd, void *vn, void *vm,
clear_tail(d, opr_sz, simd_maxsz(desc));
}
+void HELPER(neon_sqrdmlah_idx_s)(void *vd, void *vn, void *vm,
+ void *vq, uint32_t desc)
+{
+ intptr_t i, j, opr_sz = simd_oprsz(desc);
+ int idx = simd_data(desc);
+ int32_t *d = vd, *n = vn, *m = (int32_t *)vm + H4(idx);
+ intptr_t elements = opr_sz / 4;
+ intptr_t eltspersegment = MIN(16 / 4, elements);
+
+ for (i = 0; i < elements; i += 16 / 4) {
+ int32_t mm = m[i];
+ for (j = 0; j < eltspersegment; ++j) {
+ d[i + j] = do_sqrdmlah_s(n[i + j], mm, d[i + j], false, true, vq);
+ }
+ }
+ clear_tail(d, opr_sz, simd_maxsz(desc));
+}
+
+void HELPER(neon_sqrdmlsh_idx_s)(void *vd, void *vn, void *vm,
+ void *vq, uint32_t desc)
+{
+ intptr_t i, j, opr_sz = simd_oprsz(desc);
+ int idx = simd_data(desc);
+ int32_t *d = vd, *n = vn, *m = (int32_t *)vm + H4(idx);
+ intptr_t elements = opr_sz / 4;
+ intptr_t eltspersegment = MIN(16 / 4, elements);
+
+ for (i = 0; i < elements; i += 16 / 4) {
+ int32_t mm = m[i];
+ for (j = 0; j < eltspersegment; ++j) {
+ d[i + j] = do_sqrdmlah_s(n[i + j], mm, d[i + j], true, true, vq);
+ }
+ }
+ clear_tail(d, opr_sz, simd_maxsz(desc));
+}
+
void HELPER(sve2_sqrdmlah_s)(void *vd, void *vn, void *vm,
void *va, uint32_t desc)
{
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 11/29] target/arm: Convert SDOT, UDOT to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (9 preceding siblings ...)
2024-07-01 16:07 ` [PULL 10/29] target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 12/29] target/arm: Convert SUDOT, USDOT " Peter Maydell
` (18 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 7 +++++
target/arm/tcg/translate-a64.c | 54 ++++++++++++++++++----------------
2 files changed, 35 insertions(+), 26 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 613cc9365cf..7411d4ba979 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -61,6 +61,7 @@
@qrrr_b . q:1 ...... ... rm:5 ...... rn:5 rd:5 &qrrr_e esz=0
@qrrr_h . q:1 ...... ... rm:5 ...... rn:5 rd:5 &qrrr_e esz=1
+@qrrr_s . q:1 ...... ... rm:5 ...... rn:5 rd:5 &qrrr_e esz=2
@qrrr_sd . q:1 ...... ... rm:5 ...... rn:5 rd:5 &qrrr_e esz=%esz_sd
@qrrr_e . q:1 ...... esz:2 . rm:5 ...... rn:5 rd:5 &qrrr_e
@qr2r_e . q:1 ...... esz:2 . ..... ...... rm:5 rd:5 &qrrr_e rn=%rd
@@ -946,6 +947,9 @@ SQRDMULH_v 0.10 1110 ..1 ..... 10110 1 ..... ..... @qrrr_e
SQRDMLAH_v 0.10 1110 ..0 ..... 10000 1 ..... ..... @qrrr_e
SQRDMLSH_v 0.10 1110 ..0 ..... 10001 1 ..... ..... @qrrr_e
+SDOT_v 0.00 1110 100 ..... 10010 1 ..... ..... @qrrr_s
+UDOT_v 0.10 1110 100 ..... 10010 1 ..... ..... @qrrr_s
+
### Advanced SIMD scalar x indexed element
FMUL_si 0101 1111 00 .. .... 1001 . 0 ..... ..... @rrx_h
@@ -1020,6 +1024,9 @@ SQRDMLAH_vi 0.10 1111 10 .. .... 1101 . 0 ..... ..... @qrrx_s
SQRDMLSH_vi 0.10 1111 01 .. .... 1111 . 0 ..... ..... @qrrx_h
SQRDMLSH_vi 0.10 1111 10 .. .... 1111 . 0 ..... ..... @qrrx_s
+SDOT_vi 0.00 1111 10 .. .... 1110 . 0 ..... ..... @qrrx_s
+UDOT_vi 0.10 1111 10 .. .... 1110 . 0 ..... ..... @qrrx_s
+
# Floating-point conditional select
FCSEL 0001 1110 .. 1 rm:5 cond:4 11 rn:5 rd:5 esz=%esz_hsd
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 32c24c74220..f2e7d8d75c6 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5592,6 +5592,18 @@ TRANS(SQRDMULH_v, do_gvec_fn3_no8_no64, a, gen_gvec_sqrdmulh_qc)
TRANS_FEAT(SQRDMLAH_v, aa64_rdm, do_gvec_fn3_no8_no64, a, gen_gvec_sqrdmlah_qc)
TRANS_FEAT(SQRDMLSH_v, aa64_rdm, do_gvec_fn3_no8_no64, a, gen_gvec_sqrdmlsh_qc)
+static bool do_dot_vector(DisasContext *s, arg_qrrr_e *a,
+ gen_helper_gvec_4 *fn)
+{
+ if (fp_access_check(s)) {
+ gen_gvec_op4_ool(s, a->q, a->rd, a->rn, a->rm, a->rd, 0, fn);
+ }
+ return true;
+}
+
+TRANS_FEAT(SDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_sdot_b)
+TRANS_FEAT(UDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_udot_b)
+
/*
* Advanced SIMD scalar/vector x indexed element
*/
@@ -5914,6 +5926,18 @@ static gen_helper_gvec_4 * const f_vector_idx_sqrdmlsh[2] = {
TRANS_FEAT(SQRDMLSH_vi, aa64_rdm, do_int3_qc_vector_idx, a,
f_vector_idx_sqrdmlsh)
+static bool do_dot_vector_idx(DisasContext *s, arg_qrrx_e *a,
+ gen_helper_gvec_4 *fn)
+{
+ if (fp_access_check(s)) {
+ gen_gvec_op4_ool(s, a->q, a->rd, a->rn, a->rm, a->rd, a->idx, fn);
+ }
+ return true;
+}
+
+TRANS_FEAT(SDOT_vi, aa64_dp, do_dot_vector_idx, a, gen_helper_gvec_sdot_idx_b)
+TRANS_FEAT(UDOT_vi, aa64_dp, do_dot_vector_idx, a, gen_helper_gvec_udot_idx_b)
+
/*
* Advanced SIMD scalar pairwise
*/
@@ -10890,14 +10914,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
int rot;
switch (u * 16 + opcode) {
- case 0x02: /* SDOT (vector) */
- case 0x12: /* UDOT (vector) */
- if (size != MO_32) {
- unallocated_encoding(s);
- return;
- }
- feature = dc_isar_feature(aa64_dp, s);
- break;
case 0x03: /* USDOT */
if (size != MO_32) {
unallocated_encoding(s);
@@ -10947,8 +10963,10 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
break;
default:
+ case 0x02: /* SDOT (vector) */
case 0x10: /* SQRDMLAH (vector) */
case 0x11: /* SQRDMLSH (vector) */
+ case 0x12: /* UDOT (vector) */
unallocated_encoding(s);
return;
}
@@ -10961,11 +10979,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
switch (opcode) {
- case 0x2: /* SDOT / UDOT */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, 0,
- u ? gen_helper_gvec_udot_b : gen_helper_gvec_sdot_b);
- return;
-
case 0x3: /* USDOT */
gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, 0, gen_helper_gvec_usdot_b);
return;
@@ -12043,13 +12056,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x0b: /* SQDMULL, SQDMULL2 */
is_long = true;
break;
- case 0x0e: /* SDOT */
- case 0x1e: /* UDOT */
- if (is_scalar || size != MO_32 || !dc_isar_feature(aa64_dp, s)) {
- unallocated_encoding(s);
- return;
- }
- break;
case 0x0f:
switch (size) {
case 0: /* SUDOT */
@@ -12099,12 +12105,14 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x09: /* FMUL */
case 0x0c: /* SQDMULH */
case 0x0d: /* SQRDMULH */
+ case 0x0e: /* SDOT */
case 0x10: /* MLA */
case 0x14: /* MLS */
case 0x18: /* FMLAL2 */
case 0x19: /* FMULX */
case 0x1c: /* FMLSL2 */
case 0x1d: /* SQRDMLAH */
+ case 0x1e: /* UDOT */
case 0x1f: /* SQRDMLSH */
unallocated_encoding(s);
return;
@@ -12180,12 +12188,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
}
switch (16 * u + opcode) {
- case 0x0e: /* SDOT */
- case 0x1e: /* UDOT */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, index,
- u ? gen_helper_gvec_udot_idx_b
- : gen_helper_gvec_sdot_idx_b);
- return;
case 0x0f:
switch (extract32(insn, 22, 2)) {
case 0: /* SUDOT */
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 12/29] target/arm: Convert SUDOT, USDOT to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (10 preceding siblings ...)
2024-07-01 16:07 ` [PULL 11/29] target/arm: Convert SDOT, UDOT " Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 13/29] target/arm: Convert BFDOT " Peter Maydell
` (17 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 3 +++
target/arm/tcg/translate-a64.c | 35 ++++++++--------------------------
2 files changed, 11 insertions(+), 27 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 7411d4ba979..8a0251f83cf 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -949,6 +949,7 @@ SQRDMLSH_v 0.10 1110 ..0 ..... 10001 1 ..... ..... @qrrr_e
SDOT_v 0.00 1110 100 ..... 10010 1 ..... ..... @qrrr_s
UDOT_v 0.10 1110 100 ..... 10010 1 ..... ..... @qrrr_s
+USDOT_v 0.00 1110 100 ..... 10011 1 ..... ..... @qrrr_s
### Advanced SIMD scalar x indexed element
@@ -1026,6 +1027,8 @@ SQRDMLSH_vi 0.10 1111 10 .. .... 1111 . 0 ..... ..... @qrrx_s
SDOT_vi 0.00 1111 10 .. .... 1110 . 0 ..... ..... @qrrx_s
UDOT_vi 0.10 1111 10 .. .... 1110 . 0 ..... ..... @qrrx_s
+SUDOT_vi 0.00 1111 00 .. .... 1111 . 0 ..... ..... @qrrx_s
+USDOT_vi 0.00 1111 10 .. .... 1111 . 0 ..... ..... @qrrx_s
# Floating-point conditional select
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index f2e7d8d75c6..9a658ca8769 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5603,6 +5603,7 @@ static bool do_dot_vector(DisasContext *s, arg_qrrr_e *a,
TRANS_FEAT(SDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_sdot_b)
TRANS_FEAT(UDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_udot_b)
+TRANS_FEAT(USDOT_v, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_usdot_b)
/*
* Advanced SIMD scalar/vector x indexed element
@@ -5937,6 +5938,10 @@ static bool do_dot_vector_idx(DisasContext *s, arg_qrrx_e *a,
TRANS_FEAT(SDOT_vi, aa64_dp, do_dot_vector_idx, a, gen_helper_gvec_sdot_idx_b)
TRANS_FEAT(UDOT_vi, aa64_dp, do_dot_vector_idx, a, gen_helper_gvec_udot_idx_b)
+TRANS_FEAT(SUDOT_vi, aa64_i8mm, do_dot_vector_idx, a,
+ gen_helper_gvec_sudot_idx_b)
+TRANS_FEAT(USDOT_vi, aa64_i8mm, do_dot_vector_idx, a,
+ gen_helper_gvec_usdot_idx_b)
/*
* Advanced SIMD scalar pairwise
@@ -10914,13 +10919,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
int rot;
switch (u * 16 + opcode) {
- case 0x03: /* USDOT */
- if (size != MO_32) {
- unallocated_encoding(s);
- return;
- }
- feature = dc_isar_feature(aa64_i8mm, s);
- break;
case 0x04: /* SMMLA */
case 0x14: /* UMMLA */
case 0x05: /* USMMLA */
@@ -10964,6 +10962,7 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
break;
default:
case 0x02: /* SDOT (vector) */
+ case 0x03: /* USDOT */
case 0x10: /* SQRDMLAH (vector) */
case 0x11: /* SQRDMLSH (vector) */
case 0x12: /* UDOT (vector) */
@@ -10979,10 +10978,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
switch (opcode) {
- case 0x3: /* USDOT */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, 0, gen_helper_gvec_usdot_b);
- return;
-
case 0x04: /* SMMLA, UMMLA */
gen_gvec_op4_ool(s, 1, rd, rn, rm, rd, 0,
u ? gen_helper_gvec_ummla_b
@@ -12058,14 +12053,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
break;
case 0x0f:
switch (size) {
- case 0: /* SUDOT */
- case 2: /* USDOT */
- if (is_scalar || !dc_isar_feature(aa64_i8mm, s)) {
- unallocated_encoding(s);
- return;
- }
- size = MO_32;
- break;
case 1: /* BFDOT */
if (is_scalar || !dc_isar_feature(aa64_bf16, s)) {
unallocated_encoding(s);
@@ -12082,6 +12069,8 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
size = MO_16;
break;
default:
+ case 0: /* SUDOT */
+ case 2: /* USDOT */
unallocated_encoding(s);
return;
}
@@ -12190,18 +12179,10 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
switch (16 * u + opcode) {
case 0x0f:
switch (extract32(insn, 22, 2)) {
- case 0: /* SUDOT */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, index,
- gen_helper_gvec_sudot_idx_b);
- return;
case 1: /* BFDOT */
gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, index,
gen_helper_gvec_bfdot_idx);
return;
- case 2: /* USDOT */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, index,
- gen_helper_gvec_usdot_idx_b);
- return;
case 3: /* BFMLAL{B,T} */
gen_gvec_op4_fpst(s, 1, rd, rn, rm, rd, 0, (index << 1) | is_q,
gen_helper_gvec_bfmlal_idx);
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 13/29] target/arm: Convert BFDOT to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (11 preceding siblings ...)
2024-07-01 16:07 ` [PULL 12/29] target/arm: Convert SUDOT, USDOT " Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 14/29] target/arm: Convert BFMLALB, BFMLALT " Peter Maydell
` (16 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 2 ++
target/arm/tcg/translate-a64.c | 20 +++++---------------
2 files changed, 7 insertions(+), 15 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 8a0251f83cf..6819fd25873 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -950,6 +950,7 @@ SQRDMLSH_v 0.10 1110 ..0 ..... 10001 1 ..... ..... @qrrr_e
SDOT_v 0.00 1110 100 ..... 10010 1 ..... ..... @qrrr_s
UDOT_v 0.10 1110 100 ..... 10010 1 ..... ..... @qrrr_s
USDOT_v 0.00 1110 100 ..... 10011 1 ..... ..... @qrrr_s
+BFDOT_v 0.10 1110 010 ..... 11111 1 ..... ..... @qrrr_s
### Advanced SIMD scalar x indexed element
@@ -1029,6 +1030,7 @@ SDOT_vi 0.00 1111 10 .. .... 1110 . 0 ..... ..... @qrrx_s
UDOT_vi 0.10 1111 10 .. .... 1110 . 0 ..... ..... @qrrx_s
SUDOT_vi 0.00 1111 00 .. .... 1111 . 0 ..... ..... @qrrx_s
USDOT_vi 0.00 1111 10 .. .... 1111 . 0 ..... ..... @qrrx_s
+BFDOT_vi 0.00 1111 01 .. .... 1111 . 0 ..... ..... @qrrx_s
# Floating-point conditional select
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 9a658ca8769..0f44cd5aee5 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5604,6 +5604,7 @@ static bool do_dot_vector(DisasContext *s, arg_qrrr_e *a,
TRANS_FEAT(SDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_sdot_b)
TRANS_FEAT(UDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_udot_b)
TRANS_FEAT(USDOT_v, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_usdot_b)
+TRANS_FEAT(BFDOT_v, aa64_bf16, do_dot_vector, a, gen_helper_gvec_bfdot)
/*
* Advanced SIMD scalar/vector x indexed element
@@ -5942,6 +5943,8 @@ TRANS_FEAT(SUDOT_vi, aa64_i8mm, do_dot_vector_idx, a,
gen_helper_gvec_sudot_idx_b)
TRANS_FEAT(USDOT_vi, aa64_i8mm, do_dot_vector_idx, a,
gen_helper_gvec_usdot_idx_b)
+TRANS_FEAT(BFDOT_vi, aa64_bf16, do_dot_vector_idx, a,
+ gen_helper_gvec_bfdot_idx)
/*
* Advanced SIMD scalar pairwise
@@ -10951,11 +10954,11 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
break;
case 0x1f:
switch (size) {
- case 1: /* BFDOT */
case 3: /* BFMLAL{B,T} */
feature = dc_isar_feature(aa64_bf16, s);
break;
default:
+ case 1: /* BFDOT */
unallocated_encoding(s);
return;
}
@@ -11036,9 +11039,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
return;
case 0xf:
switch (size) {
- case 1: /* BFDOT */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, 0, gen_helper_gvec_bfdot);
- break;
case 3: /* BFMLAL{B,T} */
gen_gvec_op4_fpst(s, 1, rd, rn, rm, rd, false, is_q,
gen_helper_gvec_bfmlal);
@@ -12053,13 +12053,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
break;
case 0x0f:
switch (size) {
- case 1: /* BFDOT */
- if (is_scalar || !dc_isar_feature(aa64_bf16, s)) {
- unallocated_encoding(s);
- return;
- }
- size = MO_32;
- break;
case 3: /* BFMLAL{B,T} */
if (is_scalar || !dc_isar_feature(aa64_bf16, s)) {
unallocated_encoding(s);
@@ -12070,6 +12063,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
break;
default:
case 0: /* SUDOT */
+ case 1: /* BFDOT */
case 2: /* USDOT */
unallocated_encoding(s);
return;
@@ -12179,10 +12173,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
switch (16 * u + opcode) {
case 0x0f:
switch (extract32(insn, 22, 2)) {
- case 1: /* BFDOT */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, index,
- gen_helper_gvec_bfdot_idx);
- return;
case 3: /* BFMLAL{B,T} */
gen_gvec_op4_fpst(s, 1, rd, rn, rm, rd, 0, (index << 1) | is_q,
gen_helper_gvec_bfmlal_idx);
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 14/29] target/arm: Convert BFMLALB, BFMLALT to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (12 preceding siblings ...)
2024-07-01 16:07 ` [PULL 13/29] target/arm: Convert BFDOT " Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 15/29] target/arm: Convert BFMMLA, SMMLA, UMMLA, USMMLA " Peter Maydell
` (15 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 2 +
target/arm/tcg/translate-a64.c | 77 +++++++++++++---------------------
2 files changed, 31 insertions(+), 48 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 6819fd25873..15344a73de4 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -951,6 +951,7 @@ SDOT_v 0.00 1110 100 ..... 10010 1 ..... ..... @qrrr_s
UDOT_v 0.10 1110 100 ..... 10010 1 ..... ..... @qrrr_s
USDOT_v 0.00 1110 100 ..... 10011 1 ..... ..... @qrrr_s
BFDOT_v 0.10 1110 010 ..... 11111 1 ..... ..... @qrrr_s
+BFMLAL_v 0.10 1110 110 ..... 11111 1 ..... ..... @qrrr_h
### Advanced SIMD scalar x indexed element
@@ -1031,6 +1032,7 @@ UDOT_vi 0.10 1111 10 .. .... 1110 . 0 ..... ..... @qrrx_s
SUDOT_vi 0.00 1111 00 .. .... 1111 . 0 ..... ..... @qrrx_s
USDOT_vi 0.00 1111 10 .. .... 1111 . 0 ..... ..... @qrrx_s
BFDOT_vi 0.00 1111 01 .. .... 1111 . 0 ..... ..... @qrrx_s
+BFMLAL_vi 0.00 1111 11 .. .... 1111 . 0 ..... ..... @qrrx_h
# Floating-point conditional select
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 0f44cd5aee5..95be862dde4 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5606,6 +5606,19 @@ TRANS_FEAT(UDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_udot_b)
TRANS_FEAT(USDOT_v, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_usdot_b)
TRANS_FEAT(BFDOT_v, aa64_bf16, do_dot_vector, a, gen_helper_gvec_bfdot)
+static bool trans_BFMLAL_v(DisasContext *s, arg_qrrr_e *a)
+{
+ if (!dc_isar_feature(aa64_bf16, s)) {
+ return false;
+ }
+ if (fp_access_check(s)) {
+ /* Q bit selects BFMLALB vs BFMLALT. */
+ gen_gvec_op4_fpst(s, true, a->rd, a->rn, a->rm, a->rd, false, a->q,
+ gen_helper_gvec_bfmlal);
+ }
+ return true;
+}
+
/*
* Advanced SIMD scalar/vector x indexed element
*/
@@ -5946,6 +5959,20 @@ TRANS_FEAT(USDOT_vi, aa64_i8mm, do_dot_vector_idx, a,
TRANS_FEAT(BFDOT_vi, aa64_bf16, do_dot_vector_idx, a,
gen_helper_gvec_bfdot_idx)
+static bool trans_BFMLAL_vi(DisasContext *s, arg_qrrx_e *a)
+{
+ if (!dc_isar_feature(aa64_bf16, s)) {
+ return false;
+ }
+ if (fp_access_check(s)) {
+ /* Q bit selects BFMLALB vs BFMLALT. */
+ gen_gvec_op4_fpst(s, true, a->rd, a->rn, a->rm, a->rd, 0,
+ (a->idx << 1) | a->q,
+ gen_helper_gvec_bfmlal_idx);
+ }
+ return true;
+}
+
/*
* Advanced SIMD scalar pairwise
*/
@@ -10952,23 +10979,13 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
feature = dc_isar_feature(aa64_bf16, s);
break;
- case 0x1f:
- switch (size) {
- case 3: /* BFMLAL{B,T} */
- feature = dc_isar_feature(aa64_bf16, s);
- break;
- default:
- case 1: /* BFDOT */
- unallocated_encoding(s);
- return;
- }
- break;
default:
case 0x02: /* SDOT (vector) */
case 0x03: /* USDOT */
case 0x10: /* SQRDMLAH (vector) */
case 0x11: /* SQRDMLSH (vector) */
case 0x12: /* UDOT (vector) */
+ case 0x1f: /* BFDOT / BFMLAL */
unallocated_encoding(s);
return;
}
@@ -11037,17 +11054,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
case 0xd: /* BFMMLA */
gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, 0, gen_helper_gvec_bfmmla);
return;
- case 0xf:
- switch (size) {
- case 3: /* BFMLAL{B,T} */
- gen_gvec_op4_fpst(s, 1, rd, rn, rm, rd, false, is_q,
- gen_helper_gvec_bfmlal);
- break;
- default:
- g_assert_not_reached();
- }
- return;
-
default:
g_assert_not_reached();
}
@@ -12051,24 +12057,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x0b: /* SQDMULL, SQDMULL2 */
is_long = true;
break;
- case 0x0f:
- switch (size) {
- case 3: /* BFMLAL{B,T} */
- if (is_scalar || !dc_isar_feature(aa64_bf16, s)) {
- unallocated_encoding(s);
- return;
- }
- /* can't set is_fp without other incorrect size checks */
- size = MO_16;
- break;
- default:
- case 0: /* SUDOT */
- case 1: /* BFDOT */
- case 2: /* USDOT */
- unallocated_encoding(s);
- return;
- }
- break;
case 0x11: /* FCMLA #0 */
case 0x13: /* FCMLA #90 */
case 0x15: /* FCMLA #180 */
@@ -12089,6 +12077,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x0c: /* SQDMULH */
case 0x0d: /* SQRDMULH */
case 0x0e: /* SDOT */
+ case 0x0f: /* SUDOT / BFDOT / USDOT / BFMLAL */
case 0x10: /* MLA */
case 0x14: /* MLS */
case 0x18: /* FMLAL2 */
@@ -12171,14 +12160,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
}
switch (16 * u + opcode) {
- case 0x0f:
- switch (extract32(insn, 22, 2)) {
- case 3: /* BFMLAL{B,T} */
- gen_gvec_op4_fpst(s, 1, rd, rn, rm, rd, 0, (index << 1) | is_q,
- gen_helper_gvec_bfmlal_idx);
- return;
- }
- g_assert_not_reached();
case 0x11: /* FCMLA #0 */
case 0x13: /* FCMLA #90 */
case 0x15: /* FCMLA #180 */
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 15/29] target/arm: Convert BFMMLA, SMMLA, UMMLA, USMMLA to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (13 preceding siblings ...)
2024-07-01 16:07 ` [PULL 14/29] target/arm: Convert BFMLALB, BFMLALT " Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 16/29] target/arm: Add data argument to do_fp3_vector Peter Maydell
` (14 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 4 ++++
target/arm/tcg/translate-a64.c | 36 ++++++++--------------------------
2 files changed, 12 insertions(+), 28 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 15344a73de4..b2c7e36969e 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -952,6 +952,10 @@ UDOT_v 0.10 1110 100 ..... 10010 1 ..... ..... @qrrr_s
USDOT_v 0.00 1110 100 ..... 10011 1 ..... ..... @qrrr_s
BFDOT_v 0.10 1110 010 ..... 11111 1 ..... ..... @qrrr_s
BFMLAL_v 0.10 1110 110 ..... 11111 1 ..... ..... @qrrr_h
+BFMMLA 0110 1110 010 ..... 11101 1 ..... ..... @rrr_q1e0
+SMMLA 0100 1110 100 ..... 10100 1 ..... ..... @rrr_q1e0
+UMMLA 0110 1110 100 ..... 10100 1 ..... ..... @rrr_q1e0
+USMMLA 0100 1110 100 ..... 10101 1 ..... ..... @rrr_q1e0
### Advanced SIMD scalar x indexed element
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 95be862dde4..2697c4b305b 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5605,6 +5605,10 @@ TRANS_FEAT(SDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_sdot_b)
TRANS_FEAT(UDOT_v, aa64_dp, do_dot_vector, a, gen_helper_gvec_udot_b)
TRANS_FEAT(USDOT_v, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_usdot_b)
TRANS_FEAT(BFDOT_v, aa64_bf16, do_dot_vector, a, gen_helper_gvec_bfdot)
+TRANS_FEAT(BFMMLA, aa64_bf16, do_dot_vector, a, gen_helper_gvec_bfmmla)
+TRANS_FEAT(SMMLA, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_smmla_b)
+TRANS_FEAT(UMMLA, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_ummla_b)
+TRANS_FEAT(USMMLA, aa64_i8mm, do_dot_vector, a, gen_helper_gvec_usmmla_b)
static bool trans_BFMLAL_v(DisasContext *s, arg_qrrr_e *a)
{
@@ -10949,15 +10953,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
int rot;
switch (u * 16 + opcode) {
- case 0x04: /* SMMLA */
- case 0x14: /* UMMLA */
- case 0x05: /* USMMLA */
- if (!is_q || size != MO_32) {
- unallocated_encoding(s);
- return;
- }
- feature = dc_isar_feature(aa64_i8mm, s);
- break;
case 0x18: /* FCMLA, #0 */
case 0x19: /* FCMLA, #90 */
case 0x1a: /* FCMLA, #180 */
@@ -10972,19 +10967,16 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
feature = dc_isar_feature(aa64_fcma, s);
break;
- case 0x1d: /* BFMMLA */
- if (size != MO_16 || !is_q) {
- unallocated_encoding(s);
- return;
- }
- feature = dc_isar_feature(aa64_bf16, s);
- break;
default:
case 0x02: /* SDOT (vector) */
case 0x03: /* USDOT */
+ case 0x04: /* SMMLA */
+ case 0x05: /* USMMLA */
case 0x10: /* SQRDMLAH (vector) */
case 0x11: /* SQRDMLSH (vector) */
case 0x12: /* UDOT (vector) */
+ case 0x14: /* UMMLA */
+ case 0x1d: /* BFMMLA */
case 0x1f: /* BFDOT / BFMLAL */
unallocated_encoding(s);
return;
@@ -10998,15 +10990,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
switch (opcode) {
- case 0x04: /* SMMLA, UMMLA */
- gen_gvec_op4_ool(s, 1, rd, rn, rm, rd, 0,
- u ? gen_helper_gvec_ummla_b
- : gen_helper_gvec_smmla_b);
- return;
- case 0x05: /* USMMLA */
- gen_gvec_op4_ool(s, 1, rd, rn, rm, rd, 0, gen_helper_gvec_usmmla_b);
- return;
-
case 0x8: /* FCMLA, #0 */
case 0x9: /* FCMLA, #90 */
case 0xa: /* FCMLA, #180 */
@@ -11051,9 +11034,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
return;
- case 0xd: /* BFMMLA */
- gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, 0, gen_helper_gvec_bfmmla);
- return;
default:
g_assert_not_reached();
}
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 16/29] target/arm: Add data argument to do_fp3_vector
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (14 preceding siblings ...)
2024-07-01 16:07 ` [PULL 15/29] target/arm: Convert BFMMLA, SMMLA, UMMLA, USMMLA " Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 17/29] target/arm: Convert FCADD to decodetree Peter Maydell
` (13 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/translate-a64.c | 52 +++++++++++++++++-----------------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 2697c4b305b..57cdde008ef 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5290,7 +5290,7 @@ TRANS(CMHS_s, do_cmop_d, a, TCG_COND_GEU)
TRANS(CMEQ_s, do_cmop_d, a, TCG_COND_EQ)
TRANS(CMTST_s, do_cmop_d, a, TCG_COND_TSTNE)
-static bool do_fp3_vector(DisasContext *s, arg_qrrr_e *a,
+static bool do_fp3_vector(DisasContext *s, arg_qrrr_e *a, int data,
gen_helper_gvec_3_ptr * const fns[3])
{
MemOp esz = a->esz;
@@ -5313,7 +5313,7 @@ static bool do_fp3_vector(DisasContext *s, arg_qrrr_e *a,
}
if (fp_access_check(s)) {
gen_gvec_op3_fpst(s, a->q, a->rd, a->rn, a->rm,
- esz == MO_16, 0, fns[esz - 1]);
+ esz == MO_16, data, fns[esz - 1]);
}
return true;
}
@@ -5323,168 +5323,168 @@ static gen_helper_gvec_3_ptr * const f_vector_fadd[3] = {
gen_helper_gvec_fadd_s,
gen_helper_gvec_fadd_d,
};
-TRANS(FADD_v, do_fp3_vector, a, f_vector_fadd)
+TRANS(FADD_v, do_fp3_vector, a, 0, f_vector_fadd)
static gen_helper_gvec_3_ptr * const f_vector_fsub[3] = {
gen_helper_gvec_fsub_h,
gen_helper_gvec_fsub_s,
gen_helper_gvec_fsub_d,
};
-TRANS(FSUB_v, do_fp3_vector, a, f_vector_fsub)
+TRANS(FSUB_v, do_fp3_vector, a, 0, f_vector_fsub)
static gen_helper_gvec_3_ptr * const f_vector_fdiv[3] = {
gen_helper_gvec_fdiv_h,
gen_helper_gvec_fdiv_s,
gen_helper_gvec_fdiv_d,
};
-TRANS(FDIV_v, do_fp3_vector, a, f_vector_fdiv)
+TRANS(FDIV_v, do_fp3_vector, a, 0, f_vector_fdiv)
static gen_helper_gvec_3_ptr * const f_vector_fmul[3] = {
gen_helper_gvec_fmul_h,
gen_helper_gvec_fmul_s,
gen_helper_gvec_fmul_d,
};
-TRANS(FMUL_v, do_fp3_vector, a, f_vector_fmul)
+TRANS(FMUL_v, do_fp3_vector, a, 0, f_vector_fmul)
static gen_helper_gvec_3_ptr * const f_vector_fmax[3] = {
gen_helper_gvec_fmax_h,
gen_helper_gvec_fmax_s,
gen_helper_gvec_fmax_d,
};
-TRANS(FMAX_v, do_fp3_vector, a, f_vector_fmax)
+TRANS(FMAX_v, do_fp3_vector, a, 0, f_vector_fmax)
static gen_helper_gvec_3_ptr * const f_vector_fmin[3] = {
gen_helper_gvec_fmin_h,
gen_helper_gvec_fmin_s,
gen_helper_gvec_fmin_d,
};
-TRANS(FMIN_v, do_fp3_vector, a, f_vector_fmin)
+TRANS(FMIN_v, do_fp3_vector, a, 0, f_vector_fmin)
static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[3] = {
gen_helper_gvec_fmaxnum_h,
gen_helper_gvec_fmaxnum_s,
gen_helper_gvec_fmaxnum_d,
};
-TRANS(FMAXNM_v, do_fp3_vector, a, f_vector_fmaxnm)
+TRANS(FMAXNM_v, do_fp3_vector, a, 0, f_vector_fmaxnm)
static gen_helper_gvec_3_ptr * const f_vector_fminnm[3] = {
gen_helper_gvec_fminnum_h,
gen_helper_gvec_fminnum_s,
gen_helper_gvec_fminnum_d,
};
-TRANS(FMINNM_v, do_fp3_vector, a, f_vector_fminnm)
+TRANS(FMINNM_v, do_fp3_vector, a, 0, f_vector_fminnm)
static gen_helper_gvec_3_ptr * const f_vector_fmulx[3] = {
gen_helper_gvec_fmulx_h,
gen_helper_gvec_fmulx_s,
gen_helper_gvec_fmulx_d,
};
-TRANS(FMULX_v, do_fp3_vector, a, f_vector_fmulx)
+TRANS(FMULX_v, do_fp3_vector, a, 0, f_vector_fmulx)
static gen_helper_gvec_3_ptr * const f_vector_fmla[3] = {
gen_helper_gvec_vfma_h,
gen_helper_gvec_vfma_s,
gen_helper_gvec_vfma_d,
};
-TRANS(FMLA_v, do_fp3_vector, a, f_vector_fmla)
+TRANS(FMLA_v, do_fp3_vector, a, 0, f_vector_fmla)
static gen_helper_gvec_3_ptr * const f_vector_fmls[3] = {
gen_helper_gvec_vfms_h,
gen_helper_gvec_vfms_s,
gen_helper_gvec_vfms_d,
};
-TRANS(FMLS_v, do_fp3_vector, a, f_vector_fmls)
+TRANS(FMLS_v, do_fp3_vector, a, 0, f_vector_fmls)
static gen_helper_gvec_3_ptr * const f_vector_fcmeq[3] = {
gen_helper_gvec_fceq_h,
gen_helper_gvec_fceq_s,
gen_helper_gvec_fceq_d,
};
-TRANS(FCMEQ_v, do_fp3_vector, a, f_vector_fcmeq)
+TRANS(FCMEQ_v, do_fp3_vector, a, 0, f_vector_fcmeq)
static gen_helper_gvec_3_ptr * const f_vector_fcmge[3] = {
gen_helper_gvec_fcge_h,
gen_helper_gvec_fcge_s,
gen_helper_gvec_fcge_d,
};
-TRANS(FCMGE_v, do_fp3_vector, a, f_vector_fcmge)
+TRANS(FCMGE_v, do_fp3_vector, a, 0, f_vector_fcmge)
static gen_helper_gvec_3_ptr * const f_vector_fcmgt[3] = {
gen_helper_gvec_fcgt_h,
gen_helper_gvec_fcgt_s,
gen_helper_gvec_fcgt_d,
};
-TRANS(FCMGT_v, do_fp3_vector, a, f_vector_fcmgt)
+TRANS(FCMGT_v, do_fp3_vector, a, 0, f_vector_fcmgt)
static gen_helper_gvec_3_ptr * const f_vector_facge[3] = {
gen_helper_gvec_facge_h,
gen_helper_gvec_facge_s,
gen_helper_gvec_facge_d,
};
-TRANS(FACGE_v, do_fp3_vector, a, f_vector_facge)
+TRANS(FACGE_v, do_fp3_vector, a, 0, f_vector_facge)
static gen_helper_gvec_3_ptr * const f_vector_facgt[3] = {
gen_helper_gvec_facgt_h,
gen_helper_gvec_facgt_s,
gen_helper_gvec_facgt_d,
};
-TRANS(FACGT_v, do_fp3_vector, a, f_vector_facgt)
+TRANS(FACGT_v, do_fp3_vector, a, 0, f_vector_facgt)
static gen_helper_gvec_3_ptr * const f_vector_fabd[3] = {
gen_helper_gvec_fabd_h,
gen_helper_gvec_fabd_s,
gen_helper_gvec_fabd_d,
};
-TRANS(FABD_v, do_fp3_vector, a, f_vector_fabd)
+TRANS(FABD_v, do_fp3_vector, a, 0, f_vector_fabd)
static gen_helper_gvec_3_ptr * const f_vector_frecps[3] = {
gen_helper_gvec_recps_h,
gen_helper_gvec_recps_s,
gen_helper_gvec_recps_d,
};
-TRANS(FRECPS_v, do_fp3_vector, a, f_vector_frecps)
+TRANS(FRECPS_v, do_fp3_vector, a, 0, f_vector_frecps)
static gen_helper_gvec_3_ptr * const f_vector_frsqrts[3] = {
gen_helper_gvec_rsqrts_h,
gen_helper_gvec_rsqrts_s,
gen_helper_gvec_rsqrts_d,
};
-TRANS(FRSQRTS_v, do_fp3_vector, a, f_vector_frsqrts)
+TRANS(FRSQRTS_v, do_fp3_vector, a, 0, f_vector_frsqrts)
static gen_helper_gvec_3_ptr * const f_vector_faddp[3] = {
gen_helper_gvec_faddp_h,
gen_helper_gvec_faddp_s,
gen_helper_gvec_faddp_d,
};
-TRANS(FADDP_v, do_fp3_vector, a, f_vector_faddp)
+TRANS(FADDP_v, do_fp3_vector, a, 0, f_vector_faddp)
static gen_helper_gvec_3_ptr * const f_vector_fmaxp[3] = {
gen_helper_gvec_fmaxp_h,
gen_helper_gvec_fmaxp_s,
gen_helper_gvec_fmaxp_d,
};
-TRANS(FMAXP_v, do_fp3_vector, a, f_vector_fmaxp)
+TRANS(FMAXP_v, do_fp3_vector, a, 0, f_vector_fmaxp)
static gen_helper_gvec_3_ptr * const f_vector_fminp[3] = {
gen_helper_gvec_fminp_h,
gen_helper_gvec_fminp_s,
gen_helper_gvec_fminp_d,
};
-TRANS(FMINP_v, do_fp3_vector, a, f_vector_fminp)
+TRANS(FMINP_v, do_fp3_vector, a, 0, f_vector_fminp)
static gen_helper_gvec_3_ptr * const f_vector_fmaxnmp[3] = {
gen_helper_gvec_fmaxnump_h,
gen_helper_gvec_fmaxnump_s,
gen_helper_gvec_fmaxnump_d,
};
-TRANS(FMAXNMP_v, do_fp3_vector, a, f_vector_fmaxnmp)
+TRANS(FMAXNMP_v, do_fp3_vector, a, 0, f_vector_fmaxnmp)
static gen_helper_gvec_3_ptr * const f_vector_fminnmp[3] = {
gen_helper_gvec_fminnump_h,
gen_helper_gvec_fminnump_s,
gen_helper_gvec_fminnump_d,
};
-TRANS(FMINNMP_v, do_fp3_vector, a, f_vector_fminnmp)
+TRANS(FMINNMP_v, do_fp3_vector, a, 0, f_vector_fminnmp)
static bool do_fmlal(DisasContext *s, arg_qrrr_e *a, bool is_s, bool is_2)
{
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 17/29] target/arm: Convert FCADD to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (15 preceding siblings ...)
2024-07-01 16:07 ` [PULL 16/29] target/arm: Add data argument to do_fp3_vector Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 18/29] target/arm: Convert FCMLA " Peter Maydell
` (12 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 3 +++
target/arm/tcg/translate-a64.c | 33 ++++++++++-----------------------
2 files changed, 13 insertions(+), 23 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index b2c7e36969e..f330919851b 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -957,6 +957,9 @@ SMMLA 0100 1110 100 ..... 10100 1 ..... ..... @rrr_q1e0
UMMLA 0110 1110 100 ..... 10100 1 ..... ..... @rrr_q1e0
USMMLA 0100 1110 100 ..... 10101 1 ..... ..... @rrr_q1e0
+FCADD_90 0.10 1110 ..0 ..... 11100 1 ..... ..... @qrrr_e
+FCADD_270 0.10 1110 ..0 ..... 11110 1 ..... ..... @qrrr_e
+
### Advanced SIMD scalar x indexed element
FMUL_si 0101 1111 00 .. .... 1001 . 0 ..... ..... @rrx_h
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 57cdde008ef..a1b338263ff 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5623,6 +5623,14 @@ static bool trans_BFMLAL_v(DisasContext *s, arg_qrrr_e *a)
return true;
}
+static gen_helper_gvec_3_ptr * const f_vector_fcadd[3] = {
+ gen_helper_gvec_fcaddh,
+ gen_helper_gvec_fcadds,
+ gen_helper_gvec_fcaddd,
+};
+TRANS_FEAT(FCADD_90, aa64_fcma, do_fp3_vector, a, 0, f_vector_fcadd)
+TRANS_FEAT(FCADD_270, aa64_fcma, do_fp3_vector, a, 1, f_vector_fcadd)
+
/*
* Advanced SIMD scalar/vector x indexed element
*/
@@ -10957,8 +10965,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
case 0x19: /* FCMLA, #90 */
case 0x1a: /* FCMLA, #180 */
case 0x1b: /* FCMLA, #270 */
- case 0x1c: /* FCADD, #90 */
- case 0x1e: /* FCADD, #270 */
if (size == 0
|| (size == 1 && !dc_isar_feature(aa64_fp16, s))
|| (size == 3 && !is_q)) {
@@ -10976,7 +10982,9 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
case 0x11: /* SQRDMLSH (vector) */
case 0x12: /* UDOT (vector) */
case 0x14: /* UMMLA */
+ case 0x1c: /* FCADD, #90 */
case 0x1d: /* BFMMLA */
+ case 0x1e: /* FCADD, #270 */
case 0x1f: /* BFDOT / BFMLAL */
unallocated_encoding(s);
return;
@@ -11013,27 +11021,6 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
return;
- case 0xc: /* FCADD, #90 */
- case 0xe: /* FCADD, #270 */
- rot = extract32(opcode, 1, 1);
- switch (size) {
- case 1:
- gen_gvec_op3_fpst(s, is_q, rd, rn, rm, size == 1, rot,
- gen_helper_gvec_fcaddh);
- break;
- case 2:
- gen_gvec_op3_fpst(s, is_q, rd, rn, rm, size == 1, rot,
- gen_helper_gvec_fcadds);
- break;
- case 3:
- gen_gvec_op3_fpst(s, is_q, rd, rn, rm, size == 1, rot,
- gen_helper_gvec_fcaddd);
- break;
- default:
- g_assert_not_reached();
- }
- return;
-
default:
g_assert_not_reached();
}
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 18/29] target/arm: Convert FCMLA to decodetree
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (16 preceding siblings ...)
2024-07-01 16:07 ` [PULL 17/29] target/arm: Convert FCADD to decodetree Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 19/29] target/arm: Delete dead code from disas_simd_indexed Peter Maydell
` (11 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/a64.decode | 6 +
target/arm/tcg/translate-a64.c | 238 ++++++++++-----------------------
2 files changed, 74 insertions(+), 170 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index f330919851b..223eac3cac2 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -960,6 +960,8 @@ USMMLA 0100 1110 100 ..... 10101 1 ..... ..... @rrr_q1e0
FCADD_90 0.10 1110 ..0 ..... 11100 1 ..... ..... @qrrr_e
FCADD_270 0.10 1110 ..0 ..... 11110 1 ..... ..... @qrrr_e
+FCMLA_v 0 q:1 10 1110 esz:2 0 rm:5 110 rot:2 1 rn:5 rd:5
+
### Advanced SIMD scalar x indexed element
FMUL_si 0101 1111 00 .. .... 1001 . 0 ..... ..... @rrx_h
@@ -1041,6 +1043,10 @@ USDOT_vi 0.00 1111 10 .. .... 1111 . 0 ..... ..... @qrrx_s
BFDOT_vi 0.00 1111 01 .. .... 1111 . 0 ..... ..... @qrrx_s
BFMLAL_vi 0.00 1111 11 .. .... 1111 . 0 ..... ..... @qrrx_h
+FCMLA_vi 0 0 10 1111 01 idx:1 rm:5 0 rot:2 1 0 0 rn:5 rd:5 esz=1 q=0
+FCMLA_vi 0 1 10 1111 01 . rm:5 0 rot:2 1 . 0 rn:5 rd:5 esz=1 idx=%hl q=1
+FCMLA_vi 0 1 10 1111 10 0 rm:5 0 rot:2 1 idx:1 0 rn:5 rd:5 esz=2 q=1
+
# Floating-point conditional select
FCSEL 0001 1110 .. 1 rm:5 cond:4 11 rn:5 rd:5 esz=%esz_hsd
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index a1b338263ff..161fa2659c4 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5631,6 +5631,39 @@ static gen_helper_gvec_3_ptr * const f_vector_fcadd[3] = {
TRANS_FEAT(FCADD_90, aa64_fcma, do_fp3_vector, a, 0, f_vector_fcadd)
TRANS_FEAT(FCADD_270, aa64_fcma, do_fp3_vector, a, 1, f_vector_fcadd)
+static bool trans_FCMLA_v(DisasContext *s, arg_FCMLA_v *a)
+{
+ gen_helper_gvec_4_ptr *fn;
+
+ if (!dc_isar_feature(aa64_fcma, s)) {
+ return false;
+ }
+ switch (a->esz) {
+ case MO_64:
+ if (!a->q) {
+ return false;
+ }
+ fn = gen_helper_gvec_fcmlad;
+ break;
+ case MO_32:
+ fn = gen_helper_gvec_fcmlas;
+ break;
+ case MO_16:
+ if (!dc_isar_feature(aa64_fp16, s)) {
+ return false;
+ }
+ fn = gen_helper_gvec_fcmlah;
+ break;
+ default:
+ return false;
+ }
+ if (fp_access_check(s)) {
+ gen_gvec_op4_fpst(s, a->q, a->rd, a->rn, a->rm, a->rd,
+ a->esz == MO_16, a->rot, fn);
+ }
+ return true;
+}
+
/*
* Advanced SIMD scalar/vector x indexed element
*/
@@ -5985,6 +6018,33 @@ static bool trans_BFMLAL_vi(DisasContext *s, arg_qrrx_e *a)
return true;
}
+static bool trans_FCMLA_vi(DisasContext *s, arg_FCMLA_vi *a)
+{
+ gen_helper_gvec_4_ptr *fn;
+
+ if (!dc_isar_feature(aa64_fcma, s)) {
+ return false;
+ }
+ switch (a->esz) {
+ case MO_16:
+ if (!dc_isar_feature(aa64_fp16, s)) {
+ return false;
+ }
+ fn = gen_helper_gvec_fcmlah_idx;
+ break;
+ case MO_32:
+ fn = gen_helper_gvec_fcmlas_idx;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ if (fp_access_check(s)) {
+ gen_gvec_op4_fpst(s, a->q, a->rd, a->rn, a->rm, a->rd,
+ a->esz == MO_16, (a->idx << 2) | a->rot, fn);
+ }
+ return true;
+}
+
/*
* Advanced SIMD scalar pairwise
*/
@@ -10942,90 +11002,6 @@ static void disas_simd_three_reg_diff(DisasContext *s, uint32_t insn)
}
}
-/* AdvSIMD three same extra
- * 31 30 29 28 24 23 22 21 20 16 15 14 11 10 9 5 4 0
- * +---+---+---+-----------+------+---+------+---+--------+---+----+----+
- * | 0 | Q | U | 0 1 1 1 0 | size | 0 | Rm | 1 | opcode | 1 | Rn | Rd |
- * +---+---+---+-----------+------+---+------+---+--------+---+----+----+
- */
-static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
-{
- int rd = extract32(insn, 0, 5);
- int rn = extract32(insn, 5, 5);
- int opcode = extract32(insn, 11, 4);
- int rm = extract32(insn, 16, 5);
- int size = extract32(insn, 22, 2);
- bool u = extract32(insn, 29, 1);
- bool is_q = extract32(insn, 30, 1);
- bool feature;
- int rot;
-
- switch (u * 16 + opcode) {
- case 0x18: /* FCMLA, #0 */
- case 0x19: /* FCMLA, #90 */
- case 0x1a: /* FCMLA, #180 */
- case 0x1b: /* FCMLA, #270 */
- if (size == 0
- || (size == 1 && !dc_isar_feature(aa64_fp16, s))
- || (size == 3 && !is_q)) {
- unallocated_encoding(s);
- return;
- }
- feature = dc_isar_feature(aa64_fcma, s);
- break;
- default:
- case 0x02: /* SDOT (vector) */
- case 0x03: /* USDOT */
- case 0x04: /* SMMLA */
- case 0x05: /* USMMLA */
- case 0x10: /* SQRDMLAH (vector) */
- case 0x11: /* SQRDMLSH (vector) */
- case 0x12: /* UDOT (vector) */
- case 0x14: /* UMMLA */
- case 0x1c: /* FCADD, #90 */
- case 0x1d: /* BFMMLA */
- case 0x1e: /* FCADD, #270 */
- case 0x1f: /* BFDOT / BFMLAL */
- unallocated_encoding(s);
- return;
- }
- if (!feature) {
- unallocated_encoding(s);
- return;
- }
- if (!fp_access_check(s)) {
- return;
- }
-
- switch (opcode) {
- case 0x8: /* FCMLA, #0 */
- case 0x9: /* FCMLA, #90 */
- case 0xa: /* FCMLA, #180 */
- case 0xb: /* FCMLA, #270 */
- rot = extract32(opcode, 0, 2);
- switch (size) {
- case 1:
- gen_gvec_op4_fpst(s, is_q, rd, rn, rm, rd, true, rot,
- gen_helper_gvec_fcmlah);
- break;
- case 2:
- gen_gvec_op4_fpst(s, is_q, rd, rn, rm, rd, false, rot,
- gen_helper_gvec_fcmlas);
- break;
- case 3:
- gen_gvec_op4_fpst(s, is_q, rd, rn, rm, rd, false, rot,
- gen_helper_gvec_fcmlad);
- break;
- default:
- g_assert_not_reached();
- }
- return;
-
- default:
- g_assert_not_reached();
- }
-}
-
static void handle_2misc_widening(DisasContext *s, int opcode, bool is_q,
int size, int rn, int rd)
{
@@ -12001,10 +11977,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
int rn = extract32(insn, 5, 5);
int rd = extract32(insn, 0, 5);
bool is_long = false;
- int is_fp = 0;
- bool is_fp16 = false;
int index;
- TCGv_ptr fpst;
switch (16 * u + opcode) {
case 0x02: /* SMLAL, SMLAL2 */
@@ -12024,16 +11997,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x0b: /* SQDMULL, SQDMULL2 */
is_long = true;
break;
- case 0x11: /* FCMLA #0 */
- case 0x13: /* FCMLA #90 */
- case 0x15: /* FCMLA #180 */
- case 0x17: /* FCMLA #270 */
- if (is_scalar || !dc_isar_feature(aa64_fcma, s)) {
- unallocated_encoding(s);
- return;
- }
- is_fp = 2;
- break;
default:
case 0x00: /* FMLAL */
case 0x01: /* FMLA */
@@ -12046,7 +12009,11 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
case 0x0e: /* SDOT */
case 0x0f: /* SUDOT / BFDOT / USDOT / BFMLAL */
case 0x10: /* MLA */
+ case 0x11: /* FCMLA #0 */
+ case 0x13: /* FCMLA #90 */
case 0x14: /* MLS */
+ case 0x15: /* FCMLA #180 */
+ case 0x17: /* FCMLA #270 */
case 0x18: /* FMLAL2 */
case 0x19: /* FMULX */
case 0x1c: /* FMLSL2 */
@@ -12057,46 +12024,12 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
return;
}
- switch (is_fp) {
- case 1: /* normal fp */
- unallocated_encoding(s); /* in decodetree */
- return;
-
- case 2: /* complex fp */
- /* Each indexable element is a complex pair. */
- size += 1;
- switch (size) {
- case MO_32:
- if (h && !is_q) {
- unallocated_encoding(s);
- return;
- }
- is_fp16 = true;
- break;
- case MO_64:
- break;
- default:
- unallocated_encoding(s);
- return;
- }
- break;
-
- default: /* integer */
- switch (size) {
- case MO_8:
- case MO_64:
- unallocated_encoding(s);
- return;
- }
- break;
- }
- if (is_fp16 && !dc_isar_feature(aa64_fp16, s)) {
- unallocated_encoding(s);
- return;
- }
-
/* Given MemOp size, adjust register and indexing. */
switch (size) {
+ case MO_8:
+ case MO_64:
+ unallocated_encoding(s);
+ return;
case MO_16:
index = h << 2 | l << 1 | m;
break;
@@ -12104,14 +12037,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
index = h << 1 | l;
rm |= m << 4;
break;
- case MO_64:
- if (l || !is_q) {
- unallocated_encoding(s);
- return;
- }
- index = h;
- rm |= m << 4;
- break;
default:
g_assert_not_reached();
}
@@ -12120,32 +12045,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
return;
}
- if (is_fp) {
- fpst = fpstatus_ptr(is_fp16 ? FPST_FPCR_F16 : FPST_FPCR);
- } else {
- fpst = NULL;
- }
-
- switch (16 * u + opcode) {
- case 0x11: /* FCMLA #0 */
- case 0x13: /* FCMLA #90 */
- case 0x15: /* FCMLA #180 */
- case 0x17: /* FCMLA #270 */
- {
- int rot = extract32(insn, 13, 2);
- int data = (index << 2) | rot;
- tcg_gen_gvec_4_ptr(vec_full_reg_offset(s, rd),
- vec_full_reg_offset(s, rn),
- vec_full_reg_offset(s, rm),
- vec_full_reg_offset(s, rd), fpst,
- is_q ? 16 : 8, vec_full_reg_size(s), data,
- size == MO_64
- ? gen_helper_gvec_fcmlas_idx
- : gen_helper_gvec_fcmlah_idx);
- }
- return;
- }
-
if (size == 3) {
g_assert_not_reached();
} else if (!is_long) {
@@ -12407,7 +12306,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
*/
static const AArch64DecodeTable data_proc_simd[] = {
/* pattern , mask , fn */
- { 0x0e008400, 0x9f208400, disas_simd_three_reg_same_extra },
{ 0x0e200000, 0x9f200c00, disas_simd_three_reg_diff },
{ 0x0e200800, 0x9f3e0c00, disas_simd_two_reg_misc },
{ 0x0e300800, 0x9f3e0c00, disas_simd_across_lanes },
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 19/29] target/arm: Delete dead code from disas_simd_indexed
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (17 preceding siblings ...)
2024-07-01 16:07 ` [PULL 18/29] target/arm: Convert FCMLA " Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 20/29] target/arm: Fix indentation Peter Maydell
` (10 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
MLA, MLS, SQDMULH, SQRDMULH, were converted with 8db93dcd3def
and f80701cb44d, and this code should have been removed then.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240625183536.1672454-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/translate-a64.c | 93 ----------------------------------
1 file changed, 93 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 161fa2659c4..6c07aeaf3bd 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -11976,7 +11976,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
int h = extract32(insn, 11, 1);
int rn = extract32(insn, 5, 5);
int rd = extract32(insn, 0, 5);
- bool is_long = false;
int index;
switch (16 * u + opcode) {
@@ -11990,12 +11989,10 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
unallocated_encoding(s);
return;
}
- is_long = true;
break;
case 0x03: /* SQDMLAL, SQDMLAL2 */
case 0x07: /* SQDMLSL, SQDMLSL2 */
case 0x0b: /* SQDMULL, SQDMULL2 */
- is_long = true;
break;
default:
case 0x00: /* FMLAL */
@@ -12047,96 +12044,6 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
if (size == 3) {
g_assert_not_reached();
- } else if (!is_long) {
- /* 32 bit floating point, or 16 or 32 bit integer.
- * For the 16 bit scalar case we use the usual Neon helpers and
- * rely on the fact that 0 op 0 == 0 with no side effects.
- */
- TCGv_i32 tcg_idx = tcg_temp_new_i32();
- int pass, maxpasses;
-
- if (is_scalar) {
- maxpasses = 1;
- } else {
- maxpasses = is_q ? 4 : 2;
- }
-
- read_vec_element_i32(s, tcg_idx, rm, index, size);
-
- if (size == 1 && !is_scalar) {
- /* The simplest way to handle the 16x16 indexed ops is to duplicate
- * the index into both halves of the 32 bit tcg_idx and then use
- * the usual Neon helpers.
- */
- tcg_gen_deposit_i32(tcg_idx, tcg_idx, tcg_idx, 16, 16);
- }
-
- for (pass = 0; pass < maxpasses; pass++) {
- TCGv_i32 tcg_op = tcg_temp_new_i32();
- TCGv_i32 tcg_res = tcg_temp_new_i32();
-
- read_vec_element_i32(s, tcg_op, rn, pass, is_scalar ? size : MO_32);
-
- switch (16 * u + opcode) {
- case 0x10: /* MLA */
- case 0x14: /* MLS */
- {
- static NeonGenTwoOpFn * const fns[2][2] = {
- { gen_helper_neon_add_u16, gen_helper_neon_sub_u16 },
- { tcg_gen_add_i32, tcg_gen_sub_i32 },
- };
- NeonGenTwoOpFn *genfn;
- bool is_sub = opcode == 0x4;
-
- if (size == 1) {
- gen_helper_neon_mul_u16(tcg_res, tcg_op, tcg_idx);
- } else {
- tcg_gen_mul_i32(tcg_res, tcg_op, tcg_idx);
- }
- if (opcode == 0x8) {
- break;
- }
- read_vec_element_i32(s, tcg_op, rd, pass, MO_32);
- genfn = fns[size - 1][is_sub];
- genfn(tcg_res, tcg_op, tcg_res);
- break;
- }
- case 0x0c: /* SQDMULH */
- if (size == 1) {
- gen_helper_neon_qdmulh_s16(tcg_res, tcg_env,
- tcg_op, tcg_idx);
- } else {
- gen_helper_neon_qdmulh_s32(tcg_res, tcg_env,
- tcg_op, tcg_idx);
- }
- break;
- case 0x0d: /* SQRDMULH */
- if (size == 1) {
- gen_helper_neon_qrdmulh_s16(tcg_res, tcg_env,
- tcg_op, tcg_idx);
- } else {
- gen_helper_neon_qrdmulh_s32(tcg_res, tcg_env,
- tcg_op, tcg_idx);
- }
- break;
- default:
- case 0x01: /* FMLA */
- case 0x05: /* FMLS */
- case 0x09: /* FMUL */
- case 0x19: /* FMULX */
- case 0x1d: /* SQRDMLAH */
- case 0x1f: /* SQRDMLSH */
- g_assert_not_reached();
- }
-
- if (is_scalar) {
- write_fp_sreg(s, rd, tcg_res);
- } else {
- write_vec_element_i32(s, tcg_res, rd, pass, MO_32);
- }
- }
-
- clear_vec_high(s, is_q, rd);
} else {
/* long ops: 16x16->32 or 32x32->64 */
TCGv_i64 tcg_res[2];
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 20/29] target/arm: Fix indentation
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (18 preceding siblings ...)
2024-07-01 16:07 ` [PULL 19/29] target/arm: Delete dead code from disas_simd_indexed Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 21/29] target/arm: Move initialization of debug ID registers Peter Maydell
` (9 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Gustavo Romero <gustavo.romero@linaro.org>
Fix comment indentation adding a missing space.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240624180915.4528-2-gustavo.romero@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/cpu64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index 0899251eef4..71e1bfcd4ee 100644
--- a/target/arm/tcg/cpu64.c
+++ b/target/arm/tcg/cpu64.c
@@ -1167,7 +1167,7 @@ void aarch64_max_tcg_initfn(Object *obj)
t = cpu->isar.id_aa64isar2;
t = FIELD_DP64(t, ID_AA64ISAR2, MOPS, 1); /* FEAT_MOPS */
- t = FIELD_DP64(t, ID_AA64ISAR2, BC, 1); /* FEAT_HBC */
+ t = FIELD_DP64(t, ID_AA64ISAR2, BC, 1); /* FEAT_HBC */
t = FIELD_DP64(t, ID_AA64ISAR2, WFXT, 2); /* FEAT_WFxT */
cpu->isar.id_aa64isar2 = t;
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 21/29] target/arm: Move initialization of debug ID registers
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (19 preceding siblings ...)
2024-07-01 16:07 ` [PULL 20/29] target/arm: Fix indentation Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 22/29] target/arm: Enable FEAT_Debugv8p8 for -cpu max Peter Maydell
` (8 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Gustavo Romero <gustavo.romero@linaro.org>
Move the initialization of the debug ID registers to aa32_max_features,
which is used to set the 32-bit ID registers. This ensures that the
debug ID registers are consistently set for the max CPU in a single
place.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240624180915.4528-3-gustavo.romero@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 2 ++
target/arm/tcg/cpu32.c | 31 ++++++++++++++++++++++++++++---
2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 3841359d0f1..d8eb986a047 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2299,6 +2299,8 @@ FIELD(DBGDEVID, DOUBLELOCK, 20, 4)
FIELD(DBGDEVID, AUXREGS, 24, 4)
FIELD(DBGDEVID, CIDMASK, 28, 4)
+FIELD(DBGDEVID1, PCSROFFSET, 0, 4)
+
FIELD(MVFR0, SIMDREG, 0, 4)
FIELD(MVFR0, FPSP, 4, 4)
FIELD(MVFR0, FPDP, 8, 4)
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index bdd82d912a2..28a5c033bb9 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -87,6 +87,34 @@ void aa32_max_features(ARMCPU *cpu)
t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */
cpu->isar.id_dfr0 = t;
+ /* Debug ID registers. */
+
+ /* Bit[15] is RES1, Bit[13] and Bits[11:0] are RES0. */
+ t = 0x00008000;
+ t = FIELD_DP32(t, DBGDIDR, SE_IMP, 1);
+ t = FIELD_DP32(t, DBGDIDR, NSUHD_IMP, 1);
+ t = FIELD_DP32(t, DBGDIDR, VERSION, 6); /* Armv8 debug */
+ t = FIELD_DP32(t, DBGDIDR, CTX_CMPS, 1);
+ t = FIELD_DP32(t, DBGDIDR, BRPS, 5);
+ t = FIELD_DP32(t, DBGDIDR, WRPS, 3);
+ cpu->isar.dbgdidr = t;
+
+ t = 0;
+ t = FIELD_DP32(t, DBGDEVID, PCSAMPLE, 3);
+ t = FIELD_DP32(t, DBGDEVID, WPADDRMASK, 1);
+ t = FIELD_DP32(t, DBGDEVID, BPADDRMASK, 15);
+ t = FIELD_DP32(t, DBGDEVID, VECTORCATCH, 0);
+ t = FIELD_DP32(t, DBGDEVID, VIRTEXTNS, 1);
+ t = FIELD_DP32(t, DBGDEVID, DOUBLELOCK, 1);
+ t = FIELD_DP32(t, DBGDEVID, AUXREGS, 0);
+ t = FIELD_DP32(t, DBGDEVID, CIDMASK, 0);
+ cpu->isar.dbgdevid = t;
+
+ /* Bits[31:4] are RES0. */
+ t = 0;
+ t = FIELD_DP32(t, DBGDEVID1, PCSROFFSET, 2);
+ cpu->isar.dbgdevid1 = t;
+
t = cpu->isar.id_dfr1;
t = FIELD_DP32(t, ID_DFR1, HPMN0, 1); /* FEAT_HPMN0 */
cpu->isar.id_dfr1 = t;
@@ -955,9 +983,6 @@ static void arm_max_initfn(Object *obj)
cpu->isar.id_isar4 = 0x00011142;
cpu->isar.id_isar5 = 0x00011121;
cpu->isar.id_isar6 = 0;
- cpu->isar.dbgdidr = 0x3516d000;
- cpu->isar.dbgdevid = 0x00110f13;
- cpu->isar.dbgdevid1 = 0x2;
cpu->isar.reset_pmcr_el0 = 0x41013000;
cpu->clidr = 0x0a200023;
cpu->ccsidr[0] = 0x701fe00a; /* 32KB L1 dcache */
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 22/29] target/arm: Enable FEAT_Debugv8p8 for -cpu max
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (20 preceding siblings ...)
2024-07-01 16:07 ` [PULL 21/29] target/arm: Move initialization of debug ID registers Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 23/29] MAINTAINERS: Update my family name Peter Maydell
` (7 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Gustavo Romero <gustavo.romero@linaro.org>
Enable FEAT_Debugv8p8 for max CPU. This feature is out of scope for QEMU
since it concerns the external debug interface for JTAG, but is
mandatory in Armv8.8 implementations, hence it is reported as supported
in the ID registers.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240624180915.4528-4-gustavo.romero@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
docs/system/arm/emulation.rst | 1 +
target/arm/tcg/cpu32.c | 6 +++---
target/arm/tcg/cpu64.c | 2 +-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index 1a06a5feb6e..3ab6e726679 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -41,6 +41,7 @@ the following architecture extensions:
- FEAT_Debugv8p1 (Debug with VHE)
- FEAT_Debugv8p2 (Debug changes for v8.2)
- FEAT_Debugv8p4 (Debug changes for v8.4)
+- FEAT_Debugv8p8 (Debug changes for v8.8)
- FEAT_DotProd (Advanced SIMD dot product instructions)
- FEAT_DoubleFault (Double Fault Extension)
- FEAT_E0PD (Preventing EL0 access to halves of address maps)
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index 28a5c033bb9..20c2737f17b 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -82,8 +82,8 @@ void aa32_max_features(ARMCPU *cpu)
cpu->isar.id_pfr2 = t;
t = cpu->isar.id_dfr0;
- t = FIELD_DP32(t, ID_DFR0, COPDBG, 9); /* FEAT_Debugv8p4 */
- t = FIELD_DP32(t, ID_DFR0, COPSDBG, 9); /* FEAT_Debugv8p4 */
+ t = FIELD_DP32(t, ID_DFR0, COPDBG, 10); /* FEAT_Debugv8p8 */
+ t = FIELD_DP32(t, ID_DFR0, COPSDBG, 10); /* FEAT_Debugv8p8 */
t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */
cpu->isar.id_dfr0 = t;
@@ -93,7 +93,7 @@ void aa32_max_features(ARMCPU *cpu)
t = 0x00008000;
t = FIELD_DP32(t, DBGDIDR, SE_IMP, 1);
t = FIELD_DP32(t, DBGDIDR, NSUHD_IMP, 1);
- t = FIELD_DP32(t, DBGDIDR, VERSION, 6); /* Armv8 debug */
+ t = FIELD_DP32(t, DBGDIDR, VERSION, 10); /* FEAT_Debugv8p8 */
t = FIELD_DP32(t, DBGDIDR, CTX_CMPS, 1);
t = FIELD_DP32(t, DBGDIDR, BRPS, 5);
t = FIELD_DP32(t, DBGDIDR, WRPS, 3);
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index 71e1bfcd4ee..fe232eb3069 100644
--- a/target/arm/tcg/cpu64.c
+++ b/target/arm/tcg/cpu64.c
@@ -1253,7 +1253,7 @@ void aarch64_max_tcg_initfn(Object *obj)
cpu->isar.id_aa64zfr0 = t;
t = cpu->isar.id_aa64dfr0;
- t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9); /* FEAT_Debugv8p4 */
+ t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 10); /* FEAT_Debugv8p8 */
t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 6); /* FEAT_PMUv3p5 */
t = FIELD_DP64(t, ID_AA64DFR0, HPMN0, 1); /* FEAT_HPMN0 */
cpu->isar.id_aa64dfr0 = t;
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 23/29] MAINTAINERS: Update my family name
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (21 preceding siblings ...)
2024-07-01 16:07 ` [PULL 22/29] target/arm: Enable FEAT_Debugv8p8 for -cpu max Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 24/29] hw/misc/zynq_slcr: Add boot-mode property Peter Maydell
` (6 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Patrick Leis <venture@google.com>
Signed-off-by: Patrick Leis <venture@google.com>
Message-id: 20240626211623.3510701-1-venture@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 19f67dc5d21..13255d4a3bd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2496,7 +2496,7 @@ F: hw/net/tulip.c
F: hw/net/tulip.h
pca954x
-M: Patrick Venture <venture@google.com>
+M: Patrick Leis <venture@google.com>
S: Maintained
F: hw/i2c/i2c_mux_pca954x.c
F: include/hw/i2c/i2c_mux_pca954x.h
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 24/29] hw/misc/zynq_slcr: Add boot-mode property
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (22 preceding siblings ...)
2024-07-01 16:07 ` [PULL 23/29] MAINTAINERS: Update my family name Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 25/29] hw/arm/xilinx_zynq: " Peter Maydell
` (5 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
boot-mode property sets user values into BOOT_MODE register, on hardware
these are derived from board switches.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20240621125906.1300995-2-sai.pavan.boddu@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/zynq_slcr.c | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index 3412ff099ea..ad814c3a79b 100644
--- a/hw/misc/zynq_slcr.c
+++ b/hw/misc/zynq_slcr.c
@@ -24,6 +24,8 @@
#include "hw/registerfields.h"
#include "hw/qdev-clock.h"
#include "qom/object.h"
+#include "hw/qdev-properties.h"
+#include "qapi/error.h"
#ifndef ZYNQ_SLCR_ERR_DEBUG
#define ZYNQ_SLCR_ERR_DEBUG 0
@@ -121,6 +123,7 @@ REG32(RST_REASON, 0x250)
REG32(REBOOT_STATUS, 0x258)
REG32(BOOT_MODE, 0x25c)
+ FIELD(BOOT_MODE, BOOT_MODE, 0, 4)
REG32(APU_CTRL, 0x300)
REG32(WDT_CLK_SEL, 0x304)
@@ -195,6 +198,7 @@ struct ZynqSLCRState {
Clock *ps_clk;
Clock *uart0_ref_clk;
Clock *uart1_ref_clk;
+ uint8_t boot_mode;
};
/*
@@ -371,7 +375,7 @@ static void zynq_slcr_reset_init(Object *obj, ResetType type)
s->regs[R_FPGA_RST_CTRL] = 0x01F33F0F;
s->regs[R_RST_REASON] = 0x00000040;
- s->regs[R_BOOT_MODE] = 0x00000001;
+ s->regs[R_BOOT_MODE] = s->boot_mode & R_BOOT_MODE_BOOT_MODE_MASK;
/* 0x700 - 0x7D4 */
for (i = 0; i < 54; i++) {
@@ -588,6 +592,15 @@ static const ClockPortInitArray zynq_slcr_clocks = {
QDEV_CLOCK_END
};
+static void zynq_slcr_realize(DeviceState *dev, Error **errp)
+{
+ ZynqSLCRState *s = ZYNQ_SLCR(dev);
+
+ if (s->boot_mode > 0xF) {
+ error_setg(errp, "Invalid boot mode %d specified", s->boot_mode);
+ }
+}
+
static void zynq_slcr_init(Object *obj)
{
ZynqSLCRState *s = ZYNQ_SLCR(obj);
@@ -610,15 +623,22 @@ static const VMStateDescription vmstate_zynq_slcr = {
}
};
+static Property zynq_slcr_props[] = {
+ DEFINE_PROP_UINT8("boot-mode", ZynqSLCRState, boot_mode, 1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void zynq_slcr_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
dc->vmsd = &vmstate_zynq_slcr;
+ dc->realize = zynq_slcr_realize;
rc->phases.enter = zynq_slcr_reset_init;
rc->phases.hold = zynq_slcr_reset_hold;
rc->phases.exit = zynq_slcr_reset_exit;
+ device_class_set_props(dc, zynq_slcr_props);
}
static const TypeInfo zynq_slcr_info = {
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 25/29] hw/arm/xilinx_zynq: Add boot-mode property
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (23 preceding siblings ...)
2024-07-01 16:07 ` [PULL 24/29] hw/misc/zynq_slcr: Add boot-mode property Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 26/29] docs/system/arm: Add a doc for zynq board Peter Maydell
` (4 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Read boot-mode value as machine property and propagate that to
SLCR.BOOT_MODE register.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20240621125906.1300995-3-sai.pavan.boddu@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/xilinx_zynq.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index c79661bbc1b..3c56b9abe1c 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -38,6 +38,7 @@
#include "qom/object.h"
#include "exec/tswap.h"
#include "target/arm/cpu-qom.h"
+#include "qapi/visitor.h"
#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
@@ -90,6 +91,7 @@ struct ZynqMachineState {
MachineState parent;
Clock *ps_clk;
ARMCPU *cpu[ZYNQ_MAX_CPUS];
+ uint8_t boot_mode;
};
static void zynq_write_board_setup(ARMCPU *cpu,
@@ -176,6 +178,27 @@ static inline int zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq,
return unit;
}
+static void zynq_set_boot_mode(Object *obj, const char *str,
+ Error **errp)
+{
+ ZynqMachineState *m = ZYNQ_MACHINE(obj);
+ uint8_t mode = 0;
+
+ if (!strncasecmp(str, "qspi", 4)) {
+ mode = 1;
+ } else if (!strncasecmp(str, "sd", 2)) {
+ mode = 5;
+ } else if (!strncasecmp(str, "nor", 3)) {
+ mode = 2;
+ } else if (!strncasecmp(str, "jtag", 4)) {
+ mode = 0;
+ } else {
+ error_setg(errp, "%s boot mode not supported", str);
+ return;
+ }
+ m->boot_mode = mode;
+}
+
static void zynq_init(MachineState *machine)
{
ZynqMachineState *zynq_machine = ZYNQ_MACHINE(machine);
@@ -241,6 +264,7 @@ static void zynq_init(MachineState *machine)
/* Create slcr, keep a pointer to connect clocks */
slcr = qdev_new("xilinx-zynq_slcr");
qdev_connect_clock_in(slcr, "ps_clk", zynq_machine->ps_clk);
+ qdev_prop_set_uint8(slcr, "boot-mode", zynq_machine->boot_mode);
sysbus_realize_and_unref(SYS_BUS_DEVICE(slcr), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000);
@@ -373,6 +397,7 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data)
NULL
};
MachineClass *mc = MACHINE_CLASS(oc);
+ ObjectProperty *prop;
mc->desc = "Xilinx Zynq Platform Baseboard for Cortex-A9";
mc->init = zynq_init;
mc->max_cpus = ZYNQ_MAX_CPUS;
@@ -380,6 +405,12 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data)
mc->ignore_memory_transaction_failures = true;
mc->valid_cpu_types = valid_cpu_types;
mc->default_ram_id = "zynq.ext_ram";
+ prop = object_class_property_add_str(oc, "boot-mode", NULL,
+ zynq_set_boot_mode);
+ object_class_property_set_description(oc, "boot-mode",
+ "Supported boot modes:"
+ " jtag qspi sd nor");
+ object_property_set_default_str(prop, "qspi");
}
static const TypeInfo zynq_machine_type = {
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 26/29] docs/system/arm: Add a doc for zynq board
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (24 preceding siblings ...)
2024-07-01 16:07 ` [PULL 25/29] hw/arm/xilinx_zynq: " Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 27/29] tests/qtest: Fix STM32L4x5 SYSCFG irq line 15 state assumption Peter Maydell
` (3 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Added the supported device list and an example command.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20240621125906.1300995-4-sai.pavan.boddu@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
MAINTAINERS | 1 +
docs/system/arm/xlnx-zynq.rst | 47 +++++++++++++++++++++++++++++++++++
docs/system/target-arm.rst | 1 +
3 files changed, 49 insertions(+)
create mode 100644 docs/system/arm/xlnx-zynq.rst
diff --git a/MAINTAINERS b/MAINTAINERS
index 13255d4a3bd..6725913c8b3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1033,6 +1033,7 @@ F: hw/adc/zynq-xadc.c
F: include/hw/misc/zynq_slcr.h
F: include/hw/adc/zynq-xadc.h
X: hw/ssi/xilinx_*
+F: docs/system/arm/xlnx-zynq.rst
Xilinx ZynqMP and Versal
M: Alistair Francis <alistair@alistair23.me>
diff --git a/docs/system/arm/xlnx-zynq.rst b/docs/system/arm/xlnx-zynq.rst
new file mode 100644
index 00000000000..ade18a3fe13
--- /dev/null
+++ b/docs/system/arm/xlnx-zynq.rst
@@ -0,0 +1,47 @@
+Xilinx Zynq board (``xilinx-zynq-a9``)
+======================================
+The Zynq 7000 family is based on the AMD SoC architecture. These products
+integrate a feature-rich dual or single-core Arm Cortex-A9 MPCore based
+processing system (PS) and AMD programmable logic (PL) in a single device.
+
+More details here:
+https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Zynq-7000-SoC-Technical-Reference-Manual
+
+QEMU xilinx-zynq-a9 board supports following devices:
+ - A9 MPCORE
+ - cortex-a9
+ - GIC v1
+ - Generic timer
+ - wdt
+ - OCM 256KB
+ - SMC SRAM@0xe2000000 64MB
+ - Zynq SLCR
+ - SPI x2
+ - QSPI
+ - UART
+ - TTC x2
+ - Gigabit Ethernet Controller x2
+ - SD Controller x2
+ - XADC
+ - Arm PrimeCell DMA Controller
+ - DDR Memory
+ - USB 2.0 x2
+
+Running
+"""""""
+Direct Linux boot of a generic ARM upstream Linux kernel:
+
+.. code-block:: bash
+
+ $ qemu-system-aarch64 -M xilinx-zynq-a9 \
+ -dtb zynq-zc702.dtb -serial null -serial mon:stdio \
+ -display none -m 1024 \
+ -initrd rootfs.cpio.gz -kernel zImage
+
+For configuring the boot-mode provide the following on the command line:
+
+.. code-block:: bash
+
+ -machine boot-mode=qspi
+
+Supported values are jtag, sd, qspi, nor.
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index 870d30e3502..7b992722846 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -109,6 +109,7 @@ undocumented; you can get a complete list by running
arm/virt
arm/xenpvh
arm/xlnx-versal-virt
+ arm/xlnx-zynq
Emulated CPU architecture support
=================================
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 27/29] tests/qtest: Fix STM32L4x5 SYSCFG irq line 15 state assumption
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (25 preceding siblings ...)
2024-07-01 16:07 ` [PULL 26/29] docs/system/arm: Add a doc for zynq board Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 28/29] hw/misc: In STM32L4x5 EXTI, correct configurable interrupts Peter Maydell
` (2 subsequent siblings)
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Inès Varhol <ines.varhol@telecom-paris.fr>
The QTest `test_irq_pin_multiplexer` makes the assumption that the
reset state of irq line 15 is low, which is false since STM32L4x5 GPIO
was implemented (the reset state of pin GPIOA15 is high because there's
pull-up and it results in the irq line 15 also being high at reset).
It wasn't triggering an error because `test_interrupt` was mistakenly
"resetting" the line low.
This commit corrects these two mistakes by :
- not setting the line low in `test_interrupt`
- using an irq line in `test_irq_pin_multiplexer` which is low at reset
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Message-id: 20240629104454.366283-1-ines.varhol@telecom-paris.fr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/qtest/stm32l4x5_syscfg-test.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tests/qtest/stm32l4x5_syscfg-test.c b/tests/qtest/stm32l4x5_syscfg-test.c
index 506ca08bc24..1cdf8f05c80 100644
--- a/tests/qtest/stm32l4x5_syscfg-test.c
+++ b/tests/qtest/stm32l4x5_syscfg-test.c
@@ -223,7 +223,7 @@ static void test_interrupt(void)
/* Clean the test */
syscfg_writel(SYSCFG_EXTICR1, 0x00000000);
syscfg_set_irq(0, 0);
- syscfg_set_irq(15, 0);
+ /* irq 15 is high at reset because GPIOA15 is high at reset */
syscfg_set_irq(17, 0);
}
@@ -237,21 +237,21 @@ static void test_irq_pin_multiplexer(void)
syscfg_set_irq(0, 1);
- /* Check that irq 0 was set and irq 15 wasn't */
+ /* Check that irq 0 was set and irq 2 wasn't */
g_assert_true(get_irq(0));
- g_assert_false(get_irq(15));
+ g_assert_false(get_irq(2));
/* Clean the test */
syscfg_set_irq(0, 0);
- syscfg_set_irq(15, 1);
+ syscfg_set_irq(2, 1);
- /* Check that irq 15 was set and irq 0 wasn't */
- g_assert_true(get_irq(15));
+ /* Check that irq 2 was set and irq 0 wasn't */
+ g_assert_true(get_irq(2));
g_assert_false(get_irq(0));
/* Clean the test */
- syscfg_set_irq(15, 0);
+ syscfg_set_irq(2, 0);
}
static void test_irq_gpio_multiplexer(void)
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 28/29] hw/misc: In STM32L4x5 EXTI, correct configurable interrupts
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (26 preceding siblings ...)
2024-07-01 16:07 ` [PULL 27/29] tests/qtest: Fix STM32L4x5 SYSCFG irq line 15 state assumption Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 16:07 ` [PULL 29/29] tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests Peter Maydell
2024-07-01 22:19 ` [PULL 00/29] target-arm queue Richard Henderson
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Inès Varhol <ines.varhol@telecom-paris.fr>
The implementation of configurable interrupts (interrupts supporting
edge selection) was incorrectly expecting alternating input levels :
this commits adds a new status field `irq_levels` to actually detect
edges.
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Message-id: 20240629110800.539969-2-ines.varhol@telecom-paris.fr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/misc/stm32l4x5_exti.h | 2 ++
hw/misc/stm32l4x5_exti.c | 28 +++++++++++++---------------
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/include/hw/misc/stm32l4x5_exti.h b/include/hw/misc/stm32l4x5_exti.h
index be961d2f01f..55f763fa376 100644
--- a/include/hw/misc/stm32l4x5_exti.h
+++ b/include/hw/misc/stm32l4x5_exti.h
@@ -45,6 +45,8 @@ struct Stm32l4x5ExtiState {
uint32_t swier[EXTI_NUM_REGISTER];
uint32_t pr[EXTI_NUM_REGISTER];
+ /* used for edge detection */
+ uint32_t irq_levels[EXTI_NUM_REGISTER];
qemu_irq irq[EXTI_NUM_INTERRUPT_OUT_LINES];
};
diff --git a/hw/misc/stm32l4x5_exti.c b/hw/misc/stm32l4x5_exti.c
index 495a0004ab4..6a2ec62d785 100644
--- a/hw/misc/stm32l4x5_exti.c
+++ b/hw/misc/stm32l4x5_exti.c
@@ -88,6 +88,7 @@ static void stm32l4x5_exti_reset_hold(Object *obj, ResetType type)
s->ftsr[bank] = 0x00000000;
s->swier[bank] = 0x00000000;
s->pr[bank] = 0x00000000;
+ s->irq_levels[bank] = 0x00000000;
}
}
@@ -102,27 +103,23 @@ static void stm32l4x5_exti_set_irq(void *opaque, int irq, int level)
/* Shift the value to enable access in x2 registers. */
irq %= EXTI_MAX_IRQ_PER_BANK;
+ if (level == extract32(s->irq_levels[bank], irq, 1)) {
+ /* No change in IRQ line state: do nothing */
+ return;
+ }
+ s->irq_levels[bank] = deposit32(s->irq_levels[bank], irq, 1, level);
+
/* If the interrupt is masked, pr won't be raised */
if (!extract32(s->imr[bank], irq, 1)) {
return;
}
- if (((1 << irq) & s->rtsr[bank]) && level) {
- /* Rising Edge */
- s->pr[bank] |= 1 << irq;
- qemu_irq_pulse(s->irq[oirq]);
- } else if (((1 << irq) & s->ftsr[bank]) && !level) {
- /* Falling Edge */
+ if ((level && extract32(s->rtsr[bank], irq, 1)) ||
+ (!level && extract32(s->ftsr[bank], irq, 1))) {
+
s->pr[bank] |= 1 << irq;
qemu_irq_pulse(s->irq[oirq]);
}
- /*
- * In the following situations :
- * - falling edge but rising trigger selected
- * - rising edge but falling trigger selected
- * - no trigger selected
- * No action is required
- */
}
static uint64_t stm32l4x5_exti_read(void *opaque, hwaddr addr,
@@ -255,8 +252,8 @@ static void stm32l4x5_exti_init(Object *obj)
static const VMStateDescription vmstate_stm32l4x5_exti = {
.name = TYPE_STM32L4X5_EXTI,
- .version_id = 1,
- .minimum_version_id = 1,
+ .version_id = 2,
+ .minimum_version_id = 2,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(imr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER),
VMSTATE_UINT32_ARRAY(emr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER),
@@ -264,6 +261,7 @@ static const VMStateDescription vmstate_stm32l4x5_exti = {
VMSTATE_UINT32_ARRAY(ftsr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER),
VMSTATE_UINT32_ARRAY(swier, Stm32l4x5ExtiState, EXTI_NUM_REGISTER),
VMSTATE_UINT32_ARRAY(pr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER),
+ VMSTATE_UINT32_ARRAY(irq_levels, Stm32l4x5ExtiState, EXTI_NUM_REGISTER),
VMSTATE_END_OF_LIST()
}
};
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PULL 29/29] tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (27 preceding siblings ...)
2024-07-01 16:07 ` [PULL 28/29] hw/misc: In STM32L4x5 EXTI, correct configurable interrupts Peter Maydell
@ 2024-07-01 16:07 ` Peter Maydell
2024-07-01 22:19 ` [PULL 00/29] target-arm queue Richard Henderson
29 siblings, 0 replies; 38+ messages in thread
From: Peter Maydell @ 2024-07-01 16:07 UTC (permalink / raw)
To: qemu-devel
From: Inès Varhol <ines.varhol@telecom-paris.fr>
EXTI's new field `irq_levels` tracks irq levels between tests when using
`global_qtest`.
This happens in `stm32l4x5_exti-test.c`, `stm32l4x5_syscfg-test.c` and
`stm32l4x5_gpio-test.c` (`dm163.c` doesn't use `global_qtest`).
To ensure that `irq_levels` has the same value before and after each
QTest, this commit toggles back the irq lines that were changed at the
end of each problematic test. Most QTests were already doing this.
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Message-id: 20240629110800.539969-3-ines.varhol@telecom-paris.fr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/qtest/stm32l4x5_exti-test.c | 8 ++++++++
tests/qtest/stm32l4x5_syscfg-test.c | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/tests/qtest/stm32l4x5_exti-test.c b/tests/qtest/stm32l4x5_exti-test.c
index 7092860b9b7..7e39c992fd3 100644
--- a/tests/qtest/stm32l4x5_exti-test.c
+++ b/tests/qtest/stm32l4x5_exti-test.c
@@ -448,6 +448,9 @@ static void test_masked_interrupt(void)
g_assert_cmphex(exti_readl(EXTI_PR1), ==, 0x00000000);
/* Check that the interrupt isn't pending in NVIC */
g_assert_false(check_nvic_pending(EXTI1_IRQ));
+
+ /* Clean EXTI */
+ exti_set_irq(1, 0);
}
static void test_interrupt(void)
@@ -498,6 +501,9 @@ static void test_interrupt(void)
/* Clean NVIC */
unpend_nvic_irq(EXTI1_IRQ);
g_assert_false(check_nvic_pending(EXTI1_IRQ));
+
+ /* Clean EXTI */
+ exti_set_irq(1, 0);
}
static void test_orred_interrupts(void)
@@ -531,6 +537,8 @@ static void test_orred_interrupts(void)
unpend_nvic_irq(EXTI5_9_IRQ);
g_assert_false(check_nvic_pending(EXTI5_9_IRQ));
+
+ exti_set_irq(i, 0);
}
}
diff --git a/tests/qtest/stm32l4x5_syscfg-test.c b/tests/qtest/stm32l4x5_syscfg-test.c
index 1cdf8f05c80..258417cd889 100644
--- a/tests/qtest/stm32l4x5_syscfg-test.c
+++ b/tests/qtest/stm32l4x5_syscfg-test.c
@@ -221,10 +221,10 @@ static void test_interrupt(void)
g_assert_true(get_irq(1));
/* Clean the test */
- syscfg_writel(SYSCFG_EXTICR1, 0x00000000);
syscfg_set_irq(0, 0);
/* irq 15 is high at reset because GPIOA15 is high at reset */
syscfg_set_irq(17, 0);
+ syscfg_writel(SYSCFG_EXTICR1, 0x00000000);
}
static void test_irq_pin_multiplexer(void)
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* Re: [PULL 00/29] target-arm queue
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
` (28 preceding siblings ...)
2024-07-01 16:07 ` [PULL 29/29] tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests Peter Maydell
@ 2024-07-01 22:19 ` Richard Henderson
29 siblings, 0 replies; 38+ messages in thread
From: Richard Henderson @ 2024-07-01 22:19 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
On 7/1/24 09:07, Peter Maydell wrote:
> The following changes since commit b6d32a06fc0984e537091cba08f2e1ed9f775d74:
>
> Merge tag 'pull-trivial-patches' ofhttps://gitlab.com/mjt0k/qemu into staging (2024-06-30 16:12:24 -0700)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240701
>
> for you to fetch changes up to 58c782de557beb496bfb4c5ade721bbbd2480c72:
>
> tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests (2024-07-01 15:40:54 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * tests/avocado: update firmware for sbsa-ref and use all cores
> * hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev
> * arm: Fix VCMLA Dd, Dn, Dm[idx]
> * arm: Fix SQDMULH (by element) with Q=0
> * arm: Fix FJCVTZS vs flush-to-zero
> * arm: More conversion of A64 AdvSIMD to decodetree
> * arm: Enable FEAT_Debugv8p8 for -cpu max
> * MAINTAINERS: Update family name for Patrick Leis
> * hw/arm/xilinx_zynq: Add boot-mode property
> * docs/system/arm: Add a doc for zynq board
> * hw/misc: In STM32L4x5 EXTI, correct configurable interrupts
> * tests/qtest: fix minor issues in STM32L4x5 tests
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/9.1 as appropriate.
r~
^ permalink raw reply [flat|nested] 38+ messages in thread
end of thread, other threads:[~2024-07-01 22:21 UTC | newest]
Thread overview: 38+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-07-01 16:07 [PULL 00/29] target-arm queue Peter Maydell
2024-07-01 16:07 ` [PULL 01/29] hw/nvram: Add BCM2835 OTP device Peter Maydell
2024-07-01 16:07 ` [PULL 02/29] hw/arm: Connect OTP device to BCM2835 Peter Maydell
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2024-07-01 16:07 ` [PULL 07/29] target/arm: Fix VCMLA Dd, Dn, Dm[idx] Peter Maydell
2024-07-01 16:07 ` [PULL 08/29] target/arm: Fix SQDMULH (by element) with Q=0 Peter Maydell
2024-07-01 16:07 ` [PULL 09/29] target/arm: Fix FJCVTZS vs flush-to-zero Peter Maydell
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2024-07-01 16:07 ` [PULL 11/29] target/arm: Convert SDOT, UDOT " Peter Maydell
2024-07-01 16:07 ` [PULL 12/29] target/arm: Convert SUDOT, USDOT " Peter Maydell
2024-07-01 16:07 ` [PULL 13/29] target/arm: Convert BFDOT " Peter Maydell
2024-07-01 16:07 ` [PULL 14/29] target/arm: Convert BFMLALB, BFMLALT " Peter Maydell
2024-07-01 16:07 ` [PULL 15/29] target/arm: Convert BFMMLA, SMMLA, UMMLA, USMMLA " Peter Maydell
2024-07-01 16:07 ` [PULL 16/29] target/arm: Add data argument to do_fp3_vector Peter Maydell
2024-07-01 16:07 ` [PULL 17/29] target/arm: Convert FCADD to decodetree Peter Maydell
2024-07-01 16:07 ` [PULL 18/29] target/arm: Convert FCMLA " Peter Maydell
2024-07-01 16:07 ` [PULL 19/29] target/arm: Delete dead code from disas_simd_indexed Peter Maydell
2024-07-01 16:07 ` [PULL 20/29] target/arm: Fix indentation Peter Maydell
2024-07-01 16:07 ` [PULL 21/29] target/arm: Move initialization of debug ID registers Peter Maydell
2024-07-01 16:07 ` [PULL 22/29] target/arm: Enable FEAT_Debugv8p8 for -cpu max Peter Maydell
2024-07-01 16:07 ` [PULL 23/29] MAINTAINERS: Update my family name Peter Maydell
2024-07-01 16:07 ` [PULL 24/29] hw/misc/zynq_slcr: Add boot-mode property Peter Maydell
2024-07-01 16:07 ` [PULL 25/29] hw/arm/xilinx_zynq: " Peter Maydell
2024-07-01 16:07 ` [PULL 26/29] docs/system/arm: Add a doc for zynq board Peter Maydell
2024-07-01 16:07 ` [PULL 27/29] tests/qtest: Fix STM32L4x5 SYSCFG irq line 15 state assumption Peter Maydell
2024-07-01 16:07 ` [PULL 28/29] hw/misc: In STM32L4x5 EXTI, correct configurable interrupts Peter Maydell
2024-07-01 16:07 ` [PULL 29/29] tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests Peter Maydell
2024-07-01 22:19 ` [PULL 00/29] target-arm queue Richard Henderson
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2023-05-18 12:50 Peter Maydell
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2022-12-15 12:49 Peter Maydell
2020-06-05 16:49 Peter Maydell
2020-06-05 20:10 ` no-reply
2020-06-08 10:04 ` Peter Maydell
2020-05-21 19:15 Peter Maydell
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