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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dbdd35e88sm1262836f8f.26.2025.02.06.02.00.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Feb 2025 02:00:49 -0800 (PST) Message-ID: <8cbad5be-e67b-46bd-9198-f7c90ad5ff56@linaro.org> Date: Thu, 6 Feb 2025 11:00:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] hw/sd/sdhci: Set reset value of interrupt registers To: BALATON Zoltan , qemu-devel@nongnu.org, qemu-block@nongnu.org Cc: Bernhard Beschow , Jamin Lin References: <20250115190422.5F0FA4E6030@zero.eik.bme.hu> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20250115190422.5F0FA4E6030@zero.eik.bme.hu> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 15/1/25 20:04, BALATON Zoltan wrote: > The interrupt enable registers are not reset to 0 but some bits are > enabled on reset. At least some U-Boot versions seem to expect this > and not initialise these registers before expecting interrupts. The > numbers in this patch match what QorIQ P1022 has on reset and fix > U-Boot for this SoC and should not break other drivers that initialise > (and thus overwrite) these reset values. > > Signed-off-by: BALATON Zoltan > --- > I've also noticed that the work around marked with an XXX comment near > line 600 breaks the U-Boot I've tested so I need to disable it: > if ((s->sdmasysad % boundary_chk) == 0) { > - page_aligned = true; > +// page_aligned = true; > } > What should this hack fix and could it be now removed or somehow > restricted to cases where it's needed? Cc'ing Jamin for https://lore.kernel.org/qemu-devel/20241213031205.641009-2-jamin_lin@aspeedtech.com/ > > hw/sd/sdhci.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c > index 58375483e3..88eb0bfcb2 100644 > --- a/hw/sd/sdhci.c > +++ b/hw/sd/sdhci.c > @@ -303,6 +303,8 @@ static void sdhci_reset(SDHCIState *s) > s->data_count = 0; > s->stopped_state = sdhc_not_stopped; > s->pending_insert_state = false; > + s->norintstsen = 0x013f; > + s->errintstsen = 0x117f; I guess the problem is earlier: /* * Set all registers to 0. Capabilities/Version registers are not cleared * and assumed to always preserve their value, given to them during * initialization */ memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmasysad); Not all registers have to be reset.