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[120.151.179.201]) by smtp.gmail.com with ESMTPSA id lx4sm1349588pjb.44.2022.01.26.22.27.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jan 2022 22:27:48 -0800 (PST) Message-ID: <8d876840-8743-0e8b-c477-ca8a6e067d8c@linaro.org> Date: Thu, 27 Jan 2022 17:27:42 +1100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v2 14/40] bsd-user/arm/target_arch_cpu.h: Use force_sig_fault for EXCP_UDEF Content-Language: en-US To: Warner Losh , qemu-devel@nongnu.org References: <20220125012947.14974-1-imp@bsdimp.com> <20220125012947.14974-15-imp@bsdimp.com> From: Richard Henderson In-Reply-To: <20220125012947.14974-15-imp@bsdimp.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62b (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , def@FreeBSD.org, jrtc27@FreeBSD.org, Kyle Evans Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 1/25/22 12:29, Warner Losh wrote: > + case EXCP_NOCP: > + case EXCP_INVSTATE: > + /* > + * See arm/arm/undefined.c undefinedinstruction(); > + * > + * A number of details aren't emulated (they likely don't matter): > + * o Misaligned PC generates ILL_ILLADR As I mentioned, misaligned pc will not come here for qemu. In the Arm ARM, see aarch32/functions/registers/BXWritePC: // For branches to an unaligned PC counter in A32 state, the processor takes the branch // and does one of: // * Forces the address to be aligned // * Leaves the PC unaligned, meaning the target generates a PC Alignment fault. The hardware will either refuse to allow bit 1 to be set when bit 0 is clear, OR it will generate a PREFETCH_DATA_ABORT for Alignment. QEMU will do the latter. Otherwise, Reviewed-by: Richard Henderson r~