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Tue, 21 Oct 2025 08:28:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHiEMgEdUK1kr3M17GRhS1inC/gUeQo+zbKZIJbu14Dbv7PX3rHQ29+tWi708fkbKAob6TmfA== X-Received: by 2002:a05:600c:3541:b0:46d:a04:50c6 with SMTP id 5b1f17b1804b1-4711791934dmr133224695e9.30.1761060489106; Tue, 21 Oct 2025 08:28:09 -0700 (PDT) Received: from [192.168.43.95] ([78.245.103.33]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-427ea5b3b45sm20985267f8f.11.2025.10.21.08.28.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Oct 2025 08:28:07 -0700 (PDT) Message-ID: <8d87fa88-2b1c-4ae8-b4c6-89a788da4bcc@redhat.com> Date: Tue, 21 Oct 2025 17:28:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 06/27] hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci endpoints with iommufd To: Shameer Kolothum , Nicolin Chen Cc: "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" , "peter.maydell@linaro.org" , Jason Gunthorpe , "ddutile@redhat.com" , "berrange@redhat.com" , Nathan Chen , Matt Ochs , "smostafa@google.com" , "wangzhou1@hisilicon.com" , "jiangkunkun@huawei.com" , "jonathan.cameron@huawei.com" , "zhangfei.gao@linaro.org" , "zhenzhong.duan@intel.com" , "yi.l.liu@intel.com" , "shameerkolothum@gmail.com" References: <20250929133643.38961-1-skolothumtho@nvidia.com> <20250929133643.38961-7-skolothumtho@nvidia.com> Content-Language: en-US From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/20/25 8:59 PM, Shameer Kolothum wrote: > >> -----Original Message----- >> From: Nicolin Chen >> Sent: 20 October 2025 19:25 >> To: Eric Auger >> Cc: Shameer Kolothum ; qemu- >> arm@nongnu.org; qemu-devel@nongnu.org; peter.maydell@linaro.org; >> Jason Gunthorpe ; ddutile@redhat.com; >> berrange@redhat.com; Nathan Chen ; Matt Ochs >> ; smostafa@google.com; wangzhou1@hisilicon.com; >> jiangkunkun@huawei.com; jonathan.cameron@huawei.com; >> zhangfei.gao@linaro.org; zhenzhong.duan@intel.com; yi.l.liu@intel.com; >> shameerkolothum@gmail.com >> Subject: Re: [PATCH v4 06/27] hw/arm/smmuv3-accel: Restrict accelerated >> SMMUv3 to vfio-pci endpoints with iommufd >> >> On Mon, Oct 20, 2025 at 06:31:38PM +0200, Eric Auger wrote: >>> On 9/29/25 3:36 PM, Shameer Kolothum wrote: >>>> + /* >>>> + * We return the system address for vfio-pci devices(with iommufd as >>>> + * backend) so that the VFIO core can set up Stage-2 (S2) mappings for >>>> + * guest RAM. This is needed because, in the accelerated SMMUv3 >> case, >>>> + * the host SMMUv3 runs in nested (S1 + S2) mode where the guest >>>> + * manages its own S1 page tables while the host manages S2. >>>> + * >>>> + * We are using the global &address_space_memory here, as this will >> ensure >>>> + * same system address space pointer for all devices behind the >> accelerated >>>> + * SMMUv3s in a VM. That way VFIO/iommufd can reuse a single IOAS >> ID in >>>> + * iommufd_cdev_attach(), allowing the Stage-2 page tables to be >> shared >>>> + * within the VM instead of duplicating them for every SMMUv3 >> instance. >>>> + */ >>>> + if (vfio_pci) { >>>> + return &address_space_memory; >>> From that comment one understands the need of a single and common AS. >>> However it is not obvious why it shall be >>> >>> &address_space_memory and not an AS created on purpose. >> We tried creating an AS, but it was not straightforward to share across vSMMU >> instances, as most of the structures are per vSMMU. >> >> Only SMMUv3Class seems to be shared across vSMMU instances, but it >> doesn't seem to be the good place to hold an AS pointer either. >> >> The global @address_space_memory is provisioned as the system AS, so it's >> easy to use. > We had discussed this previously here, > https://lore.kernel.org/qemu-devel/aJKn650gOGQh2whD@Asurada-Nvidia/ Thank you for the pointer. I definitively missed that thread. Seems Peter was not very keen either to use the address_space_memory. Why can't we use a global variable in smmu-accel.c ? in hw/vfio/container.c there is a list of VFIOAddressSpace for instance. Is there anything wrong doing that? Thanks Eric Eric > > Thanks, > Shameer >