From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53848) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gWO97-0006kR-5k for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:11:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gWO93-0007Qg-L9 for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:11:01 -0500 Received: from mx1.redhat.com ([209.132.183.28]:49656) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gWO93-0007PX-87 for qemu-devel@nongnu.org; Mon, 10 Dec 2018 11:10:57 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7A5E430832E3 for ; Mon, 10 Dec 2018 16:10:55 +0000 (UTC) References: <20181207170400.5129-1-philmd@redhat.com> <20181207170400.5129-5-philmd@redhat.com> From: Laszlo Ersek Message-ID: <8ec2e7fd-bf8e-e537-6a9c-905312bafc94@redhat.com> Date: Mon, 10 Dec 2018 17:10:40 +0100 MIME-Version: 1.0 In-Reply-To: <20181207170400.5129-5-philmd@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 4/6] hw/nvram/fw_cfg: Add trace events List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , "Michael S . Tsirkin" Cc: qemu-devel@nongnu.org, Igor Mammedov , Eduardo Habkost , Gerd Hoffmann On 12/07/18 18:03, Philippe Mathieu-Daud=C3=A9 wrote: > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > hw/nvram/fw_cfg.c | 5 +++++ > hw/nvram/trace-events | 5 +++++ > 2 files changed, 10 insertions(+) >=20 > diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c > index 3cb726ff68..582653f07e 100644 > --- a/hw/nvram/fw_cfg.c > +++ b/hw/nvram/fw_cfg.c > @@ -627,6 +627,7 @@ static void *fw_cfg_modify_bytes_read(FWCfgState *s= , uint16_t key, > =20 > void fw_cfg_add_bytes(FWCfgState *s, uint16_t key, void *data, size_t = len) > { > + trace_fw_cfg_add_bytes(key, len); > fw_cfg_add_bytes_callback(s, key, NULL, NULL, NULL, data, len, tru= e); > } > =20 > @@ -634,6 +635,7 @@ void fw_cfg_add_string(FWCfgState *s, uint16_t key,= const char *value) > { > size_t sz =3D strlen(value) + 1; > =20 > + trace_fw_cfg_add_string(key, value); > fw_cfg_add_bytes(s, key, g_memdup(value, sz), sz); > } > =20 > @@ -643,6 +645,7 @@ void fw_cfg_add_i16(FWCfgState *s, uint16_t key, ui= nt16_t value) > =20 > copy =3D g_malloc(sizeof(value)); > *copy =3D cpu_to_le16(value); > + trace_fw_cfg_add_i16(key, value); > fw_cfg_add_bytes(s, key, copy, sizeof(value)); > } > =20 > @@ -662,6 +665,7 @@ void fw_cfg_add_i32(FWCfgState *s, uint16_t key, ui= nt32_t value) > =20 > copy =3D g_malloc(sizeof(value)); > *copy =3D cpu_to_le32(value); > + trace_fw_cfg_add_i32(key, value); > fw_cfg_add_bytes(s, key, copy, sizeof(value)); > } > =20 > @@ -671,6 +675,7 @@ void fw_cfg_add_i64(FWCfgState *s, uint16_t key, ui= nt64_t value) > =20 > copy =3D g_malloc(sizeof(value)); > *copy =3D cpu_to_le64(value); > + trace_fw_cfg_add_i64(key, value); > fw_cfg_add_bytes(s, key, copy, sizeof(value)); > } > =20 > diff --git a/hw/nvram/trace-events b/hw/nvram/trace-events > index 6b55ba7a09..0ee0f8d04a 100644 > --- a/hw/nvram/trace-events > +++ b/hw/nvram/trace-events > @@ -7,4 +7,9 @@ nvram_write(uint32_t addr, uint32_t old, uint32_t val) = "write addr %d: 0x%02x -> > # hw/nvram/fw_cfg.c > fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d =3D %d" > fw_cfg_read(void *s, uint64_t ret) "%p =3D 0x%"PRIx64 > +fw_cfg_add_bytes(uint16_t key, size_t len) "key 0x%04" PRIx16 " (%zu b= ytes)" > fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %= s (%zd bytes)" > +fw_cfg_add_string(uint16_t key, const char *value) "key 0x%04" PRIx16 = ", value '%s'" > +fw_cfg_add_i16(uint16_t key, uint32_t value) "key 0x%04" PRIx16 ", val= ue 0x%" PRIx32 For the "value" parameter, you should use "uint16_t" here (and replace PRIx32 with PRIx16, as well). (In practice this will make no difference, but for consistency's sake, we should do this.) With the update: Reviewed-by: Laszlo Ersek Thanks Laszlo > +fw_cfg_add_i32(uint16_t key, uint32_t value) "key 0x%04" PRIx16 ", val= ue 0x%" PRIx32 > +fw_cfg_add_i64(uint16_t key, uint64_t value) "key 0x%04" PRIx16 ", val= ue 0x%" PRIx64 >=20