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([2602:ae:1598:4c01:7d0c:4d62:710d:ff28]) by smtp.gmail.com with ESMTPSA id jk19-20020a170903331300b001b0aec3ed59sm4867465plb.256.2023.06.04.09.58.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 04 Jun 2023 09:58:17 -0700 (PDT) Message-ID: <8f706ba2-7993-bf96-9be2-a37ecb4ca8d7@linaro.org> Date: Sun, 4 Jun 2023 09:58:15 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 2/4] target/ppc: Ensure stcx size matches larx Content-Language: en-US To: Nicholas Piggin , Daniel Henrique Barboza Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, qemu-stable@nongnu.org References: <20230604102858.148584-1-npiggin@gmail.com> <20230604102858.148584-2-npiggin@gmail.com> From: Richard Henderson In-Reply-To: <20230604102858.148584-2-npiggin@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::22f; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22f.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org > @@ -3584,6 +3588,7 @@ static void gen_load_locked(DisasContext *ctx, MemOp memop) > gen_set_access_type(ctx, ACCESS_RES); > gen_addr_reg_index(ctx, t0); > tcg_gen_mov_tl(cpu_reserve, t0); > + tcg_gen_movi_tl(cpu_reserve_size, memop_size(memop)); Not that it really matters, this produces a byte value... > @@ -3873,6 +3879,7 @@ static void gen_lqarx(DisasContext *ctx) > EA = tcg_temp_new(); > gen_addr_reg_index(ctx, EA); > tcg_gen_mov_tl(cpu_reserve, EA); > + tcg_gen_movi_tl(cpu_reserve_size, 128); ... so perhaps ideally this would be 16. Perhaps name it reserve_length to exactly match the manual. Otherwise, Reviewed-by: Richard Henderson r~