From: Paolo Bonzini <pbonzini@redhat.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: cfontana@suse.de, f4bug@amsat.org, ehabkost@redhat.com
Subject: Re: [PATCH v2 01/50] target/i386: Split out gen_exception_gpf
Date: Tue, 18 May 2021 11:08:52 +0200 [thread overview]
Message-ID: <8fe45dcf-ccbf-05cc-4b92-683a2f159abd@redhat.com> (raw)
In-Reply-To: <20210514151342.384376-2-richard.henderson@linaro.org>
On 14/05/21 17:12, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/i386/tcg/translate.c | 68 ++++++++++++++++++++-----------------
> 1 file changed, 37 insertions(+), 31 deletions(-)
>
> diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
> index db56a48343..2672e08197 100644
> --- a/target/i386/tcg/translate.c
> +++ b/target/i386/tcg/translate.c
> @@ -1276,6 +1276,12 @@ static void gen_illegal_opcode(DisasContext *s)
> gen_exception(s, EXCP06_ILLOP, s->pc_start - s->cs_base);
> }
>
> +/* Generate #GP for the current instruction. */
> +static void gen_exception_gpf(DisasContext *s)
> +{
> + gen_exception(s, EXCP0D_GPF, s->pc_start - s->cs_base);
> +}
> +
> /* if d == OR_TMP0, it means memory operand (address in A0) */
> static void gen_op(DisasContext *s1, int op, MemOp ot, int d)
> {
> @@ -4502,7 +4508,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> s->vex_l = 0;
> s->vex_v = 0;
> if (sigsetjmp(s->jmpbuf, 0) != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> return s->pc;
> }
>
> @@ -6567,7 +6573,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> set_cc_op(s, CC_OP_EFLAGS);
> } else if (s->vm86) {
> if (s->iopl != 3) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
> set_cc_op(s, CC_OP_EFLAGS);
> @@ -6689,7 +6695,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> case 0x9c: /* pushf */
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_PUSHF);
> if (s->vm86 && s->iopl != 3) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_update_cc_op(s);
> gen_helper_read_eflags(s->T0, cpu_env);
> @@ -6699,7 +6705,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> case 0x9d: /* popf */
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_POPF);
> if (s->vm86 && s->iopl != 3) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> ot = gen_pop_T0(s);
> if (s->cpl == 0) {
> @@ -7061,7 +7067,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> case 0xcd: /* int N */
> val = x86_ldub_code(env, s);
> if (s->vm86 && s->iopl != 3) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_interrupt(s, val, pc_start - s->cs_base, s->pc - s->cs_base);
> }
> @@ -7084,13 +7090,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> if (s->cpl <= s->iopl) {
> gen_helper_cli(cpu_env);
> } else {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> }
> } else {
> if (s->iopl == 3) {
> gen_helper_cli(cpu_env);
> } else {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> }
> }
> break;
> @@ -7101,7 +7107,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> gen_jmp_im(s, s->pc - s->cs_base);
> gen_eob_inhibit_irq(s, true);
> } else {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> }
> break;
> case 0x62: /* bound */
> @@ -7194,7 +7200,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> case 0x130: /* wrmsr */
> case 0x132: /* rdmsr */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_update_cc_op(s);
> gen_jmp_im(s, pc_start - s->cs_base);
> @@ -7226,7 +7232,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1)
> goto illegal_op;
> if (!s->pe) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_helper_sysenter(cpu_env);
> gen_eob(s);
> @@ -7237,7 +7243,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1)
> goto illegal_op;
> if (!s->pe) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_helper_sysexit(cpu_env, tcg_const_i32(dflag - 1));
> gen_eob(s);
> @@ -7256,7 +7262,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> break;
> case 0x107: /* sysret */
> if (!s->pe) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_helper_sysret(cpu_env, tcg_const_i32(dflag - 1));
> /* condition codes are modified only in long mode */
> @@ -7278,7 +7284,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> break;
> case 0xf4: /* hlt */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_update_cc_op(s);
> gen_jmp_im(s, pc_start - s->cs_base);
> @@ -7304,7 +7310,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> if (!s->pe || s->vm86)
> goto illegal_op;
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE);
> gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
> @@ -7325,7 +7331,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> if (!s->pe || s->vm86)
> goto illegal_op;
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE);
> gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
> @@ -7441,7 +7447,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX],
> @@ -7458,7 +7464,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_update_cc_op(s);
> @@ -7483,7 +7489,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_update_cc_op(s);
> @@ -7496,7 +7502,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_update_cc_op(s);
> @@ -7511,7 +7517,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_update_cc_op(s);
> @@ -7525,7 +7531,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_update_cc_op(s);
> @@ -7549,7 +7555,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_update_cc_op(s);
> @@ -7559,7 +7565,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>
> CASE_MODRM_MEM_OP(2): /* lgdt */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_WRITE);
> @@ -7576,7 +7582,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>
> CASE_MODRM_MEM_OP(3): /* lidt */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_WRITE);
> @@ -7622,7 +7628,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> break;
> CASE_MODRM_OP(6): /* lmsw */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
> @@ -7634,7 +7640,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>
> CASE_MODRM_MEM_OP(7): /* invlpg */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> break;
> }
> gen_update_cc_op(s);
> @@ -7649,7 +7655,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> #ifdef TARGET_X86_64
> if (CODE64(s)) {
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> tcg_gen_mov_tl(s->T0, cpu_seg_base[R_GS]);
> tcg_gen_ld_tl(cpu_seg_base[R_GS], cpu_env,
> @@ -7685,7 +7691,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> case 0x108: /* invd */
> case 0x109: /* wbinvd */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_svm_check_intercept(s, pc_start, (b & 2) ? SVM_EXIT_INVD : SVM_EXIT_WBINVD);
> /* nothing to do */
> @@ -8009,7 +8015,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> case 0x120: /* mov reg, crN */
> case 0x122: /* mov crN, reg */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> modrm = x86_ldub_code(env, s);
> /* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
> @@ -8063,7 +8069,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> case 0x121: /* mov reg, drN */
> case 0x123: /* mov drN, reg */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> #ifndef CONFIG_USER_ONLY
> modrm = x86_ldub_code(env, s);
> @@ -8099,7 +8105,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> break;
> case 0x106: /* clts */
> if (s->cpl != 0) {
> - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> + gen_exception_gpf(s);
> } else {
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
> gen_helper_clts(cpu_env);
>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
next prev parent reply other threads:[~2021-05-18 9:21 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-14 15:12 [PATCH v2 00/50] target/i386 translate cleanups Richard Henderson
2021-05-14 15:12 ` [PATCH v2 01/50] target/i386: Split out gen_exception_gpf Richard Henderson
2021-05-18 9:08 ` Paolo Bonzini [this message]
2021-05-14 15:12 ` [PATCH v2 02/50] target/i386: Split out check_cpl0 Richard Henderson
2021-05-18 9:10 ` Paolo Bonzini
2021-05-14 15:12 ` [PATCH v2 03/50] target/i386: Unify code paths for IRET Richard Henderson
2021-05-18 9:11 ` Paolo Bonzini
2021-05-14 15:12 ` [PATCH v2 04/50] target/i386: Split out check_vm86_iopl Richard Henderson
2021-05-18 9:48 ` Paolo Bonzini
2021-05-14 15:12 ` [PATCH v2 05/50] target/i386: Split out check_iopl Richard Henderson
2021-05-18 9:14 ` Paolo Bonzini
2021-05-14 15:12 ` [PATCH v2 06/50] target/i386: Assert PE is set for user-only Richard Henderson
2021-05-18 9:15 ` Paolo Bonzini
2021-05-14 15:12 ` [PATCH v2 07/50] target/i386: Assert CPL is 3 " Richard Henderson
2021-05-18 9:17 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 08/50] target/i386: Assert IOPL is 0 " Richard Henderson
2021-05-18 9:18 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 09/50] target/i386: Assert !VM86 for x86_64 user-only Richard Henderson
2021-05-18 9:19 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 10/50] target/i386: Assert CODE32 " Richard Henderson
2021-05-18 9:20 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 11/50] target/i386: Assert SS32 " Richard Henderson
2021-05-18 9:20 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 12/50] target/i386: Assert CODE64 " Richard Henderson
2021-05-18 9:21 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 13/50] target/i386: Assert LMA " Richard Henderson
2021-05-18 9:21 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 14/50] target/i386: Assert !ADDSEG " Richard Henderson
2021-05-18 9:23 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 15/50] target/i386: Introduce REX_PREFIX Richard Henderson
2021-05-18 9:26 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 16/50] target/i386: Tidy REX_B, REX_X definition Richard Henderson
2021-05-18 9:28 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 17/50] target/i386: Move rex_r into DisasContext Richard Henderson
2021-05-18 9:28 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 18/50] target/i386: Move rex_w " Richard Henderson
2021-05-18 9:30 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 19/50] target/i386: Remove DisasContext.f_st as unused Richard Henderson
2021-05-18 9:30 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 20/50] target/i386: Reduce DisasContext.flags to uint32_t Richard Henderson
2021-05-18 9:30 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 21/50] target/i386: Reduce DisasContext.override to int8_t Richard Henderson
2021-05-18 9:31 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 22/50] target/i386: Reduce DisasContext.prefix to uint8_t Richard Henderson
2021-05-18 9:31 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 23/50] target/i386: Reduce DisasContext.vex_[lv] " Richard Henderson
2021-05-18 9:32 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 24/50] target/i386: Reduce DisasContext popl_esp_hack and rip_offset " Richard Henderson
2021-05-18 9:34 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 25/50] target/i386: Leave TF in DisasContext.flags Richard Henderson
2021-05-18 9:36 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 26/50] target/i386: Reduce DisasContext jmp_opt, repz_opt to bool Richard Henderson
2021-05-18 9:36 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 27/50] target/i386: Fix the comment for repz_opt Richard Henderson
2021-05-18 9:48 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 28/50] target/i386: Reorder DisasContext members Richard Henderson
2021-05-18 9:49 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 29/50] target/i386: Add stub generator for helper_set_dr Richard Henderson
2021-05-18 9:49 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 30/50] target/i386: Assert !SVME for user-only Richard Henderson
2021-05-18 9:51 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 31/50] target/i386: Assert !GUEST " Richard Henderson
2021-05-18 9:51 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 32/50] target/i386: Implement skinit in translate.c Richard Henderson
2021-05-18 9:51 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 33/50] target/i386: Eliminate SVM helpers for user-only Richard Henderson
2021-05-18 9:52 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 34/50] target/i386: Mark some helpers as noreturn Richard Henderson
2021-05-18 9:56 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 35/50] target/i386: Simplify gen_debug usage Richard Henderson
2021-05-18 9:56 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 36/50] target/i386: Tidy svm_check_intercept from tcg Richard Henderson
2021-05-18 9:57 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 37/50] target/i386: Remove pc_start argument to gen_svm_check_intercept Richard Henderson
2021-05-18 9:58 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 38/50] target/i386: Remove user stub for cpu_vmexit Richard Henderson
2021-05-18 9:58 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 39/50] target/i386: Cleanup read_crN, write_crN, lmsw Richard Henderson
2021-05-18 10:30 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 40/50] target/i386: Pass env to do_pause and do_hlt Richard Henderson
2021-05-18 9:59 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 41/50] target/i386: Move invlpg, hlt, monitor, mwait to sysemu Richard Henderson
2021-05-18 10:00 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 42/50] target/i386: Unify invlpg, invlpga Richard Henderson
2021-05-18 10:00 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 43/50] target/i386: Inline user cpu_svm_check_intercept_param Richard Henderson
2021-05-18 10:01 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 44/50] target/i386: Eliminate user stubs for read/write_crN, rd/wrmsr Richard Henderson
2021-05-18 10:01 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 45/50] target/i386: Exit tb after wrmsr Richard Henderson
2021-05-18 10:02 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 46/50] target/i386: Tidy gen_check_io Richard Henderson
2021-05-18 10:18 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 47/50] target/i386: Pass in port to gen_check_io Richard Henderson
2021-05-18 10:20 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 48/50] target/i386: Create helper_check_io Richard Henderson
2021-05-18 10:21 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 49/50] target/i386: Move helper_check_io to sysemu Richard Henderson
2021-05-14 17:45 ` Richard Henderson
2021-05-18 10:22 ` Paolo Bonzini
2021-05-14 15:13 ` [PATCH v2 50/50] target/i386: Remove user-only i/o stubs Richard Henderson
2021-05-18 10:23 ` Paolo Bonzini
2021-05-14 16:09 ` [PATCH v2 00/50] target/i386 translate cleanups no-reply
2021-05-18 10:31 ` Paolo Bonzini
2021-05-18 10:59 ` Richard Henderson
2021-05-18 12:33 ` Paolo Bonzini
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