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[83.42.66.34]) by smtp.gmail.com with ESMTPSA id w13sm16640128wru.38.2019.12.14.21.44.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 14 Dec 2019 21:44:26 -0800 (PST) Subject: Re: [PATCH v4 34/37] omap-gpio: remove PROP_PTR To: =?UTF-8?Q?Marc-Andr=c3=a9_Lureau?= , qemu-devel@nongnu.org References: <20191120152442.26657-1-marcandre.lureau@redhat.com> <20191120152442.26657-35-marcandre.lureau@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <904a5fd6-4b16-9f51-b6eb-0f45e451ccf7@redhat.com> Date: Sun, 15 Dec 2019 06:44:25 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: <20191120152442.26657-35-marcandre.lureau@redhat.com> Content-Language: en-US X-MC-Unique: us7ENQatOeGLhWfDa85xEw-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/20/19 4:24 PM, Marc-Andr=C3=A9 Lureau wrote: > Since clocks are not QOM objects, replace PROP_PTR of clocks with > setters methods. >=20 > Move/adapt the existing TODO comment about a clock framework. >=20 > Reviewed-by: Peter Maydell > Signed-off-by: Marc-Andr=C3=A9 Lureau > --- > hw/arm/omap1.c | 2 +- > hw/arm/omap2.c | 13 +++++++------ > hw/gpio/omap_gpio.c | 42 +++++++++++++++--------------------------- > include/hw/arm/omap.h | 33 +++++++++++++++++++++++++++++---- > 4 files changed, 52 insertions(+), 38 deletions(-) >=20 > diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c > index 807e5f70d1..761cc17ea9 100644 > --- a/hw/arm/omap1.c > +++ b/hw/arm/omap1.c > @@ -4012,7 +4012,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryReg= ion *dram, > =20 > s->gpio =3D qdev_create(NULL, "omap-gpio"); > qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); > - qdev_prop_set_ptr(s->gpio, "clk", omap_findclk(s, "arm_gpio_ck")); > + omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck"= )); > qdev_init_nofail(s->gpio); > sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0, > qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1))= ; > diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c > index 171e2d0472..e1c11de5ce 100644 > --- a/hw/arm/omap2.c > +++ b/hw/arm/omap2.c > @@ -2449,13 +2449,14 @@ struct omap_mpu_state_s *omap2420_mpu_init(Memory= Region *sdram, > =20 > s->gpio =3D qdev_create(NULL, "omap2-gpio"); > qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); > - qdev_prop_set_ptr(s->gpio, "iclk", omap_findclk(s, "gpio_iclk")); > - qdev_prop_set_ptr(s->gpio, "fclk0", omap_findclk(s, "gpio1_dbclk")); > - qdev_prop_set_ptr(s->gpio, "fclk1", omap_findclk(s, "gpio2_dbclk")); > - qdev_prop_set_ptr(s->gpio, "fclk2", omap_findclk(s, "gpio3_dbclk")); > - qdev_prop_set_ptr(s->gpio, "fclk3", omap_findclk(s, "gpio4_dbclk")); > + omap2_gpio_set_iclk(OMAP2_GPIO(s->gpio), omap_findclk(s, "gpio_iclk"= )); > + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 0, omap_findclk(s, "gpio1_d= bclk")); > + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 1, omap_findclk(s, "gpio2_d= bclk")); > + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 2, omap_findclk(s, "gpio3_d= bclk")); > + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 3, omap_findclk(s, "gpio4_d= bclk")); > if (s->mpu_model =3D=3D omap2430) { > - qdev_prop_set_ptr(s->gpio, "fclk4", omap_findclk(s, "gpio5_dbclk= ")); > + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 4, > + omap_findclk(s, "gpio5_dbclk")); > } > qdev_init_nofail(s->gpio); > busdev =3D SYS_BUS_DEVICE(s->gpio); > diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c > index 41e1aa798c..85c16897ae 100644 > --- a/hw/gpio/omap_gpio.c > +++ b/hw/gpio/omap_gpio.c > @@ -40,10 +40,6 @@ struct omap_gpio_s { > uint16_t pins; > }; > =20 > -#define TYPE_OMAP1_GPIO "omap-gpio" > -#define OMAP1_GPIO(obj) \ > - OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) > - > struct omap_gpif_s { > SysBusDevice parent_obj; > =20 > @@ -212,10 +208,6 @@ struct omap2_gpio_s { > uint8_t delay; > }; > =20 > -#define TYPE_OMAP2_GPIO "omap2-gpio" > -#define OMAP2_GPIO(obj) \ > - OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) > - > struct omap2_gpif_s { > SysBusDevice parent_obj; > =20 > @@ -747,21 +739,13 @@ static void omap2_gpio_realize(DeviceState *dev, Er= ror **errp) > } > } > =20 > -/* Using qdev pointer properties for the clocks is not ideal. > - * qdev should support a generic means of defining a 'port' with > - * an arbitrary interface for connecting two devices. Then we > - * could reframe the omap clock API in terms of clock ports, > - * and get some type safety. For now the best qdev provides is > - * passing an arbitrary pointer. > - * (It's not possible to pass in the string which is the clock > - * name, because this device does not have the necessary information > - * (ie the struct omap_mpu_state_s*) to do the clockname to pointer > - * translation.) > - */ > +void omap_gpio_set_clk(omap_gpif *gpio, omap_clk clk) > +{ > + gpio->clk =3D clk; > +} > =20 > static Property omap_gpio_properties[] =3D { > DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0), > - DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk), > DEFINE_PROP_END_OF_LIST(), > }; > =20 > @@ -784,15 +768,19 @@ static const TypeInfo omap_gpio_info =3D { > .class_init =3D omap_gpio_class_init, > }; > =20 > +void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk) > +{ > + gpio->iclk =3D clk; > +} > + > +void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk) > +{ > + assert(i <=3D 5); > + gpio->fclk[i] =3D clk; > +} > + > static Property omap2_gpio_properties[] =3D { > DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0), > - DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk), > - DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]), > - DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]), > - DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]), > - DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]), > - DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]), > - DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]), > DEFINE_PROP_END_OF_LIST(), > }; > =20 > diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h > index 39a295ba20..6be386d0e2 100644 > --- a/include/hw/arm/omap.h > +++ b/include/hw/arm/omap.h > @@ -77,6 +77,16 @@ typedef struct omap_intr_handler_s omap_intr_handler; > /* > * TODO: Ideally we should have a clock framework that > * let us wire these clocks up with QOM properties or links. > + * > + * qdev should support a generic means of defining a 'port' with > + * an arbitrary interface for connecting two devices. Then we > + * could reframe the omap clock API in terms of clock ports, > + * and get some type safety. For now the best qdev provides is > + * passing an arbitrary pointer. > + * (It's not possible to pass in the string which is the clock > + * name, because this device does not have the necessary information > + * (ie the struct omap_mpu_state_s*) to do the clockname to pointer > + * translation.) > */ > void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk); > void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk); > @@ -87,13 +97,28 @@ void omap_intc_set_fclk(omap_intr_handler *intc, omap= _clk clk); > =20 > typedef struct OMAPI2CState OMAPI2CState; > =20 > -/* > - * TODO: Ideally we should have a clock framework that > - * let us wire these clocks up with QOM properties or links. > - */ > +/* TODO: clock framework (see above) */ > void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk); > void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk); > =20 > +/* omap_gpio.c */ > +#define TYPE_OMAP1_GPIO "omap-gpio" > +#define OMAP1_GPIO(obj) \ > + OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) > + > +#define TYPE_OMAP2_GPIO "omap2-gpio" > +#define OMAP2_GPIO(obj) \ > + OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) > + > +typedef struct omap_gpif_s omap_gpif; > +typedef struct omap2_gpif_s omap2_gpif; > + > +/* TODO: clock framework (see above) */ > +void omap_gpio_set_clk(omap_gpif *gpio, omap_clk clk); > + > +void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk); > +void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk); > + > /* OMAP2 l4 Interconnect */ > struct omap_l4_s; > struct omap_l4_region_s { >=20 Reviewed-by: Philippe Mathieu-Daud=C3=A9