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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: Daniel Henrique Barboza <danielhb413@gmail.com>
Subject: Re: [PATCH 10/13] ppc4xx_pci: Add define for ppc4xx-host-bridge type name
Date: Tue, 4 Jul 2023 10:57:19 +0200	[thread overview]
Message-ID: <9058d248-1fe5-f47b-30ab-0ef3bcbef5cf@linaro.org> (raw)
In-Reply-To: <eecc7ae1c5f576f74c1b919e8d7f798fc8a7e6ac.1688421085.git.balaton@eik.bme.hu>

On 4/7/23 00:02, BALATON Zoltan wrote:
> Add a QOM type name define for ppc4xx-host-bridge in the common header
> and replace direct use of the string name with the constant.
> 
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
>   hw/ppc/ppc440_pcix.c    | 3 ++-
>   hw/ppc/ppc4xx_pci.c     | 4 ++--
>   include/hw/ppc/ppc4xx.h | 1 +
>   3 files changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c
> index f10f93c533..dfec25ac83 100644
> --- a/hw/ppc/ppc440_pcix.c
> +++ b/hw/ppc/ppc440_pcix.c
> @@ -495,7 +495,8 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp)
>                            ppc440_pcix_map_irq, &s->irq, &s->busmem,
>                            get_system_io(), PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS);
>   
> -    s->dev = pci_create_simple(h->bus, PCI_DEVFN(0, 0), "ppc4xx-host-bridge");
> +    s->dev = pci_create_simple(h->bus, PCI_DEVFN(0, 0),
> +                               TYPE_PPC4xx_HOST_BRIDGE);
>   
>       memory_region_init(&s->bm, OBJECT(s), "bm-ppc440-pcix", UINT64_MAX);
>       memory_region_add_subregion(&s->bm, 0x0, &s->busmem);
> diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
> index fbdf8266d8..6652119008 100644
> --- a/hw/ppc/ppc4xx_pci.c
> +++ b/hw/ppc/ppc4xx_pci.c
> @@ -333,7 +333,7 @@ static void ppc4xx_pcihost_realize(DeviceState *dev, Error **errp)
>                                 TYPE_PCI_BUS);
>       h->bus = b;
>   
> -    pci_create_simple(b, 0, "ppc4xx-host-bridge");
> +    pci_create_simple(b, 0, TYPE_PPC4xx_HOST_BRIDGE);
>   
>       /* XXX split into 2 memory regions, one for config space, one for regs */
>       memory_region_init(&s->container, OBJECT(s), "pci-container", PCI_ALL_SIZE);
> @@ -367,7 +367,7 @@ static void ppc4xx_host_bridge_class_init(ObjectClass *klass, void *data)
>   }
>   
>   static const TypeInfo ppc4xx_host_bridge_info = {
> -    .name          = "ppc4xx-host-bridge",
> +    .name          = TYPE_PPC4xx_HOST_BRIDGE,
>       .parent        = TYPE_PCI_DEVICE,
>       .instance_size = sizeof(PCIDevice),
>       .class_init    = ppc4xx_host_bridge_class_init,
> diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
> index e053b9751b..766d575e86 100644
> --- a/include/hw/ppc/ppc4xx.h
> +++ b/include/hw/ppc/ppc4xx.h
> @@ -29,6 +29,7 @@
>   #include "exec/memory.h"
>   #include "hw/sysbus.h"
>   
> +#define TYPE_PPC4xx_HOST_BRIDGE "ppc4xx-host-bridge"

This is the function #0 of the host bridge, maybe:

#define TYPE_PPC4xx_HOST_BRIDGE_FN0 "ppc4xx-pci-host-bridge-fn0"

>   #define TYPE_PPC4xx_PCI_HOST "ppc4xx-pci-host"
>   #define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host"
>   



  reply	other threads:[~2023-07-04  8:58 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-03 22:02 [PATCH 00/13] PPC440 devices misc clean up BALATON Zoltan
2023-07-03 22:02 ` [PATCH 01/13] ppc440: Change ppc460ex_pcie_init() parameter type BALATON Zoltan
2023-07-04  8:48   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 02/13] ppc440: Add cpu link property to PCIe controller model BALATON Zoltan
2023-07-04  8:46   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 03/13] ppc440: Add a macro to shorten PCIe controller DCR registration BALATON Zoltan
2023-07-04  8:49   ` Philippe Mathieu-Daudé
2023-07-04  9:33     ` BALATON Zoltan
2023-07-04  9:55       ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 04/13] ppc440: Rename local variable in dcr_read_pcie() BALATON Zoltan
2023-07-04  8:50   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 05/13] ppc440: Stop using system io region for PCIe buses BALATON Zoltan
2023-07-04  8:51   ` Philippe Mathieu-Daudé
2023-07-04  9:48     ` BALATON Zoltan
2023-07-03 22:02 ` [PATCH 06/13] sam460ex: Remove address_space_mem local variable BALATON Zoltan
2023-07-03 22:02 ` [PATCH 07/13] ppc440: Add busnum property to PCIe controller model BALATON Zoltan
2023-07-04  8:52   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 08/13] ppc440: Remove ppc460ex_pcie_init legacy init function BALATON Zoltan
2023-07-04  8:53   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 09/13] ppc4xx_pci: Rename QOM type name define BALATON Zoltan
2023-07-04  8:56   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 10/13] ppc4xx_pci: Add define for ppc4xx-host-bridge type name BALATON Zoltan
2023-07-04  8:57   ` Philippe Mathieu-Daudé [this message]
2023-07-04  9:36     ` BALATON Zoltan
2023-07-03 22:02 ` [PATCH 11/13] ppc440_pcix: Rename QOM type define abd move it to common header BALATON Zoltan
2023-07-04  8:58   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 12/13] ppc440_pcix: Don't use iomem for regs BALATON Zoltan
2023-07-04  8:59   ` Philippe Mathieu-Daudé
2023-07-04  9:37     ` BALATON Zoltan
2023-07-04  9:57       ` Philippe Mathieu-Daudé
2023-07-04 10:14         ` BALATON Zoltan
2023-07-03 22:02 ` [PATCH 13/13] ppc440_pcix: Stop using system io region for PCI bus BALATON Zoltan
2023-07-04  9:01   ` Philippe Mathieu-Daudé

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