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[216.180.64.156]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2ea024c0739sm1642008a91.37.2024.11.14.10.57.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Nov 2024 10:57:18 -0800 (PST) Message-ID: <906235d3-167b-4cba-b054-6fbd294772f5@linaro.org> Date: Thu, 14 Nov 2024 10:57:18 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 53/54] accel/tcg: Merge tlb_fill_align into callers Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org References: <20241114160131.48616-1-richard.henderson@linaro.org> <20241114160131.48616-54-richard.henderson@linaro.org> From: Pierrick Bouvier In-Reply-To: <20241114160131.48616-54-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 11/14/24 08:01, Richard Henderson wrote: > In tlb_lookup, we still call tlb_set_page_full. > In atomic_mmu_lookup, we're expecting noreturn. > > Signed-off-by: Richard Henderson > --- > accel/tcg/cputlb.c | 31 ++++++------------------------- > 1 file changed, 6 insertions(+), 25 deletions(-) > > diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c > index 3d731b8f3d..20af48c6c5 100644 > --- a/accel/tcg/cputlb.c > +++ b/accel/tcg/cputlb.c > @@ -1189,27 +1189,6 @@ static void tlb_set_page_full(CPUState *cpu, int mmu_idx, > qemu_spin_unlock(&tlb->c.lock); > } > > -/* > - * Note: tlb_fill_align() can trigger a resize of the TLB. > - * This means that all of the caller's prior references to the TLB table > - * (e.g. CPUTLBEntry pointers) must be discarded and looked up again > - * (e.g. via tlb_entry()). > - */ > -static bool tlb_fill_align(CPUState *cpu, vaddr addr, MMUAccessType type, > - int mmu_idx, MemOp memop, int size, > - bool probe, uintptr_t ra) > -{ > - CPUTLBEntryFull full; > - > - if (cpu->cc->tcg_ops->tlb_fill_align(cpu, &full, addr, type, mmu_idx, > - memop, size, probe, ra)) { > - tlb_set_page_full(cpu, mmu_idx, addr, &full); > - return true; > - } > - assert(probe); > - return false; > -} > - > static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr, > MMUAccessType access_type, > int mmu_idx, uintptr_t retaddr) > @@ -1281,11 +1260,13 @@ static bool tlb_lookup(CPUState *cpu, TLBLookupOutput *o, > } > > /* Finally, query the target hook. */ > - if (!tlb_fill_align(cpu, addr, access_type, i->mmu_idx, > - memop, i->size, probe, i->ra)) { > + if (!cpu->cc->tcg_ops->tlb_fill_align(cpu, &o->full, addr, access_type, > + i->mmu_idx, memop, i->size, > + probe, i->ra)) { > tcg_debug_assert(probe); > return false; > } > + tlb_set_page_full(cpu, i->mmu_idx, addr, &o->full); > o->did_tlb_fill = true; > > if (access_type == MMU_INST_FETCH) { > @@ -1794,8 +1775,8 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi, > * We have just verified that the page is writable. > */ > if (unlikely(!(o.full.prot & PAGE_READ))) { > - tlb_fill_align(cpu, addr, MMU_DATA_LOAD, i.mmu_idx, > - 0, i.size, false, i.ra); > + cpu->cc->tcg_ops->tlb_fill_align(cpu, &o.full, addr, MMU_DATA_LOAD, > + i.mmu_idx, 0, i.size, false, i.ra); > /* > * Since we don't support reads and writes to different > * addresses, and we do have the proper page loaded for Reviewed-by: Pierrick Bouvier