From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Inès Varhol" <ines.varhol@telecom-paris.fr>, qemu-devel@nongnu.org
Cc: Alistair Francis <alistair@alistair23.me>,
Arnaud Minier <arnaud.minier@telecom-paris.fr>,
Peter Maydell <peter.maydell@linaro.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Laurent Vivier <lvivier@redhat.com>,
Thomas Huth <thuth@redhat.com>,
qemu-arm@nongnu.org
Subject: Re: [PATCH v5 1/3] hw/misc: Implement STM32L4x5 EXTI
Date: Thu, 4 Jan 2024 14:14:23 +0100 [thread overview]
Message-ID: <908650b4-3bb2-4cf2-8909-5bffc622950f@linaro.org> (raw)
In-Reply-To: <20231228161944.303768-2-ines.varhol@telecom-paris.fr>
On 28/12/23 17:19, Inès Varhol wrote:
> Although very similar to the STM32F4xx EXTI, STM32L4x5 EXTI generates
> more than 32 event/interrupt requests and thus uses more registers
> than STM32F4xx EXTI which generates 23 event/interrupt requests.
>
> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
> ---
> docs/system/arm/b-l475e-iot01a.rst | 5 +-
> hw/misc/Kconfig | 3 +
> hw/misc/meson.build | 1 +
> hw/misc/stm32l4x5_exti.c | 288 +++++++++++++++++++++++++++++
> hw/misc/trace-events | 5 +
> include/hw/misc/stm32l4x5_exti.h | 51 +++++
> 6 files changed, 350 insertions(+), 3 deletions(-)
> create mode 100644 hw/misc/stm32l4x5_exti.c
> create mode 100644 include/hw/misc/stm32l4x5_exti.h
> +static void stm32l4x5_exti_write(void *opaque, hwaddr addr,
> + uint64_t val64, unsigned int size)
> +{
> + Stm32l4x5ExtiState *s = opaque;
> + const uint32_t value = (uint32_t)val64;
> +
> + trace_stm32l4x5_exti_write(addr, value);
> +
> + switch (addr) {
> + case EXTI_IMR1:
> + s->imr[0] = value;
> + return;
> + case EXTI_EMR1:
> + s->emr[0] = value;
> + return;
> + case EXTI_RTSR1:
> + s->rtsr[0] = value & ~DIRECT_LINE_MASK1;
> + return;
> + case EXTI_FTSR1:
> + s->ftsr[0] = value & ~DIRECT_LINE_MASK1;
> + return;
> + case EXTI_SWIER1:
> + const uint32_t set1 = value & ~DIRECT_LINE_MASK1;
> + const uint32_t pend1 = set1 & ~s->swier[0] & s->imr[0] & ~s->pr[0];
> + s->swier[0] = set1;
> + s->pr[0] |= pend1;
> + for (int i = 0; i < 32; i++) {
> + if (pend1 & (1 << i)) {
> + qemu_irq_pulse(s->irq[i]);
> + }
> + }
> + return;
> + case EXTI_PR1:
> + const uint32_t cleared1 = s->pr[0] & value & ~DIRECT_LINE_MASK1;
> + /* This bit is cleared by writing a 1 to it */
> + s->pr[0] &= ~cleared1;
> + /* Software triggered interrupts are cleared as well */
> + s->swier[0] &= ~cleared1;
> + return;
> + case EXTI_IMR2:
> + s->imr[1] = value & ~RESERVED_BITS_MASK2;
> + return;
> + case EXTI_EMR2:
> + s->emr[1] = value & ~RESERVED_BITS_MASK2;
> + return;
> + case EXTI_RTSR2:
> + s->rtsr[1] = value & ACTIVABLE_MASK2;
> + return;
> + case EXTI_FTSR2:
> + s->ftsr[1] = value & ACTIVABLE_MASK2;
> + return;
> + case EXTI_SWIER2:
> + const uint32_t set2 = value & ACTIVABLE_MASK2;
> + const uint32_t pend2 = set2 & ~s->swier[1] & s->imr[1] & ~s->pr[1];
> + s->swier[1] = set2;
> + s->pr[1] |= pend2;
> + for (int i = 0; i < 8; i++) {
> + if (pend2 & (1 << i)) {
> + qemu_irq_pulse(s->irq[32 + i]);
> + }
> + }
> + return;
> + case EXTI_PR2:
> + const uint32_t cleared = s->pr[1] & value & ACTIVABLE_MASK2;
> + /* This bit is cleared by writing a 1 to it */
> + s->pr[1] &= ~cleared;
> + /* Software triggered interrupts are cleared as well */
> + s->swier[1] &= ~cleared;
> + return;
> + default:
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "STM32L4X5_exti_write: Bad offset 0x%x\n", (int)addr);
> + }
> +}
This doesn't build:
../../hw/misc/stm32l4x5_exti.c:172:9: error: expected expression
const uint32_t set1 = value & ~DIRECT_LINE_MASK1;
^
../../hw/misc/stm32l4x5_exti.c:173:32: error: use of undeclared
identifier 'set1'
const uint32_t pend1 = set1 & ~s->swier[0] & s->imr[0] & ~s->pr[0];
^
../../hw/misc/stm32l4x5_exti.c:174:23: error: use of undeclared
identifier 'set1'
s->swier[0] = set1;
^
../../hw/misc/stm32l4x5_exti.c:183:9: error: expected expression
const uint32_t cleared1 = s->pr[0] & value & ~DIRECT_LINE_MASK1;
^
../../hw/misc/stm32l4x5_exti.c:185:22: error: use of undeclared
identifier 'cleared1'
s->pr[0] &= ~cleared1;
^
../../hw/misc/stm32l4x5_exti.c:187:25: error: use of undeclared
identifier 'cleared1'
s->swier[0] &= ~cleared1;
^
../../hw/misc/stm32l4x5_exti.c:202:9: error: expected expression
const uint32_t set2 = value & ACTIVABLE_MASK2;
^
../../hw/misc/stm32l4x5_exti.c:203:32: error: use of undeclared
identifier 'set2'
const uint32_t pend2 = set2 & ~s->swier[1] & s->imr[1] & ~s->pr[1];
^
../../hw/misc/stm32l4x5_exti.c:204:23: error: use of undeclared
identifier 'set2'
s->swier[1] = set2;
^
../../hw/misc/stm32l4x5_exti.c:213:9: error: expected expression
const uint32_t cleared = s->pr[1] & value & ACTIVABLE_MASK2;
^
../../hw/misc/stm32l4x5_exti.c:215:22: error: use of undeclared
identifier 'cleared'
s->pr[1] &= ~cleared;
^
../../hw/misc/stm32l4x5_exti.c:217:25: error: use of undeclared
identifier 'cleared'
s->swier[1] &= ~cleared;
^
14 errors generated.
I could build using:
-- >8 --
diff --git a/hw/misc/stm32l4x5_exti.c b/hw/misc/stm32l4x5_exti.c
index 81c901d3e5..aedf1fb370 100644
--- a/hw/misc/stm32l4x5_exti.c
+++ b/hw/misc/stm32l4x5_exti.c
@@ -170,3 +170,3 @@ static void stm32l4x5_exti_write(void *opaque,
hwaddr addr,
return;
- case EXTI_SWIER1:
+ case EXTI_SWIER1: {
const uint32_t set1 = value & ~DIRECT_LINE_MASK1;
@@ -181,3 +181,4 @@ static void stm32l4x5_exti_write(void *opaque,
hwaddr addr,
return;
- case EXTI_PR1:
+ }
+ case EXTI_PR1: {
const uint32_t cleared1 = s->pr[0] & value & ~DIRECT_LINE_MASK1;
@@ -188,2 +189,3 @@ static void stm32l4x5_exti_write(void *opaque,
hwaddr addr,
return;
+ }
case EXTI_IMR2:
@@ -200,3 +202,3 @@ static void stm32l4x5_exti_write(void *opaque,
hwaddr addr,
return;
- case EXTI_SWIER2:
+ case EXTI_SWIER2: {
const uint32_t set2 = value & ACTIVABLE_MASK2;
@@ -211,3 +213,4 @@ static void stm32l4x5_exti_write(void *opaque,
hwaddr addr,
return;
- case EXTI_PR2:
+ }
+ case EXTI_PR2: {
const uint32_t cleared = s->pr[1] & value & ACTIVABLE_MASK2;
@@ -218,2 +221,3 @@ static void stm32l4x5_exti_write(void *opaque,
hwaddr addr,
return;
+ }
default:
---
next prev parent reply other threads:[~2024-01-04 13:15 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-28 16:19 [PATCH v5 0/3] Add device STM32L4x5 EXTI Inès Varhol
2023-12-28 16:19 ` [PATCH v5 1/3] hw/misc: Implement " Inès Varhol
2024-01-04 13:14 ` Philippe Mathieu-Daudé [this message]
2024-01-04 13:23 ` Samuel Tardieu
2024-01-04 13:40 ` Philippe Mathieu-Daudé
2024-01-04 13:59 ` Samuel Tardieu
2024-01-04 14:06 ` inesvarhol
2023-12-28 16:19 ` [PATCH v5 2/3] tests/qtest: Add STM32L4x5 EXTI QTest testcase Inès Varhol
2024-01-04 3:39 ` Alistair Francis
2024-01-04 13:05 ` Philippe Mathieu-Daudé
2024-01-04 13:37 ` inesvarhol
2024-01-05 10:13 ` Philippe Mathieu-Daudé
2024-01-05 10:19 ` Philippe Mathieu-Daudé
2024-01-08 16:15 ` Markus Armbruster
2024-01-07 14:04 ` Mark Cave-Ayland
2024-01-08 16:21 ` Markus Armbruster
2024-01-05 10:24 ` Daniel P. Berrangé
2024-01-05 22:16 ` Philippe Mathieu-Daudé
2024-01-04 13:33 ` Philippe Mathieu-Daudé
2024-01-04 13:45 ` inesvarhol
2023-12-28 16:19 ` [PATCH v5 3/3] hw/arm: Connect STM32L4x5 EXTI to STM32L4x5 SoC Inès Varhol
2024-01-04 3:42 ` Alistair Francis
2024-01-04 13:17 ` Philippe Mathieu-Daudé
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