From: Richard Henderson <rth@twiddle.net>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: stefanha@redhat.com, peter.maydell@linaro.org,
qemu-devel@nongnu.org, cota@braap.org,
"open list:ARM" <qemu-arm@nongnu.org>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [Qemu-devel] [PATCH for-2.8] target-arm/translate-a64: fix gen_load_exclusive
Date: Mon, 5 Dec 2016 09:15:25 -0800 [thread overview]
Message-ID: <90d8b147-209b-adb2-de81-f3c02c381d26@twiddle.net> (raw)
In-Reply-To: <87twaiz4r6.fsf@linaro.org>
On 12/05/2016 09:04 AM, Alex Bennée wrote:
>> It's not trying to be "clever", it's trying to be correct, giving an atomic
>> 64-bit load.
>
> Ahh right I see. What happens if the backend is 32bit, will it issue two
> loads anyway?
Yes. I did bring this up when the atomics patch set went in.
In principal there's no reason we can't handle this like the 128-bit path, with
a special helper for a 32-bit host using __atomic_load_64 if available, which
it would be for i686 (via fpu) and armv7 (via ldrexd), or
gen_helper_exit_atomic if not.
But it's nasty and slow, and work that's unnecessary if we simply decide that
32-bit hosts cannot run mttcg.
> I don't know how often these load-exclusive paired operations are used
> in real code but I think we should at least fix it so the values are
> loaded properly for 2.8 and do the proper atomic fix for 2.9.
Yep.
r~
next prev parent reply other threads:[~2016-12-05 17:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-02 17:34 [Qemu-devel] [PATCH for-2.8] target-arm/translate-a64: fix gen_load_exclusive Alex Bennée
2016-12-05 11:09 ` Alex Bennée
2016-12-05 15:42 ` Richard Henderson
2016-12-05 15:55 ` Peter Maydell
2016-12-05 17:04 ` Alex Bennée
2016-12-05 17:15 ` Richard Henderson [this message]
2016-12-05 17:22 ` Richard Henderson
2016-12-05 18:00 ` Peter Maydell
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