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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d43fdec51sm78385515e9.27.2025.03.21.06.20.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Mar 2025 06:20:09 -0700 (PDT) Message-ID: <915c5266-bf73-43aa-b0ff-80bd094e4d0b@linaro.org> Date: Fri, 21 Mar 2025 14:20:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH-for-10.1 4/4] tcg: Define guest_default_memory_order in TCGCPUOps To: Richard Henderson , qemu-devel@nongnu.org Cc: Paolo Bonzini , Pierrick Bouvier , =?UTF-8?Q?Alex_Benn=C3=A9e?= , Anton Johansson References: <20250321125737.72839-1-philmd@linaro.org> <20250321125737.72839-5-philmd@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20250321125737.72839-5-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 21/3/25 13:57, Philippe Mathieu-Daudé wrote: > Add the TCGCPUOps::guest_default_memory_order field and have > each target initialize it. > > Use it to set TCGContext::guest_mo in tb_gen_code(), removing > the need for the TCG_GUEST_DEFAULT_MO definition. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/accel/tcg/cpu-ops.h | 8 ++++++++ > target/alpha/cpu-param.h | 3 --- > target/arm/cpu-param.h | 3 --- > target/avr/cpu-param.h | 2 -- > target/hexagon/cpu-param.h | 3 --- > target/hppa/cpu-param.h | 8 -------- > target/i386/cpu-param.h | 3 --- > target/loongarch/cpu-param.h | 2 -- > target/m68k/cpu-param.h | 3 --- > target/microblaze/cpu-param.h | 3 --- > target/mips/cpu-param.h | 2 -- > target/openrisc/cpu-param.h | 2 -- > target/ppc/cpu-param.h | 2 -- > target/riscv/cpu-param.h | 2 -- > target/rx/cpu-param.h | 3 --- > target/s390x/cpu-param.h | 6 ------ > target/sh4/cpu-param.h | 3 --- > target/sparc/cpu-param.h | 23 ----------------------- > target/tricore/cpu-param.h | 3 --- > target/xtensa/cpu-param.h | 3 --- > accel/tcg/translate-all.c | 2 +- > target/alpha/cpu.c | 3 +++ > target/arm/cpu.c | 3 +++ > target/arm/tcg/cpu-v7m.c | 3 +++ > target/avr/cpu.c | 1 + > target/hexagon/cpu.c | 2 ++ > target/hppa/cpu.c | 8 ++++++++ > target/i386/tcg/tcg-cpu.c | 5 +++++ > target/loongarch/cpu.c | 2 ++ > target/m68k/cpu.c | 3 +++ > target/microblaze/cpu.c | 3 +++ > target/mips/cpu.c | 2 ++ > target/openrisc/cpu.c | 2 ++ > target/ppc/cpu_init.c | 2 ++ > target/riscv/tcg/tcg-cpu.c | 2 ++ > target/rx/cpu.c | 3 +++ > target/s390x/cpu.c | 6 ++++++ > target/sh4/cpu.c | 3 +++ > target/sparc/cpu.c | 23 +++++++++++++++++++++++ > target/tricore/cpu.c | 2 ++ > target/xtensa/cpu.c | 3 +++ > 41 files changed, 90 insertions(+), 80 deletions(-) Missing one TCG_GUEST_DEFAULT_MO mention in docs: -- >8 -- diff --git a/docs/devel/multi-thread-tcg.rst b/docs/devel/multi-thread-tcg.rst index b0f473961dd..14a2a9dc7b5 100644 --- a/docs/devel/multi-thread-tcg.rst +++ b/docs/devel/multi-thread-tcg.rst @@ -31,2 +31,2 @@ combinations where the host memory model is able to accommodate the -guest (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO is zero) and the -guest has had the required work done to support this safely +guest (TCGCPUOps::guest_default_memory_order & ~TCG_TARGET_DEFAULT_MO is zero) +and the guest has had the required work done to support this safely ---