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Mon, 18 Dec 2023 09:23:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1702891423; bh=Bg3qYfFFd8H2aGlw08bBTiuD/yZJ1rWQm8HJE2Q0BsI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=AKB60Xbhf/2AIZtmPJ33TwtwGGuszRqSF4EX4oDJBJr9FXKFUcYjLB+q9q1dOdbeZ wXUE0ioG+v9PSt7rH7x7rnbltpam/4NK2j/kX78b9rUVglLGjLJeLz1lfv3rO2+kbo E+8XwVyltJ8Xrjt6hgXhHsodRCaEbM04pMNov/90qrmvOQjuJQZbwRtDydt339NnI7 JxLG+oJ/eK0/yJHFrfzVW1XtUTu5CYVXVdrNMIKRnHPeLBHv0yS2/Q1ifp13Q2L4iP 8ERVfGtRlerYszDgmRWVJvIsfNDmzvlRG+3tqhqPvs6kiaVLy+zJKhth0JxgP0SaPb lzpx8X8+5zXpA== Message-ID: <9183a3fb-b9f7-470c-b9a6-8d8cc6dce7c3@canonical.com> Date: Mon, 18 Dec 2023 10:23:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] target/riscv: SMBIOS support for RISC-V virt machine Content-Language: en-US, de-DE To: Sunil V L Cc: Paolo Bonzini , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , qemu-riscv@nongnu.org, qemu-devel@nongnu.org References: <20231218074018.66134-1-heinrich.schuchardt@canonical.com> From: Heinrich Schuchardt In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=185.125.188.121; envelope-from=heinrich.schuchardt@canonical.com; helo=smtp-relay-canonical-1.canonical.com X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.086, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/18/23 09:49, Sunil V L wrote: > Hi Heinrich, > > Thanks for the patch!. > > On Mon, Dec 18, 2023 at 08:40:18AM +0100, Heinrich Schuchardt wrote: >> Generate SMBIOS tables for the RISC-V mach-virt. >> Add CONFIG_SMBIOS=y to the RISC-V default config. >> >> The implementation is based on the corresponding ARM and Loongson code. >> >> With the patch the following firmware tables are provided: >> >> etc/smbios/smbios-anchor >> etc/smbios/smbios-tables >> >> Booting Ubuntu 23.10 via EDK II allowed displaying the SMBIOS table using >> the dmidecode command: >> >> Handle 0x0100, DMI type 1, 27 bytes >> System Information >> Manufacturer: QEMU >> Product Name: QEMU Virtual Machine >> Version: virt >> ... >> >> Signed-off-by: Heinrich Schuchardt >> --- >> hw/riscv/Kconfig | 1 + >> hw/riscv/virt.c | 36 ++++++++++++++++++++++++++++++++++++ >> 2 files changed, 37 insertions(+) >> >> diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig >> index b6a5eb4452..1e11ac9432 100644 >> --- a/hw/riscv/Kconfig >> +++ b/hw/riscv/Kconfig >> @@ -41,6 +41,7 @@ config RISCV_VIRT >> select RISCV_IMSIC >> select SIFIVE_PLIC >> select SIFIVE_TEST >> + select SMBIOS >> select VIRTIO_MMIO >> select FW_CFG_DMA >> select PLATFORM_BUS >> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c >> index d2eac24156..6c27cb5330 100644 >> --- a/hw/riscv/virt.c >> +++ b/hw/riscv/virt.c >> @@ -36,6 +36,7 @@ >> #include "hw/riscv/boot.h" >> #include "hw/riscv/numa.h" >> #include "kvm/kvm_riscv.h" >> +#include "hw/firmware/smbios.h" >> #include "hw/intc/riscv_aclint.h" >> #include "hw/intc/riscv_aplic.h" >> #include "hw/intc/riscv_imsic.h" >> @@ -1249,6 +1250,39 @@ static void create_platform_bus(RISCVVirtState *s, DeviceState *irqchip) >> sysbus_mmio_get_region(sysbus, 0)); >> } >> >> +static void virt_build_smbios(RISCVVirtState *s) >> +{ > Can we avoid duplicating this function which exists in other > architectures? > Every architecture uses it own structures (e.g. RISCVVirtState) and constants (e.g VIRT_DRAM). As long as this is not addressed we will have to live with this piece of code duplication. After this patch is accepted we will have to work on improving SMBIOS 3.7.0 compliance: * Table 22 * * field Processor Family should contain a RISC-V specfic value. Maybe derived from TARGET_RISCV##. * * field Processor ID should contain the value of mvendorid of hart 0 (i.e. cpu->cfg.mvendorid). * Table 44 The required contents of this table are provided in https://github.com/riscv/riscv-smbios . Best regards Heinrich