From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59540) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7fMr-0000GQ-9g for qemu-devel@nongnu.org; Tue, 31 May 2016 04:49:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b7fMm-00088f-Az for qemu-devel@nongnu.org; Tue, 31 May 2016 04:49:40 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:58950) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7fMm-00088b-3r for qemu-devel@nongnu.org; Tue, 31 May 2016 04:49:36 -0400 Received: from pova.uni-paderborn.de ([131.234.189.23] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.84_2 zuban) id 1b7fMl-0001Mn-KK for qemu-devel@nongnu.org; Tue, 31 May 2016 10:49:35 +0200 Received: from mail.uni-paderborn.de by pova with queue id 1137545-2 for qemu-devel@nongnu.org; Tue, 31 May 2016 08:49:35 GMT References: <1464673721-14578-1-git-send-email-peer.adelt@c-lab.de> From: Bastian Koppelmann Message-ID: <92c149c5-db96-a48e-1be7-75e56b4aae69@mail.uni-paderborn.de> Date: Tue, 31 May 2016 10:49:34 +0200 MIME-Version: 1.0 In-Reply-To: <1464673721-14578-1-git-send-email-peer.adelt@c-lab.de> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 3/4] target-tricore: Added new MOV instruction variant List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peer.adelt@c-lab.de, qemu-devel@nongnu.org On 05/31/2016 07:48 AM, peer.adelt@c-lab.de wrote: > From: Peer Adelt > > Puts the content of data register D[a] into E[c][63:32] and the > content of data register D[b] into E[c][31:0]. > > Signed-off-by: Peer Adelt > --- > target-tricore/translate.c | 8 ++++++++ > target-tricore/tricore-opcodes.h | 1 + > 2 files changed, 9 insertions(+) > > diff --git a/target-tricore/translate.c b/target-tricore/translate.c > index e66b433..960ee33 100644 > --- a/target-tricore/translate.c > +++ b/target-tricore/translate.c > @@ -6224,6 +6224,14 @@ static void decode_rr_accumulator(CPUTriCoreState *env, DisasContext *ctx) > case OPC2_32_RR_MOV: > tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]); > break; > + case OPC2_32_RR_MOV_EXT: > + if (tricore_feature(env, TRICORE_FEATURE_16)) { > + tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); > + tcg_gen_mov_tl(cpu_gpr_d[(r3+1)], cpu_gpr_d[r2]); If r2 == r3 you would move r1 into r3+1 which is wrong. Use temporaries instead of directly writing to r3. Cheers, Bastian