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([2001:8003:c020:6900:324d:cbc2:5f8b:3a9d]) by smtp.gmail.com with ESMTPSA id u16-20020a056a00099000b006d9c7f2840bsm6734408pfg.57.2023.12.28.13.34.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Dec 2023 13:34:53 -0800 (PST) Message-ID: <92e22e4d-3f1e-4ffd-8b98-5906f32b886e@linaro.org> Date: Fri, 29 Dec 2023 08:34:48 +1100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 06/22] target/i386: document more deviations from the manual Content-Language: en-US To: Paolo Bonzini , qemu-devel@nongnu.org References: <20231222181603.174137-1-pbonzini@redhat.com> <20231222181603.174137-7-pbonzini@redhat.com> From: Richard Henderson In-Reply-To: <20231222181603.174137-7-pbonzini@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::c2d; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/23/23 05:15, Paolo Bonzini wrote: > Signed-off-by: Paolo Bonzini > --- > target/i386/tcg/decode-new.c.inc | 12 ++++++++++++ > 1 file changed, 12 insertions(+) Reviewed-by: Richard Henderson > > diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc > index 2bdbb1bba0f..232c6a45c96 100644 > --- a/target/i386/tcg/decode-new.c.inc > +++ b/target/i386/tcg/decode-new.c.inc > @@ -26,6 +26,13 @@ > * size (X86_SIZE_*) codes used in the manual. There are a few differences > * though. > * > + * Operand sizes > + * ------------- > + * > + * The manual lists d64 ("cannot encode 32-bit size in 64-bit mode") and f64 > + * ("cannot encode 16-bit or 32-bit size in 64-bit mode") as modifiers of the > + * "v" or "z" sizes. The decoder simply makes them separate operand sizes. > + * > * Vector operands > * --------------- > * > @@ -44,6 +51,11 @@ > * if the difference is expressed via prefixes. Individual instructions > * are separated by prefix in the generator functions. > * > + * There is a custom size "xh" used to address half of a SSE/AVX operand. > + * This points to a 64-bit operand for SSE operations, 128-bit operand > + * for 256-bit AVX operands, etc. It is used for conversion operations > + * such as VCVTPH2PS or VCVTSS2SD. > + * > * There are a couple cases in which instructions (e.g. MOVD) write the > * whole XMM or MM register but are established incorrectly in the manual > * as "d" or "q". These have to be fixed for the decoder to work correctly.