* [PATCH] target/arm: HVC at EL3 should go to EL3, not EL2
@ 2023-11-09 15:19 Peter Maydell
2023-11-09 15:46 ` Edgar E. Iglesias
2023-11-09 23:07 ` Richard Henderson
0 siblings, 2 replies; 3+ messages in thread
From: Peter Maydell @ 2023-11-09 15:19 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: qemu-stable
AArch64 permits code at EL3 to use the HVC instruction; however the
exception we take should go to EL3, not down to EL2 (see the pseudocode
AArch64.CallHypervisor()). Fix the target EL.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/translate-a64.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 41484d8ae54..a2e49c39f9f 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -2351,6 +2351,8 @@ static bool trans_SVC(DisasContext *s, arg_i *a)
static bool trans_HVC(DisasContext *s, arg_i *a)
{
+ int target_el = s->current_el == 3 ? 3 : 2;
+
if (s->current_el == 0) {
unallocated_encoding(s);
return true;
@@ -2363,7 +2365,7 @@ static bool trans_HVC(DisasContext *s, arg_i *a)
gen_helper_pre_hvc(tcg_env);
/* Architecture requires ss advance before we do the actual work */
gen_ss_advance(s);
- gen_exception_insn_el(s, 4, EXCP_HVC, syn_aa64_hvc(a->imm), 2);
+ gen_exception_insn_el(s, 4, EXCP_HVC, syn_aa64_hvc(a->imm), target_el);
return true;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] target/arm: HVC at EL3 should go to EL3, not EL2
2023-11-09 15:19 [PATCH] target/arm: HVC at EL3 should go to EL3, not EL2 Peter Maydell
@ 2023-11-09 15:46 ` Edgar E. Iglesias
2023-11-09 23:07 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Edgar E. Iglesias @ 2023-11-09 15:46 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-arm, qemu-devel, qemu-stable
[-- Attachment #1: Type: text/plain, Size: 1458 bytes --]
On Thu, Nov 9, 2023 at 4:20 PM Peter Maydell <peter.maydell@linaro.org>
wrote:
> AArch64 permits code at EL3 to use the HVC instruction; however the
> exception we take should go to EL3, not down to EL2 (see the pseudocode
> AArch64.CallHypervisor()). Fix the target EL.
>
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
> ---
> target/arm/tcg/translate-a64.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/target/arm/tcg/translate-a64.c
> b/target/arm/tcg/translate-a64.c
> index 41484d8ae54..a2e49c39f9f 100644
> --- a/target/arm/tcg/translate-a64.c
> +++ b/target/arm/tcg/translate-a64.c
> @@ -2351,6 +2351,8 @@ static bool trans_SVC(DisasContext *s, arg_i *a)
>
> static bool trans_HVC(DisasContext *s, arg_i *a)
> {
> + int target_el = s->current_el == 3 ? 3 : 2;
> +
> if (s->current_el == 0) {
> unallocated_encoding(s);
> return true;
> @@ -2363,7 +2365,7 @@ static bool trans_HVC(DisasContext *s, arg_i *a)
> gen_helper_pre_hvc(tcg_env);
> /* Architecture requires ss advance before we do the actual work */
> gen_ss_advance(s);
> - gen_exception_insn_el(s, 4, EXCP_HVC, syn_aa64_hvc(a->imm), 2);
> + gen_exception_insn_el(s, 4, EXCP_HVC, syn_aa64_hvc(a->imm),
> target_el);
> return true;
> }
>
> --
> 2.34.1
>
>
>
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^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] target/arm: HVC at EL3 should go to EL3, not EL2
2023-11-09 15:19 [PATCH] target/arm: HVC at EL3 should go to EL3, not EL2 Peter Maydell
2023-11-09 15:46 ` Edgar E. Iglesias
@ 2023-11-09 23:07 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2023-11-09 23:07 UTC (permalink / raw)
To: Peter Maydell, qemu-arm, qemu-devel; +Cc: qemu-stable
On 11/9/23 07:19, Peter Maydell wrote:
> AArch64 permits code at EL3 to use the HVC instruction; however the
> exception we take should go to EL3, not down to EL2 (see the pseudocode
> AArch64.CallHypervisor()). Fix the target EL.
>
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/arm/tcg/translate-a64.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-11-09 15:19 [PATCH] target/arm: HVC at EL3 should go to EL3, not EL2 Peter Maydell
2023-11-09 15:46 ` Edgar E. Iglesias
2023-11-09 23:07 ` Richard Henderson
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