From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 21/35] target/arm: Add FEAT_NV to max, neoverse-n2, neoverse-v1 CPUs
Date: Thu, 28 Dec 2023 09:59:02 +1100 [thread overview]
Message-ID: <937f38a2-440f-483a-8b4c-7346838aa618@linaro.org> (raw)
In-Reply-To: <20231218113305.2511480-22-peter.maydell@linaro.org>
On 12/18/23 22:32, Peter Maydell wrote:
> Enable FEAT_NV on the 'max' CPU, and stop filtering it out for the
> Neoverse N2 and Neoverse V1 CPUs. We continue to downgrade FEAT_NV2
> support to FEAT_NV for the latter two CPU types.
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
> docs/system/arm/emulation.rst | 1 +
> target/arm/cpu.c | 8 +++++---
> target/arm/tcg/cpu64.c | 1 +
> 3 files changed, 7 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2023-12-27 22:59 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-18 11:32 [PATCH 00/35] target/arm: Implement emulation of nested virtualization Peter Maydell
2023-12-18 11:32 ` [PATCH 01/35] target/arm: Don't implement *32_EL2 registers when EL1 is AArch64 only Peter Maydell
2023-12-18 11:32 ` [PATCH 02/35] target/arm: Set CTR_EL0.{IDC,DIC} for the 'max' CPU Peter Maydell
2023-12-27 21:08 ` [PATCH 02/35] target/arm: Set CTR_EL0.{IDC, DIC} " Richard Henderson
2023-12-18 11:32 ` [PATCH 03/35] hw/intc/arm_gicv3_cpuif: handle LPIs in in the list registers Peter Maydell
2023-12-27 21:11 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 04/35] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NV Peter Maydell
2023-12-27 21:42 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 05/35] target/arm: Implement HCR_EL2.AT handling Peter Maydell
2023-12-27 22:01 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 06/35] target/arm: Enable trapping of ERET for FEAT_NV Peter Maydell
2023-12-27 22:06 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 07/35] target/arm: Always honour HCR_EL2.TSC when HCR_EL2.NV is set Peter Maydell
2023-12-27 22:18 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 08/35] target/arm: Allow use of upper 32 bits of TBFLAG_A64 Peter Maydell
2023-12-27 22:20 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 09/35] target/arm: Record correct opcode fields in cpreg for E2H aliases Peter Maydell
2023-12-27 22:23 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 10/35] target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0 Peter Maydell
2023-12-27 22:25 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 11/35] target/arm: Make EL2 cpreg accessfns safe for FEAT_NV EL1 accesses Peter Maydell
2023-12-27 22:31 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 12/35] target/arm: Move FPU/SVE/SME access checks up above ARM_CP_SPECIAL_MASK check Peter Maydell
2023-12-27 22:32 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 13/35] target/arm: Trap sysreg accesses for FEAT_NV Peter Maydell
2023-12-27 22:40 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 14/35] target/arm: Make NV reads of CurrentEL return EL2 Peter Maydell
2023-12-27 22:42 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 15/35] target/arm: Set SPSR_EL1.M correctly when nested virt is enabled Peter Maydell
2023-12-27 22:43 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 16/35] target/arm: Trap registers when HCR_EL2.{NV, NV1} == {1, 1} Peter Maydell
2023-12-27 22:47 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 17/35] target/arm: Always use arm_pan_enabled() when checking if PAN is enabled Peter Maydell
2023-12-27 22:50 ` Richard Henderson
2024-01-04 15:59 ` Peter Maydell
2023-12-18 11:32 ` [PATCH 18/35] target/arm: Don't honour PSTATE.PAN when HCR_EL2.{NV, NV1} == {1, 1} Peter Maydell
2023-12-27 22:52 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 19/35] target/arm: Treat LDTR* and STTR* as LDR/STR when NV, NV1 is 1, 1 Peter Maydell
2023-12-27 22:53 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 20/35] target/arm: Handle FEAT_NV page table attribute changes Peter Maydell
2023-12-27 22:57 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 21/35] target/arm: Add FEAT_NV to max, neoverse-n2, neoverse-v1 CPUs Peter Maydell
2023-12-27 22:59 ` Richard Henderson [this message]
2023-12-29 11:37 ` Marcin Juszkiewicz
2024-01-04 11:36 ` Peter Maydell
2023-12-18 11:32 ` [PATCH 22/35] target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits Peter Maydell
2023-12-27 22:59 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 23/35] target/arm: Implement VNCR_EL2 register Peter Maydell
2023-12-27 23:01 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 24/35] target/arm: Handle FEAT_NV2 changes to when SPSR_EL1.M reports EL2 Peter Maydell
2023-12-27 23:06 ` Richard Henderson
2024-01-04 16:03 ` Peter Maydell
2023-12-18 11:32 ` [PATCH 25/35] target/arm: Handle FEAT_NV2 redirection of SPSR_EL2, ELR_EL2, ESR_EL2, FAR_EL2 Peter Maydell
2023-12-27 23:11 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 26/35] target/arm: Implement FEAT_NV2 redirection of sysregs to RAM Peter Maydell
2023-12-27 23:55 ` Richard Henderson
2024-01-04 16:23 ` Peter Maydell
2024-01-09 8:40 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 27/35] target/arm: Report VNCR_EL2 based faults correctly Peter Maydell
2023-12-28 0:03 ` Richard Henderson
2024-01-16 13:09 ` Jonathan Cameron via
2024-01-16 13:20 ` Peter Maydell
2024-01-16 14:50 ` Jonathan Cameron via
2024-01-16 14:59 ` Peter Maydell
2024-01-16 15:29 ` Jonathan Cameron via
2024-01-16 15:35 ` Peter Maydell
2023-12-18 11:32 ` [PATCH 28/35] target/arm: Mark up VNCR offsets (offsets 0x0..0xff) Peter Maydell
2023-12-28 0:35 ` Richard Henderson
2023-12-18 11:32 ` [PATCH 29/35] target/arm: Mark up VNCR offsets (offsets 0x100..0x160) Peter Maydell
2023-12-28 0:42 ` Richard Henderson
2024-01-04 16:24 ` Peter Maydell
2023-12-18 11:33 ` [PATCH 30/35] target/arm: Mark up VNCR offsets (offsets 0x168..0x1f8) Peter Maydell
2023-12-28 0:45 ` Richard Henderson
2023-12-18 11:33 ` [PATCH 31/35] target/arm: Mark up VNCR offsets (offsets >= 0x200, except GIC) Peter Maydell
2023-12-28 0:50 ` Richard Henderson
2023-12-18 11:33 ` [PATCH 32/35] hw/intc/arm_gicv3_cpuif: Mark up VNCR offsets for GIC CPU registers Peter Maydell
2023-12-28 0:52 ` Richard Henderson
2023-12-18 11:33 ` [PATCH 33/35] target/arm: Report HCR_EL2.{NV,NV1,NV2} in cpu dumps Peter Maydell
2023-12-28 0:54 ` Richard Henderson
2023-12-18 11:33 ` [PATCH 34/35] target/arm: Enhance CPU_LOG_INT to show SPSR on AArch64 exception-entry Peter Maydell
2023-12-28 0:54 ` Richard Henderson
2023-12-18 11:33 ` [PATCH 35/35] target/arm: Add FEAT_NV2 to max, neoverse-n2, neoverse-v1 CPUs Peter Maydell
2023-12-28 0:58 ` Richard Henderson
2023-12-22 14:23 ` [PATCH 00/35] target/arm: Implement emulation of nested virtualization Miguel Luis
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