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From: Jiangyifei via <qemu-devel@nongnu.org>
To: Richard Henderson <richard.henderson@linaro.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>
Cc: "kvm-riscv@lists.infradead.org" <kvm-riscv@lists.infradead.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"libvir-list@redhat.com" <libvir-list@redhat.com>,
	"anup.patel@wdc.com" <anup.patel@wdc.com>,
	"palmer@dabbelt.com" <palmer@dabbelt.com>,
	"Alistair.Francis@wdc.com" <Alistair.Francis@wdc.com>,
	"bin.meng@windriver.com" <bin.meng@windriver.com>,
	"Fanliang (EulerOS)" <fanliang@huawei.com>,
	"Wubin (H)" <wu.wubin@huawei.com>,
	"Wanghaibin (D)" <wanghaibin.wang@huawei.com>,
	"wanbo (G)" <wanbo13@huawei.com>,
	"limingwang (A)" <limingwang@huawei.com>
Subject: RE: [PATCH v2 12/12] target/riscv: Support virtual time context synchronization
Date: Mon, 20 Dec 2021 13:02:53 +0000	[thread overview]
Message-ID: <93bc5000c51042e5bb45053707109947@huawei.com> (raw)
In-Reply-To: <10d2d911-e975-64b3-8ab6-e950c5064b9e@linaro.org>


> -----Original Message-----
> From: Richard Henderson [mailto:richard.henderson@linaro.org]
> Sent: Monday, December 13, 2021 11:22 PM
> To: Jiangyifei <jiangyifei@huawei.com>; qemu-devel@nongnu.org;
> qemu-riscv@nongnu.org
> Cc: kvm-riscv@lists.infradead.org; kvm@vger.kernel.org;
> libvir-list@redhat.com; anup.patel@wdc.com; palmer@dabbelt.com;
> Alistair.Francis@wdc.com; bin.meng@windriver.com; Fanliang (EulerOS)
> <fanliang@huawei.com>; Wubin (H) <wu.wubin@huawei.com>; Wanghaibin (D)
> <wanghaibin.wang@huawei.com>; wanbo (G) <wanbo13@huawei.com>;
> limingwang (A) <limingwang@huawei.com>
> Subject: Re: [PATCH v2 12/12] target/riscv: Support virtual time context
> synchronization
> 
> On 12/10/21 2:07 AM, Yifei Jiang via wrote:
> > +static bool kvmtimer_needed(void *opaque) {
> > +    return kvm_enabled();
> > +}
> > +
> > +
> > +static const VMStateDescription vmstate_kvmtimer = {
> > +    .name = "cpu/kvmtimer",
> > +    .version_id = 1,
> > +    .minimum_version_id = 1,
> > +    .needed = kvmtimer_needed,
> > +    .fields = (VMStateField[]) {
> > +        VMSTATE_UINT64(env.kvm_timer_time, RISCVCPU),
> > +        VMSTATE_UINT64(env.kvm_timer_compare, RISCVCPU),
> > +        VMSTATE_UINT64(env.kvm_timer_state, RISCVCPU),
> > +
> > +        VMSTATE_END_OF_LIST()
> > +    }
> > +};
> > +
> > +static int cpu_post_load(void *opaque, int version_id) {
> > +    RISCVCPU *cpu = opaque;
> > +    CPURISCVState *env = &cpu->env;
> > +
> > +    if (kvm_enabled()) {
> > +        env->kvm_timer_dirty = true;
> > +    }
> > +    return 0;
> > +}
> 
> This post-load belongs on the vmstate_kvmtimer struct, so that you need not
> re-check kvm_enabled().
> 
> >   const VMStateDescription vmstate_riscv_cpu = {
> >       .name = "cpu",
> > -    .version_id = 3,
> > -    .minimum_version_id = 3,
> > +    .version_id = 4,
> > +    .minimum_version_id = 4,
> > +    .post_load = cpu_post_load,
> 
> No need for version change.
> 
> 
> r~

Ok, it will be modified in the next series.

Yifei

      reply	other threads:[~2021-12-20 16:34 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-10 10:07 [PATCH v2 00/12] Add riscv kvm accel support Yifei Jiang via
2021-12-10 10:07 ` [PATCH v2 01/12] update-linux-headers: Add asm-riscv/kvm.h Yifei Jiang via
2021-12-10 10:07 ` [PATCH v2 02/12] target/riscv: Add target/riscv/kvm.c to place the public kvm interface Yifei Jiang via
2021-12-10 10:07 ` [PATCH v2 03/12] target/riscv: Implement function kvm_arch_init_vcpu Yifei Jiang via
2021-12-13  4:15   ` Anup Patel
2021-12-10 10:07 ` [PATCH v2 04/12] target/riscv: Implement kvm_arch_get_registers Yifei Jiang via
2021-12-13  4:16   ` Anup Patel
2021-12-10 10:07 ` [PATCH v2 05/12] target/riscv: Implement kvm_arch_put_registers Yifei Jiang via
2021-12-13  4:17   ` Anup Patel
2021-12-10 10:07 ` [PATCH v2 06/12] target/riscv: Support start kernel directly by KVM Yifei Jiang via
2021-12-13  4:21   ` Anup Patel
2021-12-20 12:59     ` Jiangyifei via
2021-12-10 10:07 ` [PATCH v2 07/12] target/riscv: Support setting external interrupt " Yifei Jiang via
2021-12-13  4:32   ` Anup Patel
2021-12-20 13:01     ` Jiangyifei via
2021-12-10 10:07 ` [PATCH v2 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit Yifei Jiang via
2021-12-13  4:37   ` Anup Patel
2021-12-10 10:07 ` [PATCH v2 09/12] target/riscv: Add host cpu type Yifei Jiang via
2021-12-10 10:07 ` [PATCH v2 10/12] target/riscv: Add kvm_riscv_get/put_regs_timer Yifei Jiang via
2021-12-13  5:05   ` Anup Patel
2021-12-13 15:19     ` Richard Henderson
2021-12-20 13:02       ` Jiangyifei via
2021-12-10 10:07 ` [PATCH v2 11/12] target/riscv: Implement virtual time adjusting with vm state changing Yifei Jiang via
2021-12-13  4:39   ` Anup Patel
2021-12-10 10:07 ` [PATCH v2 12/12] target/riscv: Support virtual time context synchronization Yifei Jiang via
2021-12-13  4:42   ` Anup Patel
2021-12-13 15:21   ` Richard Henderson
2021-12-20 13:02     ` Jiangyifei via [this message]

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