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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Tue, 29 Aug 2017 09:08:46 -0700
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Subject: Re: [Qemu-devel] [PATCH 16/20] target/arm: Make CCR register banked
 for v8M
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org

On 08/22/2017 08:08 AM, Peter Maydell wrote:
> +        if (attrs.secure) {
> +            /* the BFHFNMIGN bit is not banked; keep that in the NS copy */
> +            int new_bfhnmign = !!(value & R_V7M_CCR_BFHFNMIGN_MASK);
> +
> +            cpu->env.v7m.ccr[M_REG_NS] = deposit32(cpu->env.v7m.ccr[M_REG_NS],
> +                                                    R_V7M_CCR_BFHFNMIGN_SHIFT,
> +                                                    R_V7M_CCR_BFHFNMIGN_LENGTH,
> +                                                    new_bfhnmign);
> +            value &= ~R_V7M_CCR_BFHFNMIGN_MASK;
> +        }

No need to extract and then redeposit, just use the mask.

    cpu->env.v7m.ccr[M_REG_NS] =
      (cpu->env.v7m.ccr[M_REG_NS] & ~R_V7M_CCR_BFHFNMIGN_MASK)
      | (value & R_V7M_CCR_BFHFNMIGN_MASK);


r~