* [PATCH v2] target/loongarch: Avoid bits shift exceeding width of bool type
@ 2024-09-14 6:46 Bibo Mao
2024-09-29 7:42 ` gaosong
0 siblings, 1 reply; 2+ messages in thread
From: Bibo Mao @ 2024-09-14 6:46 UTC (permalink / raw)
To: Song Gao; +Cc: Richard Henderson, qemu-devel
Variable env->cf[i] is defined as bool type, it is treated as int type
with shift operation. However the max possible width is 56 for the shift
operation, exceeding the width of int type. And there is existing api
read_fcc() which is converted to u64 type with bitwise shift, it can be
used to dump fp registers into coredump note segment.
Resolves: Coverity CID 1561133
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/arch_dump.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
index 4986db970e..d9e1120333 100644
--- a/target/loongarch/arch_dump.c
+++ b/target/loongarch/arch_dump.c
@@ -97,11 +97,7 @@ static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
loongarch_note_init(¬e, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
-
- for (i = 0; i < 8; i++) {
- note.fpu.fcc |= env->cf[i] << (8 * i);
- }
- note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
+ note.fpu.fcc = cpu_to_dump64(s, read_fcc(env));
for (i = 0; i < 32; ++i) {
note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);
base-commit: 28ae3179fc52d2e4d870b635c4a412aab99759e7
--
2.39.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] target/loongarch: Avoid bits shift exceeding width of bool type
2024-09-14 6:46 [PATCH v2] target/loongarch: Avoid bits shift exceeding width of bool type Bibo Mao
@ 2024-09-29 7:42 ` gaosong
0 siblings, 0 replies; 2+ messages in thread
From: gaosong @ 2024-09-29 7:42 UTC (permalink / raw)
To: Bibo Mao; +Cc: Richard Henderson, qemu-devel
在 2024/9/14 下午2:46, Bibo Mao 写道:
> Variable env->cf[i] is defined as bool type, it is treated as int type
> with shift operation. However the max possible width is 56 for the shift
> operation, exceeding the width of int type. And there is existing api
> read_fcc() which is converted to u64 type with bitwise shift, it can be
> used to dump fp registers into coredump note segment.
>
> Resolves: Coverity CID 1561133
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/loongarch/arch_dump.c | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
Applied to loongarch-next.
Thanks.
Song Gao
> diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
> index 4986db970e..d9e1120333 100644
> --- a/target/loongarch/arch_dump.c
> +++ b/target/loongarch/arch_dump.c
> @@ -97,11 +97,7 @@ static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
>
> loongarch_note_init(¬e, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
> note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
> -
> - for (i = 0; i < 8; i++) {
> - note.fpu.fcc |= env->cf[i] << (8 * i);
> - }
> - note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
> + note.fpu.fcc = cpu_to_dump64(s, read_fcc(env));
>
> for (i = 0; i < 32; ++i) {
> note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);
>
> base-commit: 28ae3179fc52d2e4d870b635c4a412aab99759e7
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