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References: <20180805182832.3012-1-pavel.zbitskiy@gmail.com>
	<20180805182832.3012-4-pavel.zbitskiy@gmail.com>
From: David Hildenbrand <david@redhat.com>
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Date: Mon, 6 Aug 2018 13:18:23 +0200
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Subject: Re: [Qemu-devel] [PATCH 3/6] target/s390x: fix ipm polluting
 irrelevant bits
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To: Pavel Zbitskiy <pavel.zbitskiy@gmail.com>, qemu-devel@nongnu.org
Cc: qemu-trivial@nongnu.org, Cornelia Huck <cohuck@redhat.com>, Richard Henderson <rth@twiddle.net>, Alexander Graf <agraf@suse.de>, "open list:S390" <qemu-s390x@nongnu.org>

On 05.08.2018 20:28, Pavel Zbitskiy wrote:
> Suppose psw.mask=3D0x0000000080000000, cc=3D2, r1=3D0 and we do "ipm 1"=
.
> This command must touch only bits 32-39, so the expected output
> is r1=3D0x20000000. However, currently qemu yields r1=3D0x20008000,
> because irrelevant parts of PSW leak into r1 during program mask
> transfer.
>=20
> Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com>
> ---
>  target/s390x/translate.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>=20
> diff --git a/target/s390x/translate.c b/target/s390x/translate.c
> index f318fb6e4e..05442dff36 100644
> --- a/target/s390x/translate.c
> +++ b/target/s390x/translate.c
> @@ -2442,8 +2442,8 @@ static DisasJumpType op_ipm(DisasContext *s, Disa=
sOps *o)
>      tcg_gen_andi_i64(o->out, o->out, ~0xff000000ull);
> =20
>      t1 =3D tcg_temp_new_i64();
> -    tcg_gen_shli_i64(t1, psw_mask, 20);
> -    tcg_gen_shri_i64(t1, t1, 36);
> +    tcg_gen_andi_i64(t1, psw_mask, 0x00000f0000000000);

ull?

> +    tcg_gen_shri_i64(t1, t1, 16);
>      tcg_gen_or_i64(o->out, o->out, t1);
> =20
>      tcg_gen_extu_i32_i64(t1, cc_op);
>=20


--=20

Thanks,

David / dhildenb