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From: Richard Henderson <richard.henderson@linaro.org>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [RFC PATCH 4/6] target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env
Date: Mon, 10 Dec 2018 13:05:52 -0600	[thread overview]
Message-ID: <958fc521-9193-bd72-ca82-c8aac222fad2@linaro.org> (raw)
In-Reply-To: <20181207085635.4291-5-mark.cave-ayland@ilande.co.uk>

On 12/7/18 2:56 AM, Mark Cave-Ayland wrote:
> Instead of accessing the FPR, VMX and VSX registers through static arrays of
> TCGv_i64 globals, remove them and change the helpers to load/store data directly
> within cpu_env.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  target/ppc/translate.c | 59 ++++++++++++++------------------------------------
>  1 file changed, 16 insertions(+), 43 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Note however, that there are other steps that you must add here before using
vector operations in the next patch:

(1a) The fpr and vsr arrays must be merged, since fpr[n] == vsrh[n].
     If this isn't done, then you simply cannot apply one operation
     to two disjoint memory blocks.

(1b) The vsr and avr arrays should be merged, since vsr[32+n] == avr[n].
     This is simply tidiness, matching the layout to the architecture.

These steps will modify gdbstub.c, machine.c, and linux-user/.

(2) The vsr array needs to be QEMU_ALIGN(16).  See target/arm/cpu.h.
    We assert that the host addresses are 16 byte aligned, so that we
    can eventually use Altivec/VSX in tcg/ppc/.


r~

  reply	other threads:[~2018-12-10 19:06 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-07  8:56 [Qemu-devel] [RFC PATCH 0/6] target/ppc: convert VMX instructions to use TCG vector operations Mark Cave-Ayland
2018-12-07  8:56 ` [Qemu-devel] [RFC PATCH 1/6] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access Mark Cave-Ayland
2018-12-10  5:17   ` David Gibson
2018-12-10 18:25     ` Richard Henderson
2018-12-11  0:23       ` David Gibson
2018-12-11 19:06     ` Mark Cave-Ayland
2018-12-10 18:43   ` Richard Henderson
2018-12-11 19:15     ` Mark Cave-Ayland
2018-12-07  8:56 ` [Qemu-devel] [RFC PATCH 2/6] target/ppc: introduce get_avr64() and set_avr64() helpers for VMX " Mark Cave-Ayland
2018-12-10 18:49   ` Richard Henderson
2018-12-11 19:16     ` Mark Cave-Ayland
2018-12-07  8:56 ` [Qemu-devel] [RFC PATCH 3/6] target/ppc: introduce get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}() helpers for VSR " Mark Cave-Ayland
2018-12-10 19:16   ` Richard Henderson
2018-12-11 19:24     ` Mark Cave-Ayland
2018-12-07  8:56 ` [Qemu-devel] [RFC PATCH 4/6] target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env Mark Cave-Ayland
2018-12-10 19:05   ` Richard Henderson [this message]
2018-12-11 19:21     ` Mark Cave-Ayland
2018-12-11 21:24       ` Richard Henderson
2018-12-07  8:56 ` [Qemu-devel] [RFC PATCH 5/6] target/ppc: convert VMX logical instructions to use vector operations Mark Cave-Ayland
2018-12-10 19:08   ` Richard Henderson
2018-12-07  8:56 ` [Qemu-devel] [RFC PATCH 6/6] target/ppc: convert vaddu[b, h, w, d] and vsubu[b, h, w, d] over " Mark Cave-Ayland
2018-12-10 19:09   ` Richard Henderson
2018-12-10  0:33 ` [Qemu-devel] [Qemu-ppc] [RFC PATCH 0/6] target/ppc: convert VMX instructions to use TCG " BALATON Zoltan
2018-12-10  2:59   ` David Gibson
2018-12-10 20:54     ` BALATON Zoltan
2018-12-10 21:09       ` Richard Henderson
2018-12-10 23:01         ` BALATON Zoltan
2018-12-11  1:20       ` David Gibson
2018-12-11  3:03         ` BALATON Zoltan
2018-12-11 19:35         ` Mark Cave-Ayland
2018-12-11 21:32           ` Richard Henderson
2018-12-10 13:04 ` [Qemu-devel] " Aleksandar Markovic
2018-12-11 19:11   ` Mark Cave-Ayland

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