From: Alistair <alistair23@gmail.com>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: figlesia@xilinx.com, peter.maydell@linaro.org,
sstabellini@kernel.org, edgar.iglesias@xilinx.com,
sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com,
alistair@alistair23.me, richard.henderson@linaro.org,
frederic.konrad@adacore.com
Subject: Re: [Qemu-devel] [PATCH v1 02/12] net: cadence_gem: Announce availability of priority queues
Date: Thu, 4 Oct 2018 15:14:47 -0700 [thread overview]
Message-ID: <95a9c881-20fe-cba5-3e9b-25526e20de89@gmail.com> (raw)
In-Reply-To: <1538579266-8389-3-git-send-email-edgar.iglesias@gmail.com>
On 10/03/2018 08:07 AM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Announce the availability of the various priority queues.
> This fixes an issue where guest kernels would miss to
> configure secondary queues due to inproper feature bits.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/net/cadence_gem.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index e560b7a..901c173 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -1213,6 +1213,7 @@ static void gem_reset(DeviceState *d)
> int i;
> CadenceGEMState *s = CADENCE_GEM(d);
> const uint8_t *a;
> + uint32_t queues_mask;
>
> DB_PRINT("\n");
>
> @@ -1229,7 +1230,10 @@ static void gem_reset(DeviceState *d)
> s->regs[GEM_DESCONF] = 0x02500111;
> s->regs[GEM_DESCONF2] = 0x2ab13fff;
> s->regs[GEM_DESCONF5] = 0x002f2045;
> - s->regs[GEM_DESCONF6] = 0x00000200;
> + s->regs[GEM_DESCONF6] = 0x0;
> +
> + queues_mask = MAKE_64BIT_MASK(1, s->num_priority_queues - 1);
> + s->regs[GEM_DESCONF6] |= queues_mask;
>
> /* Set MAC address */
> a = &s->conf.macaddr.a[0];
>
next prev parent reply other threads:[~2018-10-04 22:14 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-03 15:07 [Qemu-devel] [PATCH v1 00/12] arm: Add first models of Xilinx Versal SoC Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 01/12] net: cadence_gem: Disable TSU feature bit Edgar E. Iglesias
2018-10-04 17:36 ` Alistair Francis
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 02/12] net: cadence_gem: Announce availability of priority queues Edgar E. Iglesias
2018-10-04 22:14 ` Alistair [this message]
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 03/12] net: cadence_gem: Use uint32_t for 32bit descriptor words Edgar E. Iglesias
2018-10-04 22:16 ` Alistair
2018-10-05 23:09 ` Philippe Mathieu-Daudé
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 04/12] net: cadence_gem: Add macro with max number of " Edgar E. Iglesias
2018-10-04 22:16 ` Alistair
2018-10-05 23:10 ` Philippe Mathieu-Daudé
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 05/12] net: cadence_gem: Add support for extended descriptors Edgar E. Iglesias
2018-10-04 22:29 ` Alistair
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion Edgar E. Iglesias
2018-10-05 22:35 ` Alistair
2018-10-05 23:14 ` Philippe Mathieu-Daudé
2018-10-08 12:26 ` Peter Maydell
2018-10-08 12:24 ` Peter Maydell
2018-10-08 19:54 ` Edgar E. Iglesias
2018-10-08 12:30 ` Peter Maydell
2018-10-08 19:55 ` Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 07/12] net: cadence_gem: Implement support for 64bit descriptor addresses Edgar E. Iglesias
2018-10-05 23:12 ` Alistair
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 08/12] net: cadence_gem: Announce 64bit addressing support Edgar E. Iglesias
2018-10-04 22:32 ` Alistair
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2 Edgar E. Iglesias
2018-10-08 12:41 ` Peter Maydell
2018-10-08 19:56 ` Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 10/12] target/arm: Add the Cortex-A72 Edgar E. Iglesias
2018-10-08 13:10 ` Peter Maydell
2018-10-08 21:34 ` Edgar E. Iglesias
2018-10-09 9:30 ` Peter Maydell
2018-10-09 13:17 ` Edgar E. Iglesias
2018-10-09 13:40 ` Laurent Desnogues
2018-10-09 14:56 ` Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 11/12] hw/arm: versal: Add a model of Xilinx Versal SoC Edgar E. Iglesias
2018-10-05 23:21 ` Philippe Mathieu-Daudé
2018-10-08 13:19 ` Peter Maydell
2018-10-08 22:25 ` Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 12/12] hw/arm: versal: Add a virtual Xilinx Versal board Edgar E. Iglesias
2018-10-08 14:08 ` [Qemu-devel] [PATCH v1 00/12] arm: Add first models of Xilinx Versal SoC Peter Maydell
2018-10-09 12:57 ` Edgar E. Iglesias
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