From: Zenghui Yu via <qemu-devel@nongnu.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: <qemu-devel@nongnu.org>
Subject: Re: [PATCH] tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target
Date: Sat, 4 Feb 2023 19:59:38 +0800 [thread overview]
Message-ID: <95c264dc-360b-adf9-d507-9528cdda01b8@huawei.com> (raw)
In-Reply-To: <20230203171858.3279252-1-richard.henderson@linaro.org>
On 2023/2/4 1:18, Richard Henderson wrote:
> 'offset' should be bits [23:5] of LDR instruction, rather than [4:0].
>
> Fixes: d59d83a1c388 ("tcg/aarch64: Reorg goto_tb implementation")
> Reported-by: Zenghui Yu <yuzenghui@huawei.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/aarch64/tcg-target.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
> index fde3b30ad1..a091326f84 100644
> --- a/tcg/aarch64/tcg-target.c.inc
> +++ b/tcg/aarch64/tcg-target.c.inc
> @@ -1914,7 +1914,7 @@ void tb_target_set_jmp_target(const TranslationBlock *tb, int n,
> ptrdiff_t i_offset = i_addr - jmp_rx;
>
> /* Note that we asserted this in range in tcg_out_goto_tb. */
> - insn = deposit32(I3305_LDR | TCG_REG_TMP, 0, 5, i_offset >> 2);
> + insn = deposit32(I3305_LDR | TCG_REG_TMP, 5, 19, i_offset >> 2);
> }
> qatomic_set((uint32_t *)jmp_rw, insn);
> flush_idcache_range(jmp_rx, jmp_rw, 4);
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Thanks!
prev parent reply other threads:[~2023-02-04 12:01 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-03 17:18 [PATCH] tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target Richard Henderson
2023-02-03 17:25 ` Philippe Mathieu-Daudé
2023-02-03 17:37 ` Richard Henderson
2023-02-04 11:59 ` Zenghui Yu via [this message]
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