Re: [SPAM] [PATCH v1 04/21] hw/arm/aspeed_ast27x0-ssp: Switch SSP memory to SDRAM and use dram_container for remap support

["Cédric Le Goater" <clg@kaod.org>]

On 7/17/25 05:40, Jamin Lin wrote:
> According to the AST2700 design, the SSP coprocessor uses its own SDRAM
> instead of SRAM. Additionally, all three coprocessors—SSP, TSP, and PSP—share
> a common SRAM block. In the previous implementation, the SSP memory region
> was labeled and sized as "SRAM", but in practice it was being used as SSP's
> local SDRAM.


So the SSP coprocessor has no SRAM ?


> 
> This commit updates the SSP memory mapping to reflect the correct hardware
> design:
> 
> - Replace the SRAM region with a "512MB SDRAM" region starting at 0x0.

Is 512MB a real HW value ?


Thanks,

C.



> - Rename the internal variable from "sram" to "dram_container" for clarity.
> - Use "AST2700_SSP_SDRAM_SIZE" (512MB) instead of the previous 32MB SRAM size.
> - Map the new region using "ASPEED_DEV_SDRAM" instead of "ASPEED_DEV_SRAM".
> 
> This change also prepares for future enhancements where PSP DRAM will be
> remapped into this SSP SDRAM container using subregions at specific offsets.
> Using "dram_container" makes it easier to manage aliases and remap logic.
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>   hw/arm/aspeed_ast27x0-ssp.c | 20 ++++++++++----------
>   1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
> index 80ec5996c1..9641e27de1 100644
> --- a/hw/arm/aspeed_ast27x0-ssp.c
> +++ b/hw/arm/aspeed_ast27x0-ssp.c
> @@ -15,10 +15,10 @@
>   #include "hw/misc/unimp.h"
>   #include "hw/arm/aspeed_soc.h"
>   
> -#define AST2700_SSP_RAM_SIZE (32 * MiB)
> +#define AST2700_SSP_SDRAM_SIZE (512 * MiB)
>   
>   static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
> -    [ASPEED_DEV_SRAM]      =  0x00000000,
> +    [ASPEED_DEV_SDRAM]     =  0x00000000,
>       [ASPEED_DEV_INTC]      =  0x72100000,
>       [ASPEED_DEV_SCU]       =  0x72C02000,
>       [ASPEED_DEV_SCUIO]     =  0x74C02000,
> @@ -163,7 +163,7 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
>       AspeedSoCState *s = ASPEED_SOC(dev_soc);
>       AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
>       DeviceState *armv7m;
> -    g_autofree char *sram_name = NULL;
> +    g_autofree char *name = NULL;
>       int i;
>   
>       if (!clock_has_source(s->sysclk)) {
> @@ -180,16 +180,17 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
>                                OBJECT(s->memory), &error_abort);
>       sysbus_realize(SYS_BUS_DEVICE(&a->armv7m), &error_abort);
>   
> -    sram_name = g_strdup_printf("aspeed.dram.%d",
> -                                CPU(a->armv7m.cpu)->cpu_index);
> +    /* SDRAM */
> +    name = g_strdup_printf("aspeed.sdram-container.%d",
> +                           CPU(a->armv7m.cpu)->cpu_index);
>   
> -    if (!memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size,
> -                                errp)) {
> +    if (!memory_region_init_ram(&s->dram_container, OBJECT(s), name,
> +                                AST2700_SSP_SDRAM_SIZE, errp)) {
>           return;
>       }
>       memory_region_add_subregion(s->memory,
> -                                sc->memmap[ASPEED_DEV_SRAM],
> -                                &s->sram);
> +                                sc->memmap[ASPEED_DEV_SDRAM],
> +                                &s->dram_container);
>   
>       /* SCU */
>       if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
> @@ -268,7 +269,6 @@ static void aspeed_soc_ast27x0ssp_class_init(ObjectClass *klass, const void *dat
>   
>       sc->valid_cpu_types = valid_cpu_types;
>       sc->silicon_rev = AST2700_A1_SILICON_REV;
> -    sc->sram_size = AST2700_SSP_RAM_SIZE;
>       sc->spis_num = 0;
>       sc->ehcis_num = 0;
>       sc->wdts_num = 0;