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From: Programmingkid <programmingkidx@gmail.com>
To: Alexander Graf <agraf@suse.de>,
	david@gibson.dropbear.id.au,
	Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: "qemu-ppc@nongnu.org list:PowerPC" <qemu-ppc@nongnu.org>,
	qemu-devel qemu-devel <qemu-devel@nongnu.org>
Subject: [Qemu-devel] [PATCH] hw/pci-host/uninorth.c: Add support for Apple's PCI bridge register 0x48
Date: Fri, 22 Jan 2016 11:09:23 -0500	[thread overview]
Message-ID: <96510826-2FD7-4967-9BEC-746DB44A81F8@gmail.com> (raw)

Apple has custom PCI bridge registers that are not a part of any known standard. This patch implements register 0x48. With this patch the AppleMacRiscPCI kernel extension no longer prints these error messages for the mac99 target:
AppleMacRiscPCI: bad range 2(80000000:01000000)
AppleMacRiscPCI: bad range 2(81000000:00001000)
AppleMacRiscPCI: bad range 2(81080000:00080000)

Signed-off-by: John Arbuckle <programmingkidx@gmail.com>

---
 hw/pci-host/uninorth.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 215b64f..6541b10 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -330,6 +330,10 @@ static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
     d->config[0x0C] = 0x08; // cache_line_size
     d->config[0x0D] = 0x10; // latency_timer
     //    d->config[0x34] = 0x80; // capabilities_pointer
+    d->config[0x48] = 0x0;
+    d->config[0x49] = 0x0;
+    d->config[0x4a] = 0x0;
+    d->config[0x4b] = 0x1;
 }
 
 static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp)
-- 
1.7.5.4

             reply	other threads:[~2016-01-22 16:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-22 16:09 Programmingkid [this message]
2016-01-22 16:46 ` [Qemu-devel] [PATCH] hw/pci-host/uninorth.c: Add support for Apple's PCI bridge register 0x48 Mark Cave-Ayland
2016-01-22 18:26   ` Programmingkid
2016-01-22 19:13     ` Mark Cave-Ayland
2016-01-24 23:40       ` David Gibson

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