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From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, mtosatti@redhat.com,
	marcel.apfelbaum@gmail.com, jon.grimm@amd.com,
	santosh.shukla@amd.com, vasant.hegde@amd.com, Wei.Huang2@amd.com,
	bsd@redhat.com, berrange@redhat.com, joao.m.martins@oracle.com,
	alejandro.j.jimenez@oracle.com
Subject: Re: [PATCH v3 1/2] hw/i386/amd_iommu: Isolate AMDVI-PCI from amd-iommu device to allow full control over the PCI device creation
Date: Tue, 25 Feb 2025 20:39:09 +0700	[thread overview]
Message-ID: <969ef3be-b47a-4cd4-a2b9-8948d50484d0@amd.com> (raw)
In-Reply-To: <20250220193726-mutt-send-email-mst@kernel.org>



On 2/21/2025 7:38 AM, Michael S. Tsirkin wrote:
> On Wed, Feb 12, 2025 at 05:44:49AM +0000, Suravee Suthikulpanit wrote:
>> Current amd-iommu model internally creates an AMDVI-PCI device. Here is
>> a snippet from info qtree:
>>
>>    bus: main-system-bus
>>      type System
>>      dev: amd-iommu, id ""
>>        xtsup = false
>>        pci-id = ""
>>        intremap = "on"
>>        device-iotlb = false
>>        pt = true
>>      ...
>>      dev: q35-pcihost, id ""
>>        MCFG = -1 (0xffffffffffffffff)
>>        pci-hole64-size = 34359738368 (32 GiB)
>>        below-4g-mem-size = 134217728 (128 MiB)
>>        above-4g-mem-size = 0 (0 B)
>>        smm-ranges = true
>>        x-pci-hole64-fix = true
>>        x-config-reg-migration-enabled = true
>>        bypass-iommu = false
>>        bus: pcie.0
>>          type PCIE
>>          dev: AMDVI-PCI, id ""
>>            addr = 01.0
>>            romfile = ""
>>            romsize = 4294967295 (0xffffffff)
>>            rombar = -1 (0xffffffffffffffff)
>>            multifunction = false
>>            x-pcie-lnksta-dllla = true
>>            x-pcie-extcap-init = true
>>            failover_pair_id = ""
>>            acpi-index = 0 (0x0)
>>            x-pcie-err-unc-mask = true
>>            x-pcie-ari-nextfn-1 = false
>>            x-max-bounce-buffer-size = 4096 (4 KiB)
>>            x-pcie-ext-tag = true
>>            busnr = 0 (0x0)
>>            class Class 0806, addr 00:01.0, pci id 1022:0000 (sub 1af4:1100)
>>
>> This prohibits users from specifying the PCI topology for the amd-iommu device,
>> which becomes a problem when trying to support VM migration since it does not
>> guarantee the same enumeration of AMD IOMMU device.
>>
>> Therfore, decouple the AMDVI-PCI from amd-iommu device and introduce pci-id
>> parameter to link between the two devices.
>>
>> For example:
>>    -device AMDVI-PCI,id=iommupci0,bus=pcie.0,addr=0x05 \
>>    -device amd-iommu,intremap=on,pt=on,xtsup=on,pci-id=iommupci0 \
>>
>> For backward-compatibility, internally create the AMDVI-PCI device if not
>> specified on the CLI.
>>
>> Co-developed-by: Daniel P. Berrangé<berrange@redhat.com>
>> Signed-off-by: Suravee Suthikulpanit<suravee.suthikulpanit@amd.com>
> 
> breaks build:
> 
> https://gitlab.com/mstredhat/qemu/-/jobs/9202802751
> 
> 	./hw/i386/amd_iommu.c: In function ‘amdvi_sysbus_realize’:
> ../hw/i386/amd_iommu.c:1616:18: error: unused variable ‘dc’ [-Werror=unused-variable]
>   1616 |     DeviceClass *dc = (DeviceClass *) object_get_class(OBJECT(dev));
>        |                  ^~
> cc1: all warnings being treated as errors

I'll send out v4 with the fix.

Suravee



  reply	other threads:[~2025-02-25 13:44 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-12  5:44 [PATCH v3 0/2] hw/i386/amd_iommu: Add migration support Suravee Suthikulpanit
2025-02-12  5:44 ` [PATCH v3 1/2] hw/i386/amd_iommu: Isolate AMDVI-PCI from amd-iommu device to allow full control over the PCI device creation Suravee Suthikulpanit
2025-02-21  0:38   ` Michael S. Tsirkin
2025-02-25 13:39     ` Suthikulpanit, Suravee [this message]
2025-02-12  5:44 ` [PATCH v3 2/2] hw/i386/amd_iommu: Allow migration when explicitly create the AMDVI-PCI device Suravee Suthikulpanit
2025-02-20 23:21 ` [PATCH v3 0/2] hw/i386/amd_iommu: Add migration support Michael S. Tsirkin

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