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[189.46.169.45]) by smtp.gmail.com with ESMTPSA id bi7-20020a056808188700b0032b7788af61sm622357oib.41.2022.05.26.06.27.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 26 May 2022 06:27:54 -0700 (PDT) Message-ID: <96abb644-4031-7d7f-db45-6376f8f74161@gmail.com> Date: Thu, 26 May 2022 10:27:49 -0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PULL v2 75/86] include/hw/pci/pcie_host: Correct PCIE_MMCFG_SIZE_MAX Content-Language: en-US To: "Michael S. Tsirkin" , qemu-devel@nongnu.org Cc: Peter Maydell , Francisco Iglesias , Marcel Apfelbaum , BALATON Zoltan , "qemu-ppc@nongnu.org" , Cedric Le Goater References: <20220516204913.542894-1-mst@redhat.com> <20220516204913.542894-76-mst@redhat.com> From: Daniel Henrique Barboza In-Reply-To: <20220516204913.542894-76-mst@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x2f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi, This patch broke the boot of the sam460ex ppc machine: qemu-system-ppc -M sam460ex -kernel ./buildroot/qemu_ppc_sam460ex-latest/vmlinux \ -device virtio-net-pci,netdev=net0 -netdev user,id=net0 -serial mon:stdio \ -nographic -snapshot qemu-system-ppc: ../hw/pci/pcie_host.c:97: pcie_host_mmcfg_init: Assertion `size <= PCIE_MMCFG_SIZE_MAX' failed. The reason is that it changed commit 58d5b22bbd5 ("ppc4xx: Add device models found in PPC440 core SoCs")) in a way that it wasn't expected by the board. The code seems to believe that, for a reason that isn't stated in the 58d5b22bbd5 commit message, PCIE_MMCFG_SIZE_MAX must be set to 1 << 29. I'm CCing BALATON Zoltan since he's the author of 58d5b22bbd5 and can provide context of his initial change and why the board seems to rely on it. qemu-ppc is being CCed for awareness of the sam460ex problem. Zoltan, I wasn't able to amend to quickly amend the code in a way that I could preserve the current PCIE_MMCFG_SIZE_MAX setting and make sam460ex work again. Can you please take a look? Thanks, Daniel On 5/16/22 17:55, Michael S. Tsirkin wrote: > From: Francisco Iglesias > > According to 7.2.2 in [1] bit 27 is the last bit that can be part of the > bus number, this makes the ECAM max size equal to '1 << 28'. This patch > restores back this value into the PCIE_MMCFG_SIZE_MAX define (which was > changed in commit 58d5b22bbd5 ("ppc4xx: Add device models found in PPC440 > core SoCs")). > > [1] PCI Express® Base Specification Revision 5.0 Version 1.0 > > Signed-off-by: Francisco Iglesias > Message-Id: <20220411221836.17699-3-frasse.iglesias@gmail.com> > Reviewed-by: Michael S. Tsirkin > Signed-off-by: Michael S. Tsirkin > --- > include/hw/pci/pcie_host.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h > index b3c8ce973c..82d92177da 100644 > --- a/include/hw/pci/pcie_host.h > +++ b/include/hw/pci/pcie_host.h > @@ -65,7 +65,7 @@ void pcie_host_mmcfg_update(PCIExpressHost *e, > * bit 12 - 14: function number > * bit 0 - 11: offset in configuration space of a given device > */ > -#define PCIE_MMCFG_SIZE_MAX (1ULL << 29) > +#define PCIE_MMCFG_SIZE_MAX (1ULL << 28) > #define PCIE_MMCFG_SIZE_MIN (1ULL << 20) > #define PCIE_MMCFG_BUS_BIT 20 > #define PCIE_MMCFG_BUS_MASK 0xff