From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40406) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePPQU-0003kV-Eh for qemu-devel@nongnu.org; Thu, 14 Dec 2017 04:03:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ePPQQ-00012E-Nv for qemu-devel@nongnu.org; Thu, 14 Dec 2017 04:03:34 -0500 References: <1501867249-1924-1-git-send-email-peter.maydell@linaro.org> <1501867249-1924-4-git-send-email-peter.maydell@linaro.org> From: Paolo Bonzini Message-ID: <96e94933-7381-7448-5d3b-ae8ad14d2097@redhat.com> Date: Thu, 14 Dec 2017 10:03:18 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH 3/8] cputlb: Support generating CPU exceptions on memory transaction failures List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , qemu-arm , QEMU Developers Cc: Richard Henderson , "patches@linaro.org" On 13/12/2017 17:39, Peter Maydell wrote: > I was looking at a bug that involved stepping through this function, > and it turns out that the value in the variable "physaddr" here is > not in fact the physical address of the access. It's just the offset > into the memory region. > > This doesn't matter for Arm or Alpha, which don't actually need the > physaddr for reporting the exceptions, and those are the only > current implementations of the transaction_failed hook. > But we should fix this so it doesn't bite us when we do eventually > have a cpu that needs the physaddr... > > If we have a CPUIOTLBEntry how do we get back to the physaddr for it? iotlb_to_region only gets the MemoryRegion from the MemoryRegionSection, but you could actually make it return the whole MRS. Then you can sum the MRS's offset_with_address_space. Thanks, Paolo